IRFU3412PBF

PD - 95498A IRFR3412PbF IRFU3412PbF SMPS MOSFET HEXFET® Power MOSFET Applications l Switch Mode Power Supply (SMPS) l Motor Drive l Bridge Converters l All Zero Voltage Switching l Lead-Free Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Enhanced Body Diode dv/dt Capability VDSS RDS(on) max ID 100V 0.025Ω 48A† D-Pak IRFR3412 I-Pak IRFU3412 Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG Max. 48† 34† Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 second Mounting torqe, 6-32 or M3 screw 190 140 0.95 ± 20 6.4 -55 to + 175 Units A W W/°C V V/ns °C 300(1.6mm from case ) 10 lbf•in (1.1N•m) Diode Characteristics Symbol IS ISM VSD trr Qrr IRRM ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)  Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Reverse RecoveryCurrent Forward Turn-On Time www.irf.com Min. Typ. Max. Units ––– ––– 48† ––– ––– 190 A Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25°C, IS = 29A, VGS = 0V TJ = 125°C, IF = 29A di/dt = 100A/µs „ D S ––– ––– 1.3 V „ ––– 68 100 ns ––– 160 240 nC ––– 4.5 6.8 A Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 1 12/03/04 IRFR/U3412PbF Static @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 100 ––– ––– 3.5 ––– ––– ––– ––– Typ. ––– 0.10 ––– ––– ––– ––– ––– ––– Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA † 0.025 Ω VGS = 10V, ID = 29A „ 5.5 V VDS = VGS, ID = 250µA 1.0 VDS = 95V, VGS = 0V µA 250 VDS = 80V, VGS = 0V, TJ = 150°C 100 VGS = 20V nA -100 VGS = -20V Dynamic @ TJ = 25°C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 25 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 59 21 17 19 68 44 37 3430 270 150 1040 170 270 Max. Units Conditions ––– S VDS = 50V, ID = 29A 89 ID = 29A 32 nC VDS = 50V 26 VGS = 10V, „ ––– VDD = 50V ––– I D = 29A ns ––– RG = 6.8Ω ––– VGS = 10V „ ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 80V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 80V … Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy‚ Avalanche Current Repetitive Avalanche Energy Typ. Max. Units ––– ––– ––– 160 29 14 mJ A mJ Typ. Max. Units ––– ––– ––– 1.05 50 110 °C/W Thermal Resistance Parameter RθJC RθJA RθJA Junction-to-Case Junction-to-Ambient (PCB mount)* Junction-to-Ambient Notes:  Repetitive rating; pulse width limited by max. junction temperature. (See Fig. 11) ‚ Starting TJ = 25°C, L = 0.38mH, RG = 25Ω, IAS = 29A, (See Figure 12a) ƒ ISD ≤ 29A, di/dt ≤ 420A/µs, VDD ≤ V(BR)DSS, T J ≤ 150°C „ Pulse width ≤ 300µs; duty cycle ≤ 2%. … Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS †Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 30A. * When mounted on 1" square PCB (FR-4 or G-10 Material) . For recommended footprint and soldering techniques refer to application note #AN-994 2 www.irf.com IRFR/U3412PbF 1000 TOP I D, Drain-to-Source Current (A) 100 BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 10 1 0.1 4.5V 1 10 BOTTOM 100 10 4.5V 20µs PULSE WIDTH T J= 175 ° C 20µs PULSE WIDTH T J= 25 ° C 1 0.01 0.1 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V TOP I D, Drain-to-Source Current (A) 1000 0.1 100 1 10 100 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics 1000 3.0 I D = 48A ° JT = 175 C 10 ° T J = 25 C 1 V DS= 25V 20µs PULSE WIDTH 0.1 4.0 5.0 6.0 7.0 8.0 V GS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 9.0 2.0 (Normalized) 100 RDS(on) , Drain-to-Source On Resistance I D, Drain-to-Source Current (A) 2.5 1.5 1.0 0.5 V GS = 10V 0.0 -60 -40 -20 0 20 40 60 80 TJ , Junction Temperature 100 120 140 160 180 ( °C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFR/U3412PbF VGS = 0V, f = 1 MHZ C iss = C gs + Cgd , SHORTED 20 C ds VGS , Gate-to-Source Voltage (V) C, Capacitance (pF) 100000 Crss = C gd Coss = Cds + Cgd 10000 Ciss 1000 Coss Crss ID= 29A VDS = 80V VDS= 50V VDS= 20V 16 12 8 4 0 100 0 1 10 20 40 60 80 100 100 Q G Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 1000.0 100.0 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY R DS(on) 100 T J = 175°C 10.0 1.0 T J = 25°C 100µsec 10 1msec 1 VGS = 0V 0.1 0.1 0.0 0.5 1.0 1.5 2.0 2.5 VSD, Source-toDrain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 3.0 Tc = 25°C Tj = 175°C Single Pulse 1 10msec 10 100 1000 VDS , Drain-toSource Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFR/U3412PbF 50 RD V DS LIMITED BY PACKAGE VGS ID , Drain Current (A) 40 D.U.T. RG + -VDD VGS 30 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 20 Fig 10a. Switching Time Test Circuit VDS 10 90% 0 25 50 75 100 125 TC , Case Temperature 150 175 ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms (Z thJC) 10 1 Thermal Response D = 0.50 0.20 P DM 0.10 0.1 0.05 0.02 0.01 t1 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = 2. Peak T 0.01 0.00001 0.0001 0.001 t1/ t 2 J = P DM x Z thJC +T C 0.01 0.1 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFR/U3412PbF 300 ID 15V TOP 12A BOTTOM 21A 29A 250 VDS D.U.T RG IAS VGS 20V tp DRIVER + V - DD A 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp EAS , Single Pulse Avalanche Energy (mJ) L 200 150 100 50 0 25 50 75 100 125 150 175 ( °C) Starting T , Junction Temperature J Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF VGS QGS D.U.T. QGD + V - DS VGS VG 3mA IG Charge Fig 13a. Basic Gate Charge Waveform 6 ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.irf.com IRFR/U3412PbF Peak Diode Recovery dv/dt Test Circuit Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D.U.T ƒ + ‚ - - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. Period D= + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET® Power MOSFETs www.irf.com 7 IRFR/U3412PbF D-Pak (TO-252AA) Package Outline D-Pak (TO-252AA) Part Marking Information EXAMPLE: T HIS IS AN IRF R120 WIT H AS S EMBLY LOT CODE 1234 ASS EMBLED ON WW 16, 1999 IN THE ASS EMBLY LINE "A" PART NUMBER INT ERNAT IONAL RECT IFIER LOGO Note: "P" in as s embly line position indicates "Lead-F ree" IRFU120 12 916A 34 ASS EMBLY LOT CODE DATE CODE YEAR 9 = 1999 WEEK 16 LINE A OR PART NUMBER INT ERNATIONAL RECTIF IER LOGO IRFU120 12 AS SEMBLY LOT CODE 8 34 DAT E CODE P = DESIGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 9 = 1999 WEEK 16 A = AS SEMBLY SIT E CODE www.irf.com IRFR/U3412PbF I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information EXAMPLE: THIS IS AN IRF U120 WITH ASSEMBLY LOT CODE 5678 ASSEMBLED ON WW 19, 1999 IN THE ASSEMBLY LINE "A" PART NUMBER INT ERNAT IONAL RECT IFIER LOGO IRFU120 919A 56 78 ASSEMBLY LOT CODE Note: "P" in as s embly line pos ition indicates "Lead-Free" DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A OR PART NUMBE R INT ERNAT IONAL RECTIF IER LOGO IRFU120 56 AS SEMBLY LOT CODE www.irf.com 78 DATE CODE P = DES IGNAT ES LEAD-F REE PRODUCT (OPTIONAL) YEAR 9 = 1999 WE EK 19 A = ASS EMBLY SIT E CODE 9 IRFR/U3412PbF D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION TRL 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/04 10 www.irf.com Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/