IRFU4510PBF

PD - 97784 IRFR4510PbF IRFU4510PbF Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits HEXFET® Power MOSFET VDSS 100V 11.1m RDS(on) typ. max. 13.9m ID (Silicon Limited) 63A ID (Package Limited) 56A D G S Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free D D S G G DPak IRFR4510PbF D S IPAK IRFU4510PbF G D S Gate Drain Source Absolute Maximum Ratings Symbol ID @ TC = 25°C ID @ TC = 100°C ID @ TC = 25°C IDM PD @TC = 25°C Parameter Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current Maximum Power Dissipation c Linear Derating Factor Gate-to-Source Voltage Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) VGS TJ TSTG Avalanche Characteristics EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy c d c Max. Units 63 45 56 252 A 143 0.95 ± 20 -55 to + 175 W/°C V W °C 300 127 See Fig. 14, 15, 22a, 22b mJ A mJ Thermal Resistance Symbol RJC RJA RJA Parameter j Junction-to-Case Junction-to-Ambient (PCB Mount) Junction-to-Ambient i Typ. Max. Units ––– ––– ––– 1.05 50 110 °C/W ORDERING INFORMATION: See detailed ordering and shipping information on the last page of this data sheet. Notes  through ˆ are on page 11 www.irf.com 1 05/02/12 IRFR/U4510PbF Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance RG(int) Min. Typ. Max. Units 100 ––– ––– 2.0 ––– ––– ––– ––– ––– ––– 13.9 4.0 20 250 100 -100 ––– V V/°C m V ––– ––– 0.10 11.1 3.0 ––– ––– ––– ––– 0.61 Min. Typ. Max. Units 62 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 54 14 15 39 18 42 42 34 3031 213 104 255 478 ––– 81 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– S Min. Typ. Max. μA nA Conditions VGS = 0V, ID = 250μA Reference to 25°C, ID = 5mA VGS = 10V, ID = 38A VDS = VGS, ID = 100μA VDS = 100V, VGS = 0V VDS = 100V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V c f  Dynamic @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related) nC ns pF Conditions VDS = 25V, ID = 38A ID = 38A VDS = 50V VGS = 10V ID = 38A, VDS =0V, VGS = 10V VDD = 65V ID = 38A RG = 7.5 VGS = 10V VGS = 0V VDS = 50V ƒ = 1.0MHz VGS = 0V, VDS = 0V to 80V VGS = 0V, VDS = 0V to 80V f f h g Diode Characteristics Symbol IS Parameter VSD dv/dt trr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Peak Diode Recovery Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time ISM 2 c Units Conditions MOSFET symbol ––– ––– 56 showing the A G integral reverse ––– ––– 252 p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 38A, VGS = 0V ––– 7.0 ––– V/ns TJ = 175°C, IS = 38A, VDS = 100V ––– 34 ––– TJ = 25°C VR = 86V ns ––– 39 ––– TJ = 125°C IF = 38A di/dt = 100A/μs ––– 47 ––– TJ = 25°C nC ––– 61 ––– TJ = 125°C ––– 2.4 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) f D S e f www.irf.com IRFR/U4510PbF 1000 1000 100 BOTTOM VGS 15V 10V 6.0V 5.5V 5.0V 4.75V 4.5V 4.25V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 6.0V 5.5V 5.0V 4.75V 4.5V 4.25V 100 10 1 60μs PULSE WIDTH Tj = 25°C BOTTOM 10 4.25V 60μs PULSE WIDTH 4.25V Tj = 175°C 0.1 1 0.1 1 10 100 0.1 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 100 2.6 RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 10 Fig 2. Typical Output Characteristics 1000 100 T J = 175°C T J = 25°C 10 VDS = 25V 60μs PULSE WIDTH 1.0 ID = 38A VGS = 10V 2.2 1.8 1.4 1.0 0.6 0.2 2 3 4 5 6 7 8 9 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) Fig 4. Normalized On-Resistance vs. Temperature Fig 3. Typical Transfer Characteristics 14.0 100000 ID= 38A VGS, Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd 10000 C, Capacitance (pF) 1 V DS, Drain-to-Source Voltage (V) Ciss 1000 Coss Crss 100 12.0 VDS= 80V VDS= 50V 10.0 VDS= 20V 8.0 6.0 4.0 2.0 0.0 10 1 10 100 1000 VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage www.irf.com 0 10 20 30 40 50 60 70 QG, Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 IRFR/U4510PbF 1000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 T J = 175°C 100 T J = 25°C 10 OPERATION IN THIS AREA LIMITED BY RDS(on) 100 1msec 10 Limited by package 1 10msec 0.1 0.01 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0.1 VSD, Source-to-Drain Voltage (V) ID, Drain Current (A) 50 40 30 20 10 0 50 75 100 125 150 175 V(BR)DSS , Drain-to-Source Breakdown Voltage (V) Limited by package 25 100 1000 125 Id = 5mA 120 115 110 105 100 95 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Temperature ( °C ) T C , Case Temperature (°C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage 1.6 EAS , Single Pulse Avalanche Energy (mJ) 600 1.4 1.2 Energy (μJ) 10 Fig 8. Maximum Safe Operating Area 70 60 1 VDS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 1.0 0.8 0.6 0.4 0.2 0.0 ID 4.7A 12A BOTTOM 38A TOP 500 400 300 200 100 0 -20 0 20 40 60 80 100 VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy 4 DC Tc = 25°C Tj = 175°C Single Pulse VGS = 0V 1.0 100μsec 120 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) Fig 12. Maximum Avalanche Energy vs. DrainCurrent www.irf.com IRFR/U4510PbF Thermal Response ( Z thJC ) °C/W 10 1 D = 0.50 0.20 R1 R1 0.10 0.1 J 0.05 0.02 0.01 0.01 J 1 R2 R2 2 1 2 R3 R3 3 C  3 0.6371 Ci= iRi Ci iRi 1E-005 0.005883 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006 Ri (°C/W) i (sec) 0.3442 0.001031 0.0679 0.000061 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 100 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming  Tj = 150°C and Tstart =25°C (Single Pulse) Avalanche Current (A) Duty Cycle = Single Pulse 0.01 10 0.05 0.10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming  j = 25°C and Tstart = 150°C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth EAR , Avalanche Energy (mJ) 150 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 38A 125 100 75 50 25 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com 5 IRFR/U4510PbF 20 IF = 25A V R = 86V 4.0 TJ = 25°C TJ = 125°C 15 3.5 IRRM (A) VGS(th) , Gate threshold Voltage (V) 4.5 3.0 ID = 100μA 2.5 ID = 250μA 10 ID = 1.0mA 2.0 ID = 1.0A 5 1.5 0 1.0 -75 -50 -25 0 0 25 50 75 100 125 150 175 200 600 800 1000 diF /dt (A/μs) T J , Temperature ( °C ) Fig. 17 - Typical Recovery Current vs. dif/dt Fig 16. Threshold Voltage vs. Temperature 20 350 IF = 38A V R = 86V IF = 25A V R = 86V 300 TJ = 25°C TJ = 125°C TJ = 25°C TJ = 125°C 250 QRR (nC) 15 IRRM (A) 400 10 200 150 100 5 50 0 0 0 200 400 600 800 1000 0 diF /dt (A/μs) 200 400 600 800 1000 diF /dt (A/μs) Fig. 19 - Typical Stored Charge vs. dif/dt Fig. 18 - Typical Recovery Current vs. dif/dt 350 IF = 38A V R = 86V 300 TJ = 25°C TJ = 125°C QRR (nC) 250 200 150 100 50 0 0 200 400 600 800 1000 diF /dt (A/μs) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRFR/U4510PbF Driver Gate Drive D.U.T ƒ - ‚ - - „ * D.U.T. ISD Waveform Reverse Recovery Current +  RG dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD P.W. Period VGS=10V Circuit Layout Considerations  Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer + D= Period P.W. + + - Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Current Inductor Curent ISD Ripple  5% * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V DRIVER L VDS tp D.U.T RG VGS 20V + V - DD IAS A 0.01 tp I AS Fig 22a. Unclamped Inductive Test Circuit RD VDS Fig 22b. Unclamped Inductive Waveforms VDS 90% VGS D.U.T. RG + - VDD V10V GS 10% VGS Pulse Width µs Duty Factor  td(on) Fig 23a. Switching Time Test Circuit tr t d(off) Fig 23b. Switching Time Waveforms Id Current Regulator Same Type as D.U.T. Vds Vgs 50K 12V tf .2F .3F D.U.T. + V - DS Vgs(th) VGS 3mA IG ID Current Sampling Resistors Fig 24a. Gate Charge Test Circuit www.irf.com Qgs1 Qgs2 Qgd Qgodr Fig 24b. Gate Charge Waveform 7 IRFR/U4510PbF D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information (;$03/( 7+,6,6$1,5)5 3$57180%(5 :,7+$66(0%/< ,17(51$7,21$/ /27&2'( ,5)5 $   5(&7,),(5 $66(0%/('21:: /2*2 ,17+($66(0%/