LITIX™ Basic
TLD1313EL
3 Channel High-Side Current Source
1
Package
PG-SSOP-14
Marking
TLD1313
Overview
Applications
•
Exterior LED lighting applications such as tail/brake light, turn indicator,
position light, side marker,...
•
Interior LED lighting applications such as ambient lighting, interior
illumination and dash board lighting.
EN
Thermal
protection
4.7nF**
OUT2
OUT1
GND
Status
CST =100pF**
470kΩ*
TLD1313EL
* In case PWM via VS is performed
** For EMI improvement if required
4.7nF**
OUT3
Output
control
Current
adjustment
RSET
IN_SET
4.7nF**
Internal
supply
ST
ISO-Pulse
protection circuit
depending on
requirements
VS
CVS =4.7nF
GND
10kΩ
Cmod =2.2µF
VBATT
to other LITIX™ Basic
Application Diagram with TLD1313EL
Data Sheet
www.infineon.com
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Overview
Basic Features
•
3 Channel device with integrated output stages (current sources), optimized to drive LEDs with output
current up to 120 mA per channel
•
Low current consumption in sleep mode
•
PWM-operation supported via VS- and EN-pin
•
Output current adjustable via external low power resistor and possibility to connect PTC resistor for LED
protection during over temperature conditions
•
Reverse polarity protection and overload protection
•
Undervoltage detection
•
Open load and short circuit to GND diagnosis
•
Wide temperature range: -40°C < Tj < 150°C
•
PG-SSOP-14 package with exposed heatslug
Description
The LITIX™ Basic TLD1313EL is a three channel high side driver IC with integrated output stages. It is designed
to control LEDs with a current up to 120 mA. In typical automotive applications the device is capable to drive
i.e. 3 red LEDs per chain (total 9 LEDs) with a current up to 60 mA, which is limited by thermal cooling aspects.
The output current is controlled practically independent of load and supply voltage changes.
Table 1
Product Summary
Parameter
Symbol
Value
Operating voltage range
VS(nom)
5.5 V ... 40 V
Maximum voltage
VS(max)
VOUTx(max)
40 V
Nominal output (load) current
IOUTx(nom)
60 mA when using a supply voltage range of 8 V - 18 V (e.g.
Automotive car battery). Currents up to IOUT(max) possible in
applications with low thermal resistance RthJA
Maximum output (load) current
IOUTx(max)
120 mA; depending on thermal resistance RthJA
Output current accuracy at RSET = 12 kΩ
kLT
750 ± 7%
Current consumption in sleep mode IS(sleep,typ)
0.1 µA
Protective Functions
•
ESD protection
•
Under voltage lock out
•
Over Load protection
•
Over Temperature protection
•
Reverse Polarity protection
Diagnostic Functions
•
OL detection
•
SC to Vs (indicated by OL diagnosis)
•
SC to GND detection
Data Sheet
2
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Block Diagram
Block Diagram
VS
2
EN
Internal
supply
Thermal
protection
IN_SET
OUT3
Output
control
Current
adjustment
OUT2
OUT1
Figure 1
Data Sheet
GND
TLD1313EL
ST
Status
Basic Block Diagram
3
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
Figure 2
Data Sheet
VS
1
VS
2
EN
3
NC
4
NC
14
NC
13
OUT3
12
OUT2
11
OUT1
5
10
ST
IN_SET
6
9
GND
NC
7
8
NC
TLD1313EL
EP
Pin Configuration
4
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Pin Configuration
3.2
Pin Definitions and Functions
Pin
Symbol
Input/
Output
Function
1, 2
VS
–
Supply Voltage; battery supply, connect a decoupling capacitor (100 nF - 1 µF)
to GND
3
EN
I
Enable pin
4
NC
–
Pin not connected
5
NC
–
Pin not connected
6
IN_SET
I/O
Input / SET pin; Connect a low power resistor to adjust the output current
8
NC
–
Pin not connected
9
GND
–
1)
10
ST
I/O
Status pin
11
OUT1
O
Output 1
12
OUT2
O
Output 2
13
OUT3
O
Output 3
14
NC
–
Pin not connected
–
1)
Exposed
Pad
GND
Ground
Exposed Pad; connect to GND in application
1) Connect all GND-pins together.
Data Sheet
5
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings 1)
Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin for input pins (I),
positive currents flowing out of the I/O and output pins (O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Conditions
Voltages
4.1.1
Supply voltage
VS
-16
40
V
–
4.1.2
Input voltage EN
VEN
-16
40
V
–
4.1.3
Input voltage EN related to VS
VEN(VS)
VS - 40
VS + 16
V
–
4.1.4
Input voltage EN related to VOUTx
VEN - VOUTx
VEN VOUTx
-16
40
V
–
4.1.5
Output voltage
VOUTx
-1
40
V
–
4.1.6
Power stage voltage
VPS = VS - VOUTx
VPS
-16
40
V
–
4.1.7
IN_SET voltage
VIN_SET
-0.3
6
V
–
4.1.8
Status voltage
VST
-0.3
6
V
–
4.1.9
IN_SET current
IIN_SET
–
–
2
8
mA
–
Diagnosis output
4.1.10
Output current
IOUTx
–
130
mA
–
Currents
Temperatures
4.1.11
Junction temperature
Tj
-40
150
°C
–
4.1.12
Storage temperature
Tstg
-55
150
°C
–
ESD Susceptibility
4.1.13
ESD resistivity to GND
VESD
-2
2
kV
Human Body
Model (100 pF via
1.5 kΩ)2)
4.1.14
ESD resistivity all pins to GND
VESD
-500
500
V
CDM3)
4.1.15
ESD resistivity corner pins to GND
VESD
-750
750
V
CDM3)
1) Not subject to production test, specified by design
2) ESD susceptibility, Human Body Model “HBM” according to ANSI/ESDA/JEDEC JS-001-2011
3) ESD susceptibility, Charged Device Model “CDM” according to JESD22-C101E
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in
the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions
are not designed for continuous repetitive operation.
Data Sheet
6
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
General Product Characteristics
Functional Range
4.2
Pos.
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Conditions
4.2.16
Supply voltage range for
normal operation
VS(nom)
5.5
40
V
–
4.2.17
Power on reset threshold
VS(POR)
–
5
V
VEN = VS
RSET = 12 kΩ
IOUTx = 80% IOUTx(nom)
VOUTx = 2.5 V
4.2.18
Junction temperature
Tj
-40
150
°C
–
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
Thermal Resistance
4.3
Pos.
Parameter
Symbol
4.3.1
Junction to Case
RthJC
4.3.2
Junction to Ambient 1s0p board
RthJA1
4.3.3
1)
2)
3)
4)
Junction to Ambient 2s2p board
Limit Values
Min.
Typ.
Max.
–
8
10
–
–
RthJA2
61
56
Unit
Conditions
K/W
1) 2)
K/W
1) 3)
–
–
Ta = 85 °C
Ta = 135 °C
K/W
1) 4)
–
45
–
Ta = 85 °C
–
43
–
Ta = 135 °C
Not subject to production test, specified by design. Based on simulation results.
Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed Pad
are fixed to ambient temperature). Ta = 85°C, Total power dissipation 1.5 W.
The RthJA values are according to Jedec JESD51-3 at natural convection on 1s0p FR4 board. The product
(chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 70 µm Cu, 300 mm2 cooling area.
Total power dissipation 1.5 W distributed statically and homogenously over all power stages.
The RthJA values are according to Jedec JESD51-5,-7 at natural convection on 2s2p FR4 board. The product
(chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (outside 2 x
70 µm Cu, inner 2 x 35 µm Cu). Where applicable, a thermal via array under the exposed pad contacted the
first inner copper layer. Total power dissipation 1.5 W distributed statically and homogenously over all
power stages.
Data Sheet
7
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
EN Pin
5
EN Pin
The EN pin is a dual function pin:
Internal Supply
Output Control
EN
V EN
Figure 3
Block Diagram EN pin
Note: The current consumption at the EN-pin IEN needs to be added to the total device current consumption. The
total current consumption is the sum of the currents at the VS-pin IS and the EN-pin IEN.
5.1
EN Function
If the voltage at the pin EN is below a threshold of VEN(off) the LITIX™ Basic IC will enter Sleep mode. In this state
all internal functions are switched off, the current consumption is reduced to IS(sleep). A voltage above VEN(on) at
this pin enables the device after the Power on reset time tPOR.
VS
V EN
IOU T
t
t
tPOR
100%
80%
t
Figure 4
Data Sheet
Power on reset
8
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
EN Pin
5.2
Internal Supply Pin
The EN pin can be used to supply the internal logic. There are two typical application conditions, where this
feature can be used:
1) In “DC/DC control Buck” configurations, where the voltage Vs can be below 5.5V.
2) In configurations, where a PWM signal is applied at the Vbatt pin of a light module. The buffer capacitor CBUF
is used to supply the LITIX™ Basic IC during Vbatt low (Vs low) periods. This feature can be used to minimize
the turn-on time to the values specified in Pos. 9.2.13. Otherwise, the power-on reset delay time tPOR
(Pos. 5.4.7) has to be considered.
The capacitor can be calculated using the following formula:
I EN LS
C BUF = tLOW max -------------------------------------------------V S – V D1 – V S POR
(1)
See also a typical application drawing in Chapter 10.
VBATT
VS
D1
GND
CBUF
EN
Internal
supply
Thermal
protection
Current
adjustment
OUT2
OUT1
LITIX™ Basic
Figure 5
Data Sheet
GND
R SET
IN_SET
OUT3
Output
control
External circuit when applying a fast PWM signal on VBATT
9
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
EN Pin
V EN
t
V BATT
IOU T
t
tON (VS)
100%
80%
Switch off behavior depends on
V BATT and load characteristics
20%
t
Figure 6
Typical waveforms when applying a fast PWM signal on VBATT
The parameter tON(VS) is defined at Pos. 9.2.13. The parameter tOFF(VS) depends on the load and supply voltage
VBATT characteristics.
5.3
EN Unused
In case of an unused EN pin, there are two different ways to connect it:
5.3.1
EN - Pull Up to VS
The EN pin can be connected with a pull up resistor (e.g. 10 kΩ) to Vs potential. In this configuration the
LITIX™ Basic IC is always enabled.
5.3.2
EN - Direct Connection to VS
The EN pin can be connected directly to the VS pin (IC always enabled). This configuration has the advantage
(compared to the configuration described in Chapter 5.3.1) that no additional external component is
required.
Data Sheet
10
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
EN Pin
5.4
Electrical Characteristics Internal Supply / EN Pin
Electrical Characteristics Internal Supply / EN pin
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output
pins (O) (unless otherwise specified)
Pos.
Parameter
Symbol
5.4.1
Current consumption,
sleep mode
IS(sleep)
5.4.2
Current consumption,
active mode
IS(on)
Limit Values
Min.
Typ.
Max.
–
0.1
2
–
–
–
5.4.3
Current consumption,
device disabled via ST
–
–
–
5.4.4
–
–
–
5.4.5
–
–
–
Data Sheet
–
–
–
11
1)
VEN = 0.5 V
Tj < 85 °C
VS = 18 V
VOUTx = 3.6 V
mA
2)
IIN_SET = 0 µA
Tj < 105 °C
VS = 18 V
VOUTx = 3.6V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
mA
2)
VS = 18 V
Tj < 105 °C
VST = 5 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
mA
2)
VS = 18 V
Tj < 105 °C
VIN_SET = 5 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
mA
2)
1.4
0.7
1.4
Current consumption,
IS(fault,STu)
active mode in single fault
detection condition with
ST-pin unconnected
–
–
–
µA
1.4
0.65
1.4
Current consumption,
IS(dis,IN_SET)
device disabled via IN_SET
–
–
–
Conditions
1.4
0.75
1.5
IS(dis,ST)
–
–
–
Unit
1.7
1.1
1.8
VS = 18 V
Tj < 105 °C
RSET = 12 kΩ
VOUTx = 18 V or 0 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
EN Pin
Electrical Characteristics Internal Supply / EN pin (cont’d)
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output
pins (O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
5.4.6
Typ.
Unit
Conditions
mA
2)
VS = 18 V
Tj < 105 °C
RSET = 12 kΩ
VOUTx = 18 V or 0 V
VST = 0 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
1)
Max.
Current consumption,
IS(fault,STG)
active mode in single fault
detection condition with
ST-pin connected to GND
–
–
–
–
–
–
6.0
4.9
5.9
Power-on reset delay time tPOR
–
–
25
µs
VS = VEN = 0 →13.5 V
VOUTx(nom) = 3.6 ± 0.3V
IOUTx = 80% IOUTx(nom)
5.4.8
Required supply voltage
for output activation
VS(on)
–
–
4
V
VEN = 5.5 V
VOUTx = 3 V
IOUTx = 50% IOUTx(nom)
5.4.9
Required supply voltage
for current control
VS(CC)
–
–
5.2
V
VEN = 5.5 V
VOUTx = 3.6 V
IOUTx ≥ 90% IOUTx(nom)
5.4.10
EN turn on threshold
VEN(on)
–
–
2.5
V
–
5.4.11
EN turn off threshold
VEN(off)
0.8
–
–
V
–
mA
1)
VS = 4.5 V
Tj < 105 °C
VEN = 5.5 V
mA
Tj < 105 °C
VS = 13.5 V, VEN = 5.5 V
VS = 18 V, VEN = 5.5 V
VS = VEN = 18 V
1)
VS = 18 V, REN = 10 kΩ
between VS and EN-pin
5.4.7
3)
5.4.12
EN input current during
low supply voltage
IEN(LS)
5.4.13
EN high input current
IEN(H)
–
–
1.8
–
–
–
–
–
–
–
–
0.1
0.1
1.65
0.45
1) Not subject to production test, specified by design
2) The total device current consumption is the sum of the currents IS and IEN(H), please refer to Pos. 5.4.13
3) See also Figure 4
Data Sheet
12
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
IN_SET Pin
6
IN_SET Pin
The IN_SET pin is a multiple function pin for output current definition, input and diagnostics:
Logic
IN_SET
high impedance
IIN_SET
VIN_SET
VIN_SET(OL/SC)
GND
Figure 7
Block Diagram IN_SET pin
6.1
Output Current Adjustment via RSET
The output current for all three channels can only be adjusted simultaneously. The current adjustment can be
done by placing a low power resistor (RSET) at the IN_SET pin to ground. The dimensioning of the resistor can
be done using the formula below:
kR SET = ---------I OUT
(2)
The gain factor k (RSET * output current) is specified in Pos. 9.2.4 and Pos. 9.2.5. The current through the RSET
is defined by the resistor itself and the reference voltage VIN_SET(ref), which is applied to the IN_SET during
supplied device.
6.2
Smart Input Pin
The IN_SET pin can be connected via RSET to the open-drain output of a µC or to an external NMOS transistor
as described in Figure 8. This signal can be used to turn off the output stages of the IC. A minimum IN_SET
current of IIN_SET(act) is required to turn on the output stages. This feature is implemented to prevent glimming
of LEDs caused by leakage currents on the IN_SET pin, see Figure 11 for details. In addition, the IN_SET pin
offers the diagnostic feedback information, if the status pin is connected to GND. Another diagnostic
possibility is shown in Figure 9, where the diagnosis information is provided via the ST pin (refer to Chapter 7
and Chapter 8) to a micro controller. In case of a fault event with the ST pin connected to GND the IN_SET
voltage is increased to VIN_SET(OL/SC) Pos. 8.4.2. Therefore, the device has two voltage domains at the IN_SETpin, which is shown in Figure 12.
Data Sheet
13
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
IN_SET Pin
Microcontroller
(e.g. XC866)
OUT
RSET/2
RSET/2
IN_SET
Current
adjust
Status
Basic LED Driver
ST
GND
IN
VDDP = 5 V
Figure 8
Schematics IN_SET interface to µC, diagnosis via IN_SET pin
Microcontroller
(e.g. XC866)
OUT
RSET
IN_SET
Current
adjust
Status
Basic LED Driver
ST
GND
IN
VDDP = 5 V
Figure 9
optional
Schematics IN_SET interface to µC, diagnosis via ST pin
The resulting switching times are shown in Figure 10:
IIN_ SET
IOU T
tON (IN_ SET )
tOFF(IN _ SET)
t
100%
80%
20%
t
Figure 10
Data Sheet
Switching times via IN_SET
14
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
IN_SET Pin
IOUT [mA]
k = IOUTx * VIN_SET(ref) / IIN_SETx
IOUTx
IIN_SET(ACT)
Figure 11
IIN_SETx
IIN_SET [µA]
IOUT versus IINSET
V IN_ SET
VIN _SET( OL /SC)m ax
Diagnostic voltage range
V IN_ SET(OL /SC) m in
VIN _SET (ref ) m ax
Normal operation and high temperature current
reduction range
Figure 12
Data Sheet
Voltage domains for IN_SET pin, if ST pin is connected to GND
15
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
ST Pin
7
ST Pin
The ST pin is a multiple function pin.
IST(OL/SC)
VST(OL/SC)
No fault
Fault
Output Control
ST
No fault
Fault
VST
IST(PD)
Figure 13
Block Diagram ST pin
7.1
Diagnosis Selector
If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), the ST
pin acts as diagnosis output pin. In normal operation (device is activated) the ST pin is pulled to GND via the
internal pull down current IST(PD). In case of an open load or short circuit to GND condition the ST pin is
switched to VST(OL/SC) after the
open load or short circuit detection filter time (Pos. 8.4.9, Pos. 8.4.12).
If the device is operated in PWM operation via the VS and/or EN pins the ST pin should be connected to GND
via a high ohmic resistor (e.g. 470 kΩ) to ensure proper device behavior during fast rising VS and/or EN slopes.
If the ST pin is shorted to GND the diagnostic feedback is performed via the IN_SET-pin, which is shown in
Chapter 6.2 and Chapter 8.
7.2
Diagnosis Output
If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), it acts as
a diagnostic output. In case of a fault condition the ST pin rises its voltage to VST(OL/SC) (Pos. 8.4.7). Details are
shown in Chapter 8.
7.3
Disable Input
If an external voltage higher than VST(H) (Pos. 8.4.5) is applied to the ST pin, the device is switched off. This
function is used for applications, where multiple drivers should be used for one light function. It is possible to
combine the drivers’ fault diagnosis via the ST pins. If a single LED chain fails, the entire light function is
switched off. In this scenario e.g. the diagnostic circuit on the body control module can easily distinguish
between the two cases (normal load or load fault), because nearly no current is flowing into the LED module
during the fault scenario - the drivers consume a current of IS(fault,STu) (Pos. 5.4.5) or IS(dis,ST) (Pos. 5.4.3).
As soon as one LED chain fails, the ST-pin of this device is switched to VST(OL/SC). The other devices used for the
same light function can be connected together via the ST pins. This leads to a switch off of all devices
connected together. Application examples are shown in Chapter 10.
Data Sheet
16
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
ST Pin
V ST
IOU T
tON (ST)
tOFF( ST)
t
100%
80%
20%
t
Figure 14
Data Sheet
Switching times via ST Pin
17
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Load Diagnosis
8
Load Diagnosis
8.1
Open Load
An open load diagnosis feature is integrated in the TLD1313EL driver IC. If there is an open load on one of the
outputs, the outputs are turned off. The potential on the IN_SET pin rises up to VIN_SET(OL/SC), if the ST is
connected to GND. This high voltage can be used as input signal for an µC as shown in Figure 9. If the ST pin
is open or connected to GND via a high ohmic resistor, the ST pin rises to a high potential as described in
Chapter 7. More details are shown in Figure 18. The open load status is not latched, as soon as the open load
condition is no longer present, the output stage will be turned on again. An open load condition is detected, if
the voltage drop over the output stage VPS is below the threshold according Pos. 8.4.10 and a filter time of tOL
is passed.
V IN_ SET
VIN _SET( OL /SC)
VIN_ SET( ref )
tOL
tIN _SET (re se t)
VOU T
t
VS
V S – VPS(OL )
VF
open load
occurs
open load
disappears
t
Figure 15
Data Sheet
IN_SET behavior during open load condition with ST pin connected to GND
18
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Load Diagnosis
VIN _SET
VIN _SET( ref )
t
VST
V ST( OL /SC)
tOL
tIN_ SET(re se t)
VOU T
t
VS
VS – VPS( OL)
VF
open load
occurs
open load
disappears
t
Figure 16
IN_SET and ST behavior during open load condition (ST unconnected)
8.2
Short Circuit to GND detection
The TLD1313EL has an integrated SC to GND detection. If the output stage is turned on and the voltage at the
output falls below VOUT(SC) the potential on the IN_SET pin is increased up to VIN_SET(OL/SC) after tSC, if the ST pin
is connected to GND. If the ST is open or connected to GND via a high ohmic resistor the fault is indicated on
the ST pin according to Chapter 7 after tSC. More details are shown in Figure 18. This condition is not latched.
For detecting a normal condition after a short circuit detection an output current according to IOUT(SC) is driven
by the channel.
Data Sheet
19
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Load Diagnosis
VIN _SET
VIN _SET( OL /SC)
VIN _SET (ref )
VOU T
tSC
t
tIN_ SET( re se t)
VF
VOUT (SC)
t
short circuit
occurs
Figure 17
short circuit
disappears
IN_SET behavior during short circuit to GND condition with ST connected to GND and VDEN >
VDEN(act)
V IN_ SET
V IN_ SET(ref )
t
V ST
VST (OL /SC)
V OU T
tSC
tIN _SET (re se t)
t
VF
V OUT (SC)
t
short circuit
occurs
short circuit
disappears
Figure 18
IN_SET and ST behavior during short circuit to GND condition (ST unconnected)
Data Sheet
20
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Load Diagnosis
Note: In applications, where 1 output of the LITIX™ Basic IC is not used, a zener diode can be connected to the
output to avoid unintended open load or short circuit conditions. The zener voltage should be in the range
of the LEDs’ forward voltage.
8.3
Double Fault Conditions
The TLD1313EL has an integrated double fault detection feature. This feature is implemented to detect
significant supply voltage drops. During such supply voltage drops close to the forward voltage of the LEDs the
drivers outputs remain active. In case of load faults on two or more outputs within the time period tOL or tSC
(Pos. 8.4.9 and Pos. 8.4.12) the device disables the diagnosis to avoid any uncorrect open load diagnosis
during low supply voltages close to the forward voltages of the connected LED chains. If the faults between
two or three channels happen with a delay of longer than tOL or tSC the double fault detection feature is not
active, i.e. the device is not turned on.
8.4
Electrical Characteristics IN_SET Pin and Load Diagnosis
Electrical Characteristics IN_SET pin and Load Diagnosis
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ, all voltages with respect to ground,
positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless
otherwise specified)
Pos.
Parameter
Symbol
Unit
Conditions
1)
Min.
Typ.
Max.
1.19
1.23
1.27
V
8.4.1
IN_SET reference
voltage
8.4.2
IN_SET open load/short VIN_SET(OL/SC) 4
circuit voltage
–
5.5
V
VS > 8 V
Tj = 25...150 °C
VS = VOUTx (OL) or
VOUTx = 0 V (SC)
8.4.3
IN_SET open load/short IIN_SET(OL/SC)
circuit current
1.5
–
7.4
mA
1)
VS > 8 V
Tj = 25...150 °C
VIN_SET = 4 V
VS = VOUTx (OL) or
VOUTx = 0 V (SC)
8.4.4
ST device turn on
VST(L)
threshold (active low) in
case of voltage applied
from external (ST-pin
acting as input)
0.8
–
–
V
–
8.4.5
VST(H)
ST device turn off
threshold (active low) in
case of voltage applied
from external (ST-pin
acting as input)
–
–
2.5
V
–
8.4.6
ST pull down current
–
–
15
µA
VEN = 5.5 V
VST = 0.8 V
Data Sheet
VIN_SET(ref)
Limit Values
IST(PD)
21
VOUTx = 3.6 V
Tj = 25...115 °C
1)
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Load Diagnosis
Electrical Characteristics IN_SET pin and Load Diagnosis (cont’d)
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSET = 12 kΩ, all voltages with respect to ground,
positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless
otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
1)
8.4.7
ST open load/short
circuit voltage (ST-pin
acting as diagnosis
output)
VST(OL/SC)
4
–
5.5
V
VS > 8 V
Tj = 25...150 °C
RST = 470 kΩ
VS = VOUTx (OL) or
VOUTx = 0 V (SC)
8.4.8
ST open load/short
circuit current (ST-pin
acting as diagnosis
output)
IST(OL/SC)
100
–
220
µA
1)
VS > 8 V
Tj = 25...150 °C
VST = 2.5 V
VS = VOUTx (OL) or
VOUTx = 0 V (SC)
8.4.9
OL detection filter time
tOL
10
22
35
µs
1)
8.4.10
OL detection voltage
VPS(OL) = VS - VOUTx
VPS(OL)
0.2
–
0.4
V
VS > 8 V
8.4.11
Short circuit to GND
detection threshold
VOUT(SC)
0.8
–
1.4
V
VS > 8 V
8.4.12
SC detection filter time
tSC
10
22
35
µs
1)
VS > 8 V
VS > 8 V
–
5
20
µs
1)
SC detection current in IOUT(SC,STu)
case of unconnected STpin
100
200
300
µA
VS > 8 V
VOUTx = 0 V
SC detection current in
case of ST-pin shorted
to GND
0.1
2
4.75
mA
VS > 8 V
VOUTx = 0 V
VST = 0 V
–
15
µA
See Figure 11
8.4.13
IN_SET diagnosis reset
time
8.4.14
8.4.15
tIN_SET(reset)
IOUT(SC,STG)
8.4.16
IN_SET activation
IIN_SET(act)
2
current without turn on
of output stages
1) Not subject to production test, specified by design
Data Sheet
VS > 8 V
22
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Power Stage
9
Power Stage
The output stages are realized as high side current sources with a current of 120 mA. During off state the
leakage current at the output stage is minimized in order to prevent a slightly glowing LED.
The maximum current of each channel is limited by the power dissipation and used PCB cooling areas (which
results in the applications RthJA).
For an operating current control loop the supply and output voltages according to the following parameters
have to be considered:
•
•
•
Required supply voltage for current control VS(CC), Pos. 5.4.9
Voltage drop over output stage during current control VPS(CC), Pos. 9.2.6
Required output voltage for current control VOUTx(CC), Pos. 9.2.7
9.1
Protection
The device provides embedded protective functions, which are designed to prevent IC destruction under fault
conditions described in this data sheet. Fault conditions are considered as “outside” normal operating range.
Protective functions are neither designed for continuous nor for repetitive operation.
9.1.1
Over Load Behavior
An over load detection circuit is integrated in the LITIX™ Basic IC. It is realized by a temperature monitoring of
the output stages (OUTx).
As soon as the junction temperature exceeds the current reduction temperature threshold Tj(CRT) the output
current will be reduced by the device by reducing the IN_SET reference voltage VIN_SET(ref). This feature avoids
LED’s flickering during static output overload conditions. Furthermore, it protects LEDs against over
temperature, which are mounted thermally close to the device. If the device temperature still increases, the
three output currents decrease close to 0 A. As soon as the device cools down the output currents rise again.
IOU T
V IN_ SET
Tj (C R T)
Figure 19
Tj
Output current reduction at high temperature
Note: This high temperature output current reduction is realized by reducing the IN_SET reference voltage
voltage (Pos. 8.4.1). In case of very high power loss applied to the device and very high junction
temperature the output current may drop down to IOUTx = 0 mA, after a slight cooling down the current
increases again.
9.1.2
Reverse Battery Protection
The TLD1313EL has an integrated reverse battery protection feature. This feature protects the driver IC itself,
but also connected LEDs. The output reverse current is limited to IOUTx(rev) by the reverse battery protection.
Data Sheet
23
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Power Stage
Note: Due to the reverse battery protection a reverse protection diode for the light module may be obsolete. In
case of high ISO-pulse requirements and only minor protecting components like capacitors a reverse
protection diode may be reasonable. The external protection circuit needs to be verified in the application.
9.2
Electrical Characteristics Power Stage
Electrical Characteristics Power Stage
Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40°C to +150°C, VOUTx = 3.6 V, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output
pins (O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
9.2.1
Output leakage current
Typ.
Unit
Conditions
µA
VEN = 5.5 V
IIN_SET = 0 µA
VOUTx = 2.5 V
Tj = 150 °C
1)
Tj = 85 °C
1)
Max.
IOUTx(leak)
–
–
–
–
7
3
9.2.2
Output leakage current in
boost over battery setup
–
IOUTx(leak,B2B)
–
50
µA
9.2.3
Reverse output current
-IOUTx(rev)
–
1
µA
9.2.4
Output current accuracy
kLT
limited temperature range
–
Output current accuracy
over temperature
1)
VS = -16 V
Output load: LED with
break down voltage
< - 0.6 V
1)
697
645
9.2.5
VEN = 5.5 V
IIN_SET = 0 µA
VOUTx = VS = 40 V
750
750
Tj = 25...115 °C
VS = 8...18 V
VPS = 2 V
RSET = 6...12 kΩ
RSET = 30 kΩ
803
855
1)
kALL
697
645
750
750
803
855
Tj = -40...115 °C
VS = 8...18 V
VPS = 2 V
RSET = 6...12 kΩ
RSET = 30 kΩ
9.2.6
Voltage drop over power
stage during current
control VPS(CC) = VS - VOUTx
VPS(CC)
0.75
–
–
V
1)
9.2.7
Required output voltage
for current control
VOUTx(CC)
2.3
–
–
V
1)
Data Sheet
24
VS = 13.5 V
RSET = 12 kΩ
IOUTx ≥ 90% of
(kLT(typ)/RSET)
VS = 13.5 V
RSET = 12 kΩ
IOUTx ≥ 90% of
(kLT(typ)/RSET)
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Power Stage
Electrical Characteristics Power Stage (cont’d)
Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40°C to +150°C, VOUTx = 3.6 V, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output
pins (O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
9.2.8
Maximum output current
IOUT(max)
120
–
–
mA
RSET = 4.7 kΩ
The maximum output
current is limited by the
thermal conditions.
Please refer to
Pos. 4.3.1 - Pos. 4.3.3
9.2.9
ST turn on time
tON(ST)
–
–
15
µs
2)
VS = 13.5 V
RSET = 12 kΩ
ST → L
IOUTx = 80% of
(kLT(typ)/RSET)
9.2.10
ST turn off time
tOFF(ST)
–
–
10
µs
2)
VS = 13.5 V
RSET = 12 kΩ
ST →H
IOUTx = 20% of
(kLT(typ)/RSET)
9.2.11
IN_SET turn on time
tON(IN_SET)
–
–
15
µs
VS = 13.5 V
IIN_SET = 0 → 100 µA
IOUTx = 80% of
(kLT(typ)/RSET)
9.2.12
IN_SET turn off time
tOFF(IN_SET)
–
–
10
µs
VS = 13.5 V
IIN_SET = 100 → 0 µA
IOUTx = 20% of
(kLT(typ)/RSET)
9.2.13
VS turn on time
tON(VS)
–
–
20
µs
1) 3)
9.2.14
Current reduction
temperature threshold
Tj(CRT)
–
140
–
°C
1)
IOUTx = 95% of
(kLT(typ)/RSET)
–
A
1)
9.2.15
Output current during
IOUT(CRT)
85% of –
current reduction at high
(kLT(typ)
temperature
/RSET)
1) Not subject to production test, specified by design
2) see also Figure 14
3) see also Figure 6
Data Sheet
25
VEN = 5.5 V
RSET = 12 kΩ
VS = 0 → 13.5 V
IOUTx = 80% of
(kLT(typ)/RSET)
RSET = 12 kΩ
Tj = 150 °C
Rev. 1.2
2018-04-26
LITIX™ Basic
TLD1313EL
Application Information
10
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
Vbat
BCM
PROFET
supply
logic
charge pump
open load
detection
ESD
protection
temperature
sensor
nnel 2
control and protection circuit
VBATT
Cmod =2.2µF
CVS =4.7nF
CVS =4.7nF
VS
10k
ISO-Pulse
protection circuit
depending on
requirements
EN
EN
Thermal
protection
CVS =4.7nF
VS
10k
Internal
supply
Output
control
4.7nF** 4.7nF** 4.7nF**
Thermal
protection
OUT3
EN
Output
control
R SET
TLD1313EL
GND
Output
control
4.7nF** 4.7nF** 4.7nF**
OUT3
OUT2
OUT1
IN_SET
St atus
ST
Thermal
protection
OUT2
OUT1
Current
adjust
Internal
supply
4.7nF** 4.7nF** 4.7nF**
OUT3
OUT2
IN_SET
VS
10k
Internal
supply
R SET
TLD1313EL
OUT1
IN_SET
Current
adjust
Status
ST
GND
RSET
Current
adjust
TLD1313EL
VZD >VOUT(CC)
Status
ST
GND
R
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