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EUP7559-3.3JIR1

EUP7559-3.3JIR1

  • 厂商:

    EUTECH(德信)

  • 封装:

  • 描述:

    EUP7559-3.3JIR1 - Low Noise Dual 300mA LDO with Independent Shutdown - Eutech Microelectronics Inc

  • 数据手册
  • 价格&库存
EUP7559-3.3JIR1 数据手册
EUP7559 Low Noise Dual 300mA LDO with Independent Shutdown DESCRIPTION The EUP7559 is a dual low dropout linear regulator capable of sourcing 300mA current per regulator. The EUP7559 is stable with small ceramic output capacitors. The performance of EUP7559 is optimized for battery power systems to deliver low noise, low dropout voltage, low quiescent current and excellent line and load transient response. The EUP7559 is available in fixed output voltages in the 8-pin 3mm×3mm TDFN leadless package. FEATURES Input Voltage Range: 2.5V to 6V 300mA Output Current per LDO Low Dropout Voltage of 55mV@100mA Low Quiescent Current of 115µA per LDO High PSRR 70dB at 1kHz Low Output Noise Thermal Shutdown Protection Current Limit Protection Separate Enable pin per LDO Stable with Ceramic Output Capacitor 1.5V to 3.3V Pre-set Output 3mm×3mm TDFN-8 Package RoHS Compliant and 100% Lead (Pb)-Free APPLICATIONS Cellular Phones PDAs and Palmtop Computers Wireless LAN Cards Hand-Held Instruments Typical Application DS7559 Ver 1.0 May. 2007 1 EUP7559 Block Diagram DS7559 Ver 1.0 May. 2007 2 EUP7559 Pin Configurations Package Type Pin Configurations TDFN-8 Pin Description PIN INA ENA Pin 1 2 DESCRIPTION LDO A Regulator Input. Connect to INB. Input voltage can range from 2.5V to 6V. Bypass INA with a ceramic capacitor to GND. Shutdown A Input. A logic-low on ENA shuts down regulator A. If ENA and ENB are both low, both regulators and the internal reference are off and the supply current is reduced to 10nA (typ). If either ENA or ENB is a logic high, the internal reference is on. Connect ENA to INA for always-on operation of regulator A. Shutdown B Input. A logic-low on ENB shuts down regulator B. If ENA and ENB are both low, both regulators and the internal reference are off and the supply current is reduced to 10nA (typ). If either ENA or ENB is a logic high, the internal reference is on. Connect ENB to INB for always-on operation of regulator B. LDO B Regulator Input. Connect to INA. Input voltage can range from 2.5V to 6V. Bypass INB with a ceramic capacitor to GND. Regulator B Output. OUTB can source up to 300mA continuous current. Bypass OUTB with a ceramic capacitor to GND. During shutdown, OUTB is internally discharged to GND through a 300Ω. resistor. Ground. Reference Noise Bypass. Bypass BP with a low-leakage 0.01µF ceramic capacitor for reduced noise at both outputs. Regulator A Output. OUTA can source up to 300mA continuous current. Bypass OUTA with a ceramic capacitor to GND. During shutdown, OUTA is internally discharged to GND through a 300Ω. resistor. ENB INB OUTB GND BP OUTA 3 4 5 6 7 8 DS7559 Ver 1.0 May. 2007 3 EUP7559 Ordering Information Order Number EUP7559-1.5/1.5JIR1 EUP7559-1.5/2.8JIR1 EUP7559-1.8/2.8JIR1 EUP7559-1.8/3.3JIR1 EUP7559-1.85/1.5JIR1 EUP7559-2.5/2.8JIR1 EUP7559-2.85/1.8JIR1 EUP7559-2.85/1.85JIR1 EUP7559-2.85/2.85JIR1 EUP7559-3.15/2.8JIR1 EUP7559-3.3/2.85JIR1 EUP7559-3.3/3.0JIR1 Package Type TDFN-8 TDFN-8 TDFN-8 TDFN-8 TDFN-8 TDFN-8 TDFN-8 TDFN-8 TDFN-8 TDFN-8 TDFN-8 TDFN-8 Marking XXXXX Operating Temperature range -40 °C to 125°C -40 °C to 125°C -40 °C to 125°C -40 °C to 125°C -40 °C to 125°C -40 °C to 125°C -40 °C to 125°C -40 °C to 125°C -40 °C to 125°C -40 °C to 125°C -40 °C to 125°C -40 °C to 125°C 7559-V XXXXX 7559-C XXXXX 7559-A XXXXX 7559-H XXXXX 7559-a XXXXX 7559-D XXXXX 7559-b XXXXX 7559-X XXXXX 7559-G XXXXX 7559-Z XXXXX 7559-W XXXXX 7559-Y EUP7559 □□□/□□□ □ □ □ □ Lead Free Code 1: Lead Free 0: Lead Packing R: Tape & Reel Operating temperature range I: Industry Standard Package Type J: TDFN Output Voltage Option DS7559 Ver 1.0 May. 2007 4 EUP7559 Absolute Maximum Ratings VIN,VEN ------------------------------------------------------------------------------- -0.3V to 6.5V Power Dissipation (PD) ------------------------------------------------------ Internally Limited Junction Temperature ------------------------------------------------------ -40°C to +125°C Storage Temperature ------------------------------------------------------ -65°C to +150°C Lead Temp -----------------------------------------------------------------------------260°C Operating Ratings VIN --------------------------------------------------------------------------------------- 2.5 to 6V VEN -------------------------------------------------------------------------------------- 0V to 6V Junction Temperature ---------------------------------------------------------------150°C Thermal Resistance θJA(TDFN-8) --------------------------------------------------- 60°C/W Electrical Characteristics VIN=3.8V, VENA=VENB=VIN, Io=10mA. CIN=COUT=2.2uF, TA= -40°C ~85°C. Parameter Symbol Conditions Input Voltage Range VIN Undervoltage-Lockout VIN Rising , hysteresis is 40mV(typ) VUVLO Threshold TA=25℃, IOUT1=IOUT2=1mA TA=-40℃ to 85℃, IOUT1=IOUT2=1mA Output Voltage Accuracy Vo TA=-40℃ to 85℃, IOUT1or IOUT2=0.1mA to 300mA Maximum Output Current IOUT Output Current Limit ILIM No Load Ground Current IQ No Load, one LDO Shutdown IOUT1=IOUT2= 100mA IOUT=1mA Dropout Voltage VIN-VOUT IOUT=100mA Line Regulation VLNR VIN=(Vo+0.1)V to 6V, IOUT=1mA 100Hz to 100kHz, COUT=10uF, IOUT=1mA, CBP=0.01uF Output Voltage Noise 100Hz to 100kHz, COUT=10uF, IOUT=1mA, CBP=not installed COUT=2.2uF,IOUT=50mA,CBP=0.01uF, f=1kHz Power Supply COUT=2.2uF,IOUT=50mA,CBP=0.01uF, PSRR Ripple Rejection f=10kHz COUT=2.2uF,IOUT=50mA,CBP=0.01uF, f=100kHz VEN=0, TA=25℃ Shutdown Supply Current ISHDN TA=-40℃ to 85℃ VIH Input high voltage Enable Input Threshold VIL Input low voltage VEN=0 or IN, TA=25℃ Enable Input Bias Current TA=-40℃ to 85℃ VOUT Discharge VEN=0 Resistance in Shutdown Thermal Shutdown TJ Rising TSHDN Temperature Thermal Shutdown ∆TSHDN Hysteresis Output Capacitor COUT IOUT=0 to 300mA DS7559 Ver 1.0 May. 2007 Min 2.5 2.15 -1.5 -2.5 -3 300 320 Typ 2.3 Max 6 2.45 1.5 2.5 3 Units V V % mA mA µA -0.15 500 180 115 240 0.6 55 0.02 35 780 280 110 0.15 mV %V µVrms 124 70 60 46 0.01 0.1 1.6 0.1 1 300 160 ℃ 15 2.2uF 0.4 10 1 µA V nA Ω dB 5 EUP7559 Typical Operating Characteristics Unless otherwise specified, CIN=COUT=2.2uF, CBP=0.01uF, VIN=3.8V, VENA=VENB=VIN, Io=10mA, VOUTA=VOUTB=2.85V. DS7559 Ver 1.0 May. 2007 6 EUP7559 Typical Operating Characteristics (continued) Unless otherwise specified, CIN=COUT=2.2uF, CBP=0.01uF, VIN=3.8V, VENA=VENB=VIN, Io=10mA, VOUTA=VOUTB=2.85V. Overcurrent Protection 3.0 2.5 Output Voltage (V) 2.0 1.5 1.0 0.5 0.0 0 100 200 300 400 500 Output Current(mA) DS7559 Ver 1.0 May. 2007 7 EUP7559 Typical Operating Characteristics (continued) Unless otherwise specified, CIN=COUT=2.2uF, CBP=0.01uF,VIN=3.8V, VENA=VENB=VIN, Io=10mA, VOUTA=VOUTB=2.85V. DS7559 Ver 1.0 May. 2007 8 EUP7559 Application Note The EUP7559 is a high performance, low quiescent current power management IC consisting of two µCap low dropout regulators. The first regulator is capable of sourcing 300mA at output voltages from 1.5V to 3.3V. The second regulator is capable of sourcing 300mA of current at output voltages from 1.5V to 3.3V. These outputs are stable with 2.2uF output capacitor at any load. Enable A and B The enable inputs allow for logic control of both output voltages with individual enable inputs. The EUP7559 is turned off by pulling the VEN pin low, and turned on by pulling it high. If this feature is not used, the VEN pin should be tied to VIN to keep the regulator output on at all time. To assure proper operation, the signal source used to drive the VEN input must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under VIL and VIH. External Capacitors Like any low-dropout regulator, the EUP7559 requires external capacitors for regulator stability. The EUP7559 is specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance. Input Capacitor An input capacitance of ≈ 2.2µF or greater is required between the EUP7559 input pin and ground (the amount of the capacitance may be increased without limit). This capacitor must be located a distance of not more than 1cm from the input pin and returned to a clean analog ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input. Output Capacitor The EUP7559 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor (temperature characteristics X7R, X5R, Z5U, or Y5V) in 2.2µF to 22µF range with 5mΩ to 500mΩ ESR range is suitable in the EUP7559 application circuit. The output capacitor must meet the requirement for minimum amount of capacitance and also have an ESR (Equivalent Series Resistance) value which is within a stable range (5mΩ to 500mΩ) No-Load Stability The EUP7559 will remain stable and in regulation with no external load. This is specially important in CMOS RAM keep-alive applications. Capacitor Characteristics The EUP7559 is designed to work with ceramic capacitors on the output ceramic capacitors are the smallest, least expensive and have the lowest ESR values (which makes them best for eliminating high frequency noise). The ESR of a typical 2.2µF ceramic capacitor is in the range of 10mΩ to 40mΩ, which easily meets the ESR requirement for stability by the EUP7559. The ceramic capacitor’s capacitance can vary with temperature. The capacitor type X7R, which operates over a temperature range of -55°C to +125°C, will only vary the capacitance to within ±15%. Most large value ceramic capacitors ( ≈ 2.2µF) are manufactured with Z5U or Y5V temperature characteristics. Their capacitance can drop by more than 50% as the temperature goes from 25°C to 85°C. Therefore, X7R is recommended over Z5U and Y5V in applications where the ambient temperature will change significantly above or below 25°C. Noise Bypass Capacitor Connecting a 0.01µF capacitor between the BP pin and ground significantly reduces noise on the regulator output. This cap is connected directly to a high impedance node in the bandgap reference circuit. Any significant loading on this node will cause a change on the regulated output voltage. For this reason, DC leakage current through this pin must be kept as low as possible for best output voltage accuracy. The types of capacitors best suited for the noise bypass capacitor are ceramic and film. Unlike many other LDO’s, addition of a noise reduction capacitor does not effect the load transient response of the device. DS7559 Ver 1.0 May. 2007 9 EUP7559 Packaging Information TDFN-8 DETAIL A SYMBOLS A A1 b D D1 E E1 e L MILLIMETERS MIN. MAX. 0.70 0.80 0.00 0.05 0.20 0.40 2.90 3.10 2.30 2.90 3.10 1.50 0.65 0.25 0.45 INCHES MIN. 0.028 0.000 0.008 0.114 0.090 0.114 0.059 0.026 0.010 0.018 0.122 MAX. 0.031 0.002 0.016 0.122 DS7559 Ver 1.0 May. 2007 10
EUP7559-3.3JIR1 价格&库存

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