0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
74VHC245M

74VHC245M

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    74VHC245M - Octal Bidirectional Transceiver with 3-STATE Outputs - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
74VHC245M 数据手册
74VHC245 Octal Bidirectional Transceiver with 3-STATE Outputs November 1992 Revised April 2005 74VHC245 Octal Bidirectional Transceiver with 3-STATE Outputs General Description The VHC245 is an advanced high speed CMOS octal bus transceiver fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The VHC245 is intended for bidirectional asynchronous communication between data busses. The direction of data transmission is determined by the level of the T/R input. The enable input can be used to disable the device so that the busses are effectively isolated. All inputs are equipped with protection circuits against static discharge. Features s High Speed: tPD 4.0 ns (typ) at VCC VNIL 5V s High Noise Immunity: VNIH s Low Noise: VOLP 28% VCC (Min) s Power Down Protection is provided on all inputs 0.9V (typ) 25qC s Low Power Dissipation: ICC 4 PA (Max) @ TA s Pin and Function Compatible with 74HC245 Ordering Code: Order Number 74VHC245M 74VHC245SJ 74VHC245MTC 74VHC245N Package Number M20B M20D MTC20 N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Logic Symbol IEEE/IEC Connection Diagram Pin Description Pin Names OE T/R A0–A7 B0–B7 Output Enable Input Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs Description Truth Table Inputs OE L L H T/R L H X Bus B Data to Bus A Bus A Data to Bus B HIGH-Z State Outputs H HIGH Voltage Level L LOW Voltage Level X Immaterial Any unused bus terminals during HIGH-Z State must be held HIGH or LOW. © 2005 Fairchild Semiconductor Corporation DS011520 www.fairchildsemi.com 74VHC245 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Voltage (VIN) (T/R, OE) DC Output Voltage (VOUT) Input Diode Current (IIK) (T/R, OE) Output Diode Current (IOK) DC Output Current (IOUT ) DC VCC/GND Current (ICC) Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 260qC 0.5V to 7.0V 0.5V to 7.0V 0.5V to VCC  0.5V 20 mA r20 mA r25 mA r75 mA 65qC to 150qC Recommended Operating Conditions (Note 2) Supply Voltage (VCC) Input Voltage (VIN)(T/R, OE) Output Voltage (VOUT) Operating Temperature (TOPR) Input Rise and Fall Time (tr, tf) VCC VCC 3.3V r 0.3V 5.0V r 0.5V 0 a 100 ns/V 0 a 20 ns/V 2.0V to 5.5V 0V to 5.5V 0V to VCC 40qC to 85qC Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. Note 2: Unused inputs or I/O pins must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH VIL VOH Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage VCC (V) 2.0 3.0  5.5 2.0 3.0  5.5 2.0 3.0 4.5 3.0 4.5 VOL LOW Level Output Voltage 2.0 3.0 4.5 3.0 4.5 IOZ 3-STATE Output Off-State Current IIN (T/R, OE) ICC Input Leakage Current Quiescent Supply Current 5.5 4.0 40.0 5.5 0  5.5 1.9 2.9 4.4 2.58 3.94 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 2.0 3.0 4.5 Min 1.50 0.7 VCC 0.50 0.3 VCC 1.9 2.9 4.4 2.48 3.80 0.1 0.1 0.1 0.44 0.44 V VIN IOL IOL VOUT VIN OE VIN VIN 4 mA 8 mA V V VIN IOH IOH VIH IOL or VIL V TA 25qC Typ Max TA 40qC to 85qC Max Min 1.50 0.7 VCC Units V Conditions 0.50 0.3 VCC V VIN VIH IOH or VIL 50 PA 4 mA 8 mA 50 PA VCC or GND VCC or GND VIH or VIL 5.5V or GND VCC or GND r0.25 r0.1 r2.5 r1.0 PA PA PA www.fairchildsemi.com 2 74VHC245 Noise Characteristics Symbol VOLP (Note 3) VOLV (Note 3) VIHD (Note 3) VILD (Note 3) Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Input Voltage Maximum LOW Level Dynamic Input Voltage 5.0 1.5 V CL 50 pF 5.0 3.5 V CL 50 pF 5.0 VCC (V) 5.0 TA Typ 0.9 2 5 qC Limits 1.2 Units V V CL CL 50 pF 50 pF Conditions 0.9 1.2 Note 3: Parameter guaranteed by design. AC Electrical Characteristics Symbol tPLH tPHL Parameter Propagation Delay Time 5.0 r 0.5 tPZL tPZH 3-STATE Output Enable Time 5.0 r 0.5 tPLZ tPHZ tOSLH tOSHL CIN (T/R, OE) CI/O CPD Output Capacitance Power Dissipation Capacitance Note 4: Parameter guaranteed by design. tOSLH |tPLH max  tPLH min|; t OSHL |tPHL max  tPHL min| Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) CPD * VCC * fIN  I CC/8 (per Bit). VCC (V) 3.3 r 0.3 Min TA 2 5 qC Typ 5.8 8.3 4.0 5.5 8.5 11.0 5.8 7.3 11.5 7.0 Max 8.4 11.9 5.5 7.5 13.2 16.7 8.5 10.6 15.8 9.7 1.5 1.0 4 8 21 10 TA 40qC to 85qC Max 10.0 13.5 6.5 8.5 15.5 19.0 10.0 12.0 18.0 11.0 1.5 1.0 10 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Min Units ns ns ns RL ns ns ns pF pF pF RL Conditions CL CL CL CL CL 1 k: CL CL CL 1 k: CL CL CL CL 15 pF 50 pF 15 pF 50 pF 15 pF 50 pF 15 pF 50 pF 50 pF 50 pF 50 pF 50 pF 3.3 r 0.3 3-STATE Output Disable Time Output to Output Skew Input Capacitance 3.3 r 0.3 5.0 r 0.5 3.3 r 0.3 5.0 r 0.5 (Note 4) VCC VCC Open 5.0V (Note 5) 3 www.fairchildsemi.com 74VHC245 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B www.fairchildsemi.com 4 74VHC245 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com 74VHC245 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 www.fairchildsemi.com 6 74VHC245 Octal Bidirectional Transceiver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com
74VHC245M 价格&库存

很抱歉,暂时无法提供与“74VHC245M”相匹配的价格&库存,您可以联系我们找货

免费人工找货