FDMS8460 N-Channel Power Trench® MOSFET
January 2008
FDMS8460
N-Channel Power Trench MOSFET
40V, 49A, 2.2mΩ
Features
Max rDS(on) = 2.2mΩ at VGS = 10V, ID = 25A Max rDS(on) = 3.0mΩ at VGS = 4.5V, ID = 21.7A Advanced Package and Silicon combination for low rDS(on) MSL1 robust package design 100% UIL tested RoHS Compliant
®
tm
General Description
This N-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced Power Trench® process thant has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance.
Application
DC - DC Conversion
Top
Bottom S Pin 1 S D S G D D D D D D D 5 6 7 8 4 3 2 1 G S S S
Power 56
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol VDS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous (Package limited) ID -Continuous (Silicon limited) -Continuous -Pulsed EAS PD TJ, TSTG Single Pulse Avalanche Energy Power Dissipation Power Dissipation TC = 25°C TA = 25°C (Note 1a) (Note 3) TC = 25°C TC = 25°C TA = 25°C (Note 1a) Ratings 40 ±20 49 167 25 160 864 104 2.5 -55 to +150 mJ W °C A Units V V
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJC RθJA Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient (Note 1a) 1.2 50 °C/W
Package Marking and Ordering Information
Device Marking FDMS8460 Device FDMS8460 Package Power 56 Reel Size 13’’ Tape Width 12 mm Quantity 3000 units
©2008 Fairchild Semiconductor Corporation FDMS8460 Rev.C
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FDMS8460 N-Channel Power Trench® MOSFET
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS ∆BVDSS ∆TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250µA, VGS = 0V ID = 250µA, referenced to 25°C VGS = 0V, VDS = 32V, VGS = ±20V, VDS = 0V 40 32 1 ±100 V mV/°C µA nA
On Characteristics
VGS(th) ∆VGS(th) ∆TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Static Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = 250µA ID = 250µA, referenced to 25°C VGS = 10V, ID = 25A VGS = 4.5V, ID = 21.7A VGS = 10V, ID = 25A, TJ = 125°C VDD = 5V, ID = 25A 1.0 1.9 -7.5 2.0 2.6 2.6 137 2.2 3.0 3.3 S mΩ 3.0 V mV/°C
Dynamic Characteristics
Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 20V, VGS = 0V, f = 1MHz f = 1MHz 5415 1470 170 1.4 7205 1955 250 pF pF pF Ω
Switching Characteristics
td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Charge Gate to Drain “Miller” Charge VGS = 0V to 10V VGS = 0V to 4.5V VDD = 20V, ID = 25A VDD = 20V, ID = 25A, VGS = 10V, RGEN = 6Ω 19 9 48 7 78 36 15 10 35 19 78 14 110 51 ns ns ns ns nC nC nC nC
Drain-Source Diode Characteristics
VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 25A VGS = 0V, IS = 2.1A IF = 25A, di/dt = 100A/µs (Note 2) (Note 2) 0.8 0.7 53 40 1.3 1.2 85 64 V ns nC
NOTES: 1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a. 50°C/W when mounted on a 1 in2 pad of 2 oz copper.
b. 125°C/W when mounted on a minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%. 3. Starting TJ = 25°C, L = 3mH, IAS = 24A, VDD = 40V, VGS = 10V
©2008 Fairchild Semiconductor Corporation FDMS8460 Rev.C
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FDMS8460 N-Channel Power Trench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
160
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 4V ID, DRAIN CURRENT (A) VGS = 3.5V VGS = 4.5V PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
5
VGS = 3V PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
120
VGS = 10V
4
VGS = 3.5V
3
80
2
VGS = 4V
VGS = 4.5V
40
VGS = 3V
1
0.5 0
VGS = 10V
0 0 1 2 3
VDS, DRAIN TO SOURCE VOLTAGE (V)
40 80 ID, DRAIN CURRENT(A)
120
160
Figure 1. On-Region Characteristics
Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage
10
SOURCE ON-RESISTANCE (mΩ)
1.8
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
1.6 1.4 1.2 1.0 0.8 0.6 -75
ID = 25A VGS = 10V
ID = 25A
PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
8 6 4 2
TJ = 25oC TJ = 125oC
rDS(on), DRAIN TO
-50
-25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC)
0 2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On- Resistance vs Junction Temperature
160
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
Figure 4. On-Resistance vs Gate to Source Voltage
800
VGS = 0V
100 10 1 0.1
TJ = -55oC TJ = 150oC TJ = 25oC
ID, DRAIN CURRENT (A)
120
VDS = 5V TJ = 150oC
80
TJ = 25oC
40
TJ = -55oC
0.01 1E-3 0.0
0 0 1 2 3 4 5
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs Source Current
©2008 Fairchild Semiconductor Corporation FDMS8460 Rev.C
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FDMS8460 N-Channel Power Trench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
10
VGS, GATE TO SOURCE VOLTAGE(V) ID = 25A VDD = 15V
10000
8
VDD = 20V CAPACITANCE (pF)
Ciss
6 4 2 0 0 20 40
Qg, GATE CHARGE(nC)
1000
Coss
VDD = 25V
100
f = 1MHz VGS = 0V
Crss
60
80
30 0.1
1
10
40
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain to Source Voltage
200
ID, DRAIN CURRENT (A)
40
IAS, AVALANCHE CURRENT(A)
150
VGS = 10V
10
TJ = 25oC
100
VGS = 4.5V
TJ = 125oC
50
Limited by Package RθJC = 1.2 C/W
o
1 0.01
0.1
1
10
100
1000
0 25
50
75
100
o
125
150
tAV, TIME IN AVALANCHE(ms)
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive Switching Capability
400
P(PK), PEAK TRANSIENT POWER (W)
Figure 10. Maximum Continuous Drain Current vs Case Temperature
1000
VGS = 10V
SINGLE PULSE RθJA = 125oC/W TA = 25oC
100
ID, DRAIN CURRENT (A)
10
THIS AREA IS LIMITED BY rDS(on)
1ms 10ms
100
1
100ms 1s 10s DC
10
0.1
SINGLE PULSE TJ = MAX RATED RθJA = 125 C/W TA = 25oC
o
1 0.5 -3 10 10
-2
0.01 0.01
0.1
1
10
100 200
10
-1
1
10
100
1000
VDS, DRAIN to SOURCE VOLTAGE (V)
t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum Power Dissipation
©2008 Fairchild Semiconductor Corporation FDMS8460 Rev.C
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FDMS8460 N-Channel Power Trench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
2
1
NORMALIZED THERMAL IMPEDANCE, ZθJA
DUTY CYCLE-DESCENDING ORDER
0.1
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
t1
0.01
SINGLE PULSE RθJA = 125 C/W
o
t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA
1E-3 -3 10
10
-2
10
-1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Transient Thermal Response Curve
©2008 Fairchild Semiconductor Corporation FDMS8460 Rev.C
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FDMS8460 N-Channel Power Trench® MOSFET
Dimensional Outline and Pad Layout
©2008 Fairchild Semiconductor Corporation FDMS8460 Rev.C
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FDMS8460 N-Channel Power Trench® MOSFET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended to be an exhaustive list of all such trademarks. ACEx® Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EZSWITCH™ *
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Fairchild® Fairchild Semiconductor® FACT Quiet Series™ FACT® FAST® FastvCore™ FlashWriter® *
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®
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PDP-SPM™ Power220® POWEREDGE® Power-SPM™ PowerTrench® Programmable Active Droop™ QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ SMART START™ SPM® STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8
SupreMOS™ SyncFET™ ® The Power Franchise®
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TinyBoost™ TinyBuck™ TinyLogic® TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ µSerDes™ UHC® Ultra FRFET™ UniFET™ VCX™
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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only.
Rev. I33
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
©2008 Fairchild Semiconductor Corporation FDMS8460 Rev.C
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