FDMS8460

FDMS8460 MOSFET, N‐Channel, POWERTRENCH) 40 V, 49 A, 2.2 mW General Description This N−Channel MOSFET is produced using ON Semiconductor’s advanced POWERTRENCH® process that has been especially tailored to minimize the on−state resistance and yet maintain superior switching performance. Features • • • • • • Max rDS(on) = 2.2 mW at VGS = 10 V, ID = 25 A Max rDS(on) = 3.0 mW at VGS = 4.5 V, ID = 21.7 A Advanced Package and Silicon combination for low rDS(on) MSL1 robust package design 100% UIL tested RoHS Compliant www.onsemi.com S D S D S D G D N-Channel MOSFET Bottom S Top Applications • DC−DC Conversion D MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Parameter Symbol Value Unit VDS Drain to Source Voltage 40 V VGS Gate to Source Voltage ±20 V Drain Current: − Continuous (Package limited) TC = 25°C − Continuous (Silicon limited) TC = 25°C − Continuous TA = 25°C (Note 1a) − Pulsed 49 167 25 160 ID EAS Single Pulse Avalanche Energy (Note 3) 864 PD Power Dissipation: TC = 25°C TA = 25°C (Note 1a) 104 2.5 TJ, TSTG Operating and Storage Junction Temperature Range D D Pin 1 S S G D Power 56 (PQFN8) CASE 483AE A MARKING DIAGRAM S mJ S W S G −55 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. $Y &Z &3 &K FDMS8460 D $Y&Z&3&K FDMS 8460 D D D = ON Semiconductor Logo = Assembly Plant Code = Data Code (Year & Week) = Lot = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2012 November, 2018 − Rev. 3 1 Publication Order Number: FDMS8460/D FDMS8460 PACKAGE MARKING AND ORDERING INFORMATION Device Marking Device Package Quantity FDMS8460 FDMS8460 Power 56 (PQFN8) (Pb-Free / Halogen Free) 3000/Tape&Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. THERMAL CHARACTERISTICS Symbol Parameter Value Unit °C/W RqJC Thermal Resistance, Junction to Case 1.2 RqJA Thermal Resistance, Junction to Ambient (Note 1a) 50 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Parameter Test Condition Min Typ Max Unit OFF CHARACTERISTICS Drain to Source Breakdown Voltage ID = 250 mA, VGS = 0 V DBVDSS /DTJ Breakdown Voltage Temperature Coefficient ID = 250 mA, referenced to 25°C IDSS Zero Gate Voltage Drain Current VDS = 80 V, VGS = 0 V 1 mA IGSS Gate to Source Leakage Current, Forward VGS = ±20 V, VDS = 0 V ±100 nA 3.0 V BVDSS 40 V 32 mV/°C ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 mA DVGS(th) /DTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 mA, referenced to 25°C −7.5 Static Drain to Source On Resistance VGS = 10 V, ID = 25 A 2.0 2.2 VGS = 4.5 V, ID = 21.7 A 2.6 3.0 VGS = 10 V, ID = 25 A, TJ = 125°C 2.6 3.3 VDS = 5 V, ID = 25 A 137 VDS = 20 V, VGS = 0 V, f = 1 MHz 5415 7205 pF rDS(on) gFS Forward Transconductance 1.0 1.9 mV/°C mW S DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance 1470 1955 pF Crss Reverse Transfer Capacitance 170 250 pF 1.4 3.1 W 19 35 ns 9 19 ns Turn-Off Delay Time 48 78 ns Fall Time 7 14 ns VGS = 0 V to 10 V, VDD = 20 V, ID = 25 A 78 110 nC VGS = 0 V to 4.5 V, VDD = 20 V, ID = 25 A 36 51 nC VDD = 20 V, ID = 25 A 15 nC 10 nC Rg Gate Resistance f = 1MHz 0.1 SWITCHING CHARACTERISTICS td(on) tr td(off) tf Qg Turn-On Delay Time Rise Time Total Gate Charge Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge VDD = 20 V, ID = 25 A, VGS = 10 V, RGEN = 6 W www.onsemi.com 2 FDMS8460 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued) Symbol Parameter Test Condition Min Typ Max Unit VGS = 0 V, IS = 25 A (Note 2) 0.8 1.3 V VGS = 0 V, IS = 25 A (Note 2) 0.7 1.2 IF = 25 A, di/dt = 100 A/ms 53 85 ns 40 64 nC DRAIN-SOURCE DIODE CHARACTERISTICS VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. RqJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. RqCA is determined by the user’s board design. NOTES: a. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper. b. 125 °C/W when mounted on a minimum pad of 2 oz copper. 2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%. 3. Starting TJ = 25°C, L = 0.3 mH, IAS = 24 A, VDD = 40 V, VGS = 10 V TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) 160 NORMALIZED DRAIN TO SOURCE ON−RESISTANCE 5 ID , DRAIN CURRENT (A) VGS = 4V VGS = 3.5V 120 VGS = 4.5V VGS = 10V 80 PULSE DURATION = 80ms DUTY CYCLE = 0.5%MAX 40 VGS = 3V 0 0 1 2 3 VDS , DRAIN TO SOURCE VOLTAGE (V) PULSE DURATION = 80ms DUTY CYCLE = 0.5%MAX VGS = 3V 4 VGS = 3.5V 3 2 VGS = 4V 1 0.5 0 VGS =4.5V VGS =10V 40 80 120 ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics Figure 2. Normalized On−Resistance vs. Drain Current and Gate Voltage www.onsemi.com 3 160 FDMS8460 TYPICAL CHARACTERISTICS (continued) (TJ = 25°C unless otherwise noted) 10 1.6 ID = 25A VGS = 10V ID = 25A r DS(on) , DRAIN TO SOURCE ON−RESISTANCE(mW) NORMALIZED DRAIN TO SOURCE ON−RESISTANCE 1.8 1.4 1.2 1.0 0.8 0.6 −75 −50 −25 0 25 50 8 6 4 TJ = 125oC 2 TJ = 25oC 0 75 100 125 150 2 4 TJ, JUNCTION TEMPERATURE (5C) I S , REVERSE DRAIN CURRENT (A) I D , DRAIN CURRENT (A) 800 VDS = 5V TJ = 150 oC 80 TJ = 25oC 40 TJ = −55 oC 0 0 1 2 3 4 5 VGS , GATE TO SOURCE VOLTAGE (V) VGS = 0V 10 TJ = 150oC 1 TJ = 25oC 0.1 TJ = −55oC 0.01 1E−3 0.0 0.2 0.4 0.6 0.8 1.0 1.2 V SD , BODY DIODE FORWARD VOLTAGE (V) Figure 6. Source to Drain Diode Forward Voltage vs. Source Current 10 10000 ID = 25A VDD = 15V 8 CAPACITANCE (pF) VGS , GATE TO SOURCE VOLTAGE (V) 10 100 Figure 5. Transfer Characteristics VDD = 20V 6 VDD = 25V 4 2 0 8 Figure 4. On−Resistance vs. Gate to Source Voltage PULSE DURATION = 80ms DUTY CYCLE = 0.5%MAX 120 6 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs. Junction Temperature 160 PULSE DURATION = 80ms DUTY CYCLE = 0.5%MAX Ciss 1000 Coss 100 Crss f = 1MHz VGS = 0V 0 20 40 60 30 0.1 80 Qg , GATE CHARGE (nC) 1 10 V DS , DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs. Drain to Source Voltage www.onsemi.com 4 40 FDMS8460 TYPICAL CHARACTERISTICS (continued) (TJ = 25°C unless otherwise noted) 200 10 ID , DRAIN CURRENT (A) IAS , AVALANCHE CURRENT (A) 40 TJ = 25oC TJ = 125oC 150 VGS = 10V 100 VGS = 4.5V 50 o Limited by Package 1 0.01 0.1 1 10 100 0 25 1000 50 Figure 9. Unclamped Inductive Switching Capability P(PK), PEAK TRANSIENT POWER (W) ID , DRAIN CURRENT (A) 100 1ms 10 10ms THIS AREA IS LIMITED BY rDS(on) 0.01 0.01 100ms SINGLE PULSE TJ = MAX RATED 1s Rs JA = 125 o C/W 10s TA = 25oC DC 0.1 1 100 125 150 Figure 10. Maximum Continuous Drain Current vs. Case Temperature 400 0.1 75 Tc , CASE TEMPERATURE ( oC) tAV , TIME IN AVALANCHE (ms) 1 Rs JC = 1.2 C/W 10 100 200 1000 VGS = 10V SINGLE PULSE Rs JA = 125oC/W TA = 25oC 100 10 1 0.5 −3 10 −2 10 −1 10 1 10 100 1000 t, PULSE WIDTH (sec) VDS , DRAIN to SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area Figure 12. Single Pulse Maximum Power Dissipation 2 NORMALIZED THERMAL IMPEDANCE,ZsJA 1 0.1 DUTY CYCLE−DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.01 t2 SINGLE PULSE NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x Z s JA x R s JA + TA o Rs JA = 125 C/W 1E−3 −3 10 −2 10 −1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Transient Thermal Response Curve POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and or other countries. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS PQFN8 5X6, 1.27P CASE 483AE ISSUE A DOCUMENT NUMBER: DESCRIPTION: 98AON13655G PQFN8 5X6, 1.27P DATE 27 SEP 2017 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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