April 1999
FDN359AN N-Channel Logic Level PowerTrenchTM MOSFET
General Description
This N-Channel Logic Level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required.
Features
2.7 A, 30 V. RDS(ON) = 0.046 Ω @ VGS = 10 V RDS(ON) = 0.060 Ω @ VGS = 4.5 V. Very fast switching. Low gate charge (5nC typical). High power version of industry standard SOT-23 package. Identical pin out to SOT-23 with 30% higher power handling capability.
SOT-23
SuperSOTTM -6
SuperSOTTM -8
SO-8
SOT-223
SOIC-16
D
D
9A 35
S
SuperSOT -3
TM
G
G
S
Absolute Maximum Ratings
Symbol Parameter
TA = 25oC unless other wise noted
Ratings Units
VDSS VGSS ID PD TJ,TSTG RθJA RθJC
Drain-Source Voltage Gate-Source Voltage Maximum Drain Current - Continuous - Pulsed Maximum Power Dissipation
(Note 1a) (Note 1b) (Note 1a)
30 ±20 2.7 15 0.5 0.46 -55 to 150
V V A
W
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
250 75
°C/W °C/W
© 1999 Fairchild Semiconductor Corporation
FDN359AN Rev.C
Electrical Characteristics (TA = 25 OC unless otherwise noted )
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current
VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25 C VDS = 24 V, VGS = 0 V TJ = 55°C VGS = 20 V,VDS = 0 V VGS = -20 V, VDS = 0 V VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25 oC VGS = 10 V, ID = 2.7 A TJ =125°C VGS = 4.5 V, ID = 2.4 A
o
30 23 1 10 100 -100
V mV/ oC µA µA nA nA
∆BVDSS/∆TJ
IDSS IGSSF IGSSR VGS(th)
Gate - Body Leakage, Forward Gate - Body Leakage, Reverse
(Note)
ON CHARACTERISTICS
Gate Threshold Voltage Gate Threshold Voltage Temp. Coefficient Static Drain-Source On-Resistance
1
1.6 -4 0.037 0.055 0.049
3
V mV/ oC
∆VGS(th)/∆TJ
RDS(ON)
0.046 0.075 0.06
Ω
ID(ON) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd IS VSD
Note:
On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
(Note)
VGS = 10 V, VDS = 5 V VDS = 5 V, ID = 2.7 A VDS = 10 V, VGS = 0 V, f = 1.0 MHz
15 9.5 480 120 45
A S pF pF pF 12 24 27 10 7 ns ns ns ns nC nC nC 0.42 A V
DYNAMIC CHARACTERISTICS
SWITCHING CHARACTERISTICS
Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
VDD = 5 V, ID = 1 A, VGS = 4.5 V, RGEN = 6 Ω
6 13 15 4
VDS = 10 V, ID = 2.7 A, VGS = 5 V
5 1.4 1.6
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.42 A
(Note)
0.65
1.2
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. Typical RθJA using the board layouts shown below on FR-4 PCB in a still air environment :
a. 250oC/W when mounted on a 0.02 in2 pad of 2oz Cu.
b. 270oC/W when mounted on a minimum pad.
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDN359AN Rev.C
Typical Electrical Characteristics
12 I D , DRAIN-SOURCE CURRENT (A) 10 8 3
R DS(ON) , NORMALIZED
6.0V
3.5V
DRAIN-SOURCE ON-RESISTANCE
VGS = 10V
4.5V
2.5
VGS = 3.0V
2
3.0V
6 4 2 0 0 0.5 1 1.5 2 2.5 VDS , DRAIN-SOURCE VOLTAGE (V)
3.5V
1.5
4.0V 4.5V 6.0V 10V
1
2.5V
0.5 0 2 4 6 8 10 12 I D , DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.6 DRAIN-SOURCE ON-RESISTANCE
0.15
RDS(ON) , NORMALIZED
1.4
VGS = 10 V
R DS(ON) , ON-RESISTANCE (OHM)
I D = 2.7 A
I D = 1.3A
0.12
1.2
0.09
1
0.06
TA = 125°C
0.8
0.03
TA = 25°C
0.6 -50
0
-25 0 25 50 75 100 125 150
0
2
4
6
8
10
TJ , JUNCTION TEMPERATURE (°C)
VGS , GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
12
15
VDS = 5V
I D , DRAIN CURRENT (A) 9
I S , REVERSE DRAIN CURRENT (A)
V GS = 0V
1
TA= 125°C 25°C -55°C
0.1
6
0.01
3
T = -55°C A 25°C 125°C
1 V 2
GS
0.001
0 3 4 5 , GATE TO SOURCE VOLTAGE (V)
0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDN359AN Rev.C
Typical Electrical Characteristics
10 V GS , GATE-SOURCE VOLTAGE (V)
1000
I D = 2.7A
8
CAPACITANCE (pF)
V DS = 5V 10V 15V
500
C iss
6
200 100 50
C oss
4
2
20 0.1
f = 1 MHz V GS = 0V
0.2 0.5 1 2 5
C rss
0 0 2 4 6 8 10 Q g , GATE CHARGE (nC)
10
30
VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
30 10 I D , DRAIN CURRENT (A) 3 1 0.3 0.1 0.03 0.01 0.1
N) S(O RD IT LIM
50
1m s
40 POWER (W)
10m s 100 ms 1s
SINGLE PULSE RθJA =270° C/W TA = 25°C
30
20
VGS = 10V SINGLE PULSE RθJA =270°C/W TA = 25°C
0.2 0.5 1 2
10s DC
10
5
10
20 30
50
0 0.0001
0.001
0.01
0.1
1
10
100 300
VDS , DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
TRANSIENT THERMAL RESISTANCE
1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001 0.001 0.01 0.1 t1 , TIME (sec) 1 10
D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse P(pk)
r(t), NORMALIZED EFFECTIVE
R θJA (t) = r(t) * RθJA R θJA = 270 °C/W
t1
t2
TJ - TA = P * RθJA (t) Duty Cycle, D = t1 /t2
100
300
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in note 1b. Transient thermal response will change depending on the circuit board design.
FDN359AN Rev.C
SuperSOTTM-3 Tape and Reel Data and Package Dimensions
SSOT-3 Packaging Configuration: Figure 1.0
Customize Label
Antistatic Cover Tape
Conductive Embossed Carrier Tape
Human Readable Label
3P
SSOT-3 Std Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code) TNR 3,000 7” Dia D87Z TNR 10,000 13”
3P
3P
3P
Pin 1
SSOT-3 Std Unit Orientation
343mm x 342mm x 64mm Intermediate box for D87Z Option Human Readable Label
187x107x183 343x343x64 9,000 0.0097 0.1230 20,000 0.0097 0.4150
Human Readable Label sample
Human Readable Label
SSOT-23 Tape Leader and Trailer Configuration: Figure 2.0
187mm x 107mm x 183mm Intermediate Box for Standard Option
Carrier Tape Cover Tape
Trailer Tape 160mm minimum
Components
Leader Tape 390mm minimum
December 1998, Rev. B
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
SSOT-3 Embossed Carrier Tape Configuration: Figure 3.0
T E1
P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SSOT-3 (8mm)
A0
3.15 +/-0.10
B0
2.77 +/-0.10
W
8.0 +/-0.3
D0
1.55 +/-0.05
D1
1.00 +/-0.125
E1
1.75 +/-0.10
E2
6.25 min
F
3.50 +/-0.05
P1
4.0 +/-0.1
P0
4.0 +/-0.1
K0
1.30 +/-0.10
T
0.228 +/-0.013
Wc
5.2 +/-0.3
Tc
0.06 +/-02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Side or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SSOT-3 Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7” Diameter Option
B Min Dim C See detail AA W3
Dim D min
13” Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
8mm
Reel Option
7” Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
2.165 55 4.00 100
Dim W1
0.331 +0.059/-0.000 8.4 +1.5/0 0.331 +0.059/-0.000 8.4 +1.5/0
Dim W2
0.567 14.4 0.567 14.4
Dim W3 (LSL-USL)
0.311 – 0.429 7.9 – 10.9 0.311 – 0.429 7.9 – 10.9
8mm
13” Dia
December 1998, Rev. B
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
SuperSOT™-3 (FS PKG Code 32)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in: inches [mil limeters]
Part Weight per unit (gram): 0.0097
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™
DISCLAIMER
ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 TinyLogic™
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.