FSB67508 Smart Power Module (SPM®)
October 2009
FSB67508
Smart Power Module (SPM®) Features
• RDS(ON).MAX=11mΩ @ ID=38A,TJ=25°C a half-bridge FRFET inverter including high voltage integrated circuit (HVIC) • Negative dc-link terminals for inverter current sensing applications • HVIC for gate driving and protection functions • 3/5V CMOS/TTL compatible, active-high interface • Isolation voltage rating of 1500Vrms for 1min. • Embedded bootstrap diode in the package
SPM
General Description
TM
FSB67508 is a smart power module (SPM®) as a compact solution for small power motor drive applications such as Ebike. It is composed of 2 MOSFET, and 1 half-bridge HVIC for gate driving. This offers an extremely compact, high performance half-bridge inverter in a single isolated package . The package is optimized for the thermal performance and compactness for the use in the built-in motor application and any other application where the assembly space is concerned.
Absolute Maximum Ratings
Symbol
VPN ID25 ID80 IDP PD VCC VBS VIN TJ TSTG RθJC
Parameter
DC Link Input Voltage, Drain-source Voltage of each FET Each FET Drain Current, Continuous Each FET Drain Current, Continuous Each FET Drain Current, Peak Maximum Power Dissipation Control Supply Voltage High-side Bias Voltage Input Signal Voltage Operating Junction Temperature Storage Temperature Junction to Case Thermal Resistance TC = 25°C TC = 80°C
Conditions
Rating
75 38 28 95 32 20 20 -0.3 ~ VCC -40 ~ 150 -50 ~ 150
Units
V A A A W V V V °C °C °C/W
TC = 25°C, Pulsed* TC = 25°C, Each Applied between VCC and COM Applied between VB and U Applied between IN and COM
Each under inverter operating condition (Note 1)
3.9
*Repetitive rating : Pulse width limited by maximum junction temperature
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1
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FSB67508 Rev. A
FSB67508 Smart Power Module (SPM®)
Pin Descriptions
Pin Number
1 2 3 4 5 6 7 8 9 10
Pin Name
P VS VB VCC HIN LIN COM NC N U Positive DC–Link Input
Pin Description
Bias Voltage Ground for High Side MOSFET Driving High-side Bias Voltage for MOSFET Driving Bias Voltage for IC and Low side MOSFET Driving Signal Input for High-side Signal Input for Low-side Common Supply Ground No connection Negative DC-Link Input Output
(2) VS (3) VB (4) VCC (5) HIN (6) LIN (8) NC (7) COM VB VCC HIN LIN NC COM HO VS LO (9) N (10) U (1) P
Note: Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside SPM®. External connections should be made as indicated in Figure2.
Figure 1. Internal Block Diagram
2 FSB67508 Rev. A
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FSB67508 Smart Power Module (SPM®)
Electrical Characteristics (TJ = 25°C, VCC=VBS=15V Unless Otherwise Specified)
Inverter Part (Each MOSFET Unless Otherwise Specified) Symbol
BVDSS ΔBVDSS/ ΔTJ IDSS RDS(on) VSD tON tOFF trr EON EOFF RBSOA (Note 3) V = 55V, VCC = VBS = 15V, ID = IDP, VDS=BVDSS, Reverse-bias Safe Oper- PN TJ = 150°C ating Area High- and low-side FET switching (Note 3) Switching Times
Parameter
Conditions
Min
75 -
Typ
0.6 9.4 550 2000 100 40 190
Max Units
250 11 1.2 V V μA mΩ V ns ns ns μJ μJ
Drain-Source Breakdown VIN= 0V, ID = 250μA (Note 2) Voltage Breakdown Voltage TemID = 250μA, Referenced to 25°C perature Coefficient Zero Gate Voltage Drain Current Static Drain-Source On-Resistance Drain-Source Diode Forward Voltage VIN= 0V, VDS = 75V VCC = VBS = 15V, VIN = 5V, ID = 15A VCC = VBS = 15V, VIN = 0V, ID = 15A VPN = 48V, VCC = VBS = 15V, ID = 15A VIN = 0V ↔ 5V Inductive load L=3mH High- and low-side FET switching
Full Square
Control Part (Each HVIC Unless Otherwise Specified) Symbol
IQCC IQBS UVCCD UVCCR UVBSD UVBSR VIH VIL IIH IIL
Parameter
Quiescent VCC Current Quiescent VBS Current Low-side Undervoltage Protection (Figure 6) High-side Undervoltage Protection (Figure 7) ON Threshold Voltage OFF Threshold Voltage Input Bias Current VCC=15V, VIN=0V VBS=15V, VIN=0V
Conditions
Applied between VCC and COM Applied between VB(U)-U, VB(V)-V, VB(W)-W
Min Typ Max Units
7.4 8.0 7.4 8.0 3.0 8.0 8.9 8.0 8.9 10 160 100 9.4 9.8 9.4 9.8 0.8 20 2 μA μA V V V V V V μA μA
VCC Undervoltage Protection Detection Level VCC Undervoltage Protection Reset Level VBS Undervoltage Protection Detection Level VBS Undervoltage Protection Reset Level Logic High Level Logic Low Level VIN = 5V VIN = 0V Applied between IN and COM
Applied between IN and COM
Note:
1. BVDSS is the absolute maximum voltage rating between drain and source terminal of each FET inside SPM®. VPN should be sufficiently less than this value considering the effect of the stray inductance so that VDS should not exceed BVDSS in any case. 2. tON and tOFF include the propagation delay time of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the field applcations due to the effect of different printed circuit boards and wirings. Please see Figure 3 for the switching time definition with the switching test circuit of Figure 4. 3. The peak current and voltage of each FET during the switching operation should be included in the safe operating area (SOA). Please see Figure 4 for the RBSOA test circuit that is same as the switching test circuit.
Package Marking & Ordering Information Device Marking
FSB67508
Device
FSB67508
Package
SPM10-AA
Reel Size
_
Tape Width
_
Quantity
19
3 FSB67508 Rev. A
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FSB67508 Smart Power Module (SPM®)
Recommended Operating Conditions
Symbol
VPN VCC VBS VIN(ON) VIN(OFF) tdead fPWM
Parameter
Supply Voltage Control Supply Voltage High-side Bias Voltage Input ON Threshold Voltage Input OFF Threshold Voltage
Conditions
Applied between P and N Applied between VCC and COM Applied between VB and output Applied between IN and COM
Value Min.
13.5 13 3.0 0 1.0 -
Typ.
48 15 15 15
Max.
60 16.5 16.5 VCC 0.6 -
Units
V V V V V μs kHz
Blanking Time for Preventing VCC=VBS=13.5 ~ 20V, TJ ≤ 150°C Arm-short PWM Switching Frequency TJ ≤ 150°C
These values depend on PWM control algorithm
15-V Line C1 VS P VB R5 VCC HIN LIN NC C5 COM LO N N R3 HO VS U Inverter Output C3 P VDC
FO 1 1 1 1 1
HIN 0 0 1 1 Open x
LIN 0 1 0 1 Open x
Output Z 0 VDC Forbidden Z Z
Note Both FET Off Low-side FET On High-side FET On Shoot-through Same as (0, 0) Same as (0, 0)
Micom
10μF
C2 * Example of bootstrap paramters: C1 = C2 = 1μF ceramic capacitor,
0
Note: (1) The snubber capacitor, C3, should be placed near SPM® (2) Parameters for bootsrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above. (3) RC coupling(R5 and C5) at each input (indicated as dotted lines) may be used to prevent improper input signal due to surge noise. Signal input of SPM® is compatible with standard CMOS or LSTTL outptus. (4) Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge voltage. Bypass capacitors such as C1, C2 and C3 should have good high-frequency characteristics to absorb high-frequency ripple current.
Figure 2. Recommended CPU Interface and Bootstrap Circuit with Parameters
Bootstrap Diode Part Symbol
VRRM IF IFP TJ RB
Parameter
Maixmum Repetitive Reverse Voltage Forward Current Forward Current (Peak) Operating Junction Temperature Equivalent Bootstrap Resistance TC = 25°C TC = 25°C
Conditions
Rating
75 0.5 2 -40 ~ 150 15
Units
V A A °C Ω
TC = 25°C, Under 1ms Pulse Width
4 FSB67508 Rev. A
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FSB67508 Smart Power Module (SPM®)
VIN Irr VDS 100% of ID 120% of ID
VIN
ID
10% of ID ID VDS
tON
trr
tOFF
(a) Turn-on
(b) Turn-off
Figure 3. Switching Time Definition
V CC CB S
VS P VB VCC H IN LIN NC COM O n e-le g D iagra m of S P M LO N HO VS U + V DS L
ID
V DC
Figure 4. Switching and RBSOA(Single-pulse) Test Circuit (Low-side)
Input Signal UV Protection Status
RESET
DETECTION
RESET
Low-side Supply, VCC
UVCCR UVCCD
MOSFET Current
Figure 5. Undervoltage Protection (Low-side)
Input Signal UV Protection Status
RESET
DETECTION
RESET
High-side Supply, VBS
UVBSR UVBSD
MOSFET Current
Figure 6. Undervoltage Protection (High-side)
5 FSB67508 Rev. A
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FSB67508 Smart Power Module (SPM®)
(2) VS (3) VB (4) VCC R5 (5) HIN (6) LIN C2 C5 (8) NC (7) COM
(1) P VB VCC HIN VS LIN NC COM (1) P VB VCC HO VS LIN NC COM (1) P VB VCC HO VS LIN NC COM LO (9) N (10) W LO (9) N (10) V LO (9) N HO (10) U C
3
V
DC
(2) VS (3) VB (4) VCC
Micom
(5) HIN (6) LIN C2 (8) NC (7) COM
HIN
M
(2) VS (3) VB (4) VCC (5) HIN (6) LIN C2 (8) NC (7) COM
HIN
R
For 3-phase current sensing and protection
4
C4
+15V Supply
R
3
Fig. 7. Example of Application Circuit
1.0 0.9 0.8 0.7 0.6
Built in Bootstrap Diode VF-IF Characteristic
IF [A]
0.5 0.4 0.3 0.2 0.1 0.0 0 1 2 3 4 5 6 7 8 9 10 11 12
TC=25℃
13 14 15
VF [V]
Note: Built in bootstrap diode includes around 15Ω resistance characteristic.
Figure 8. Built in Bootstrap Diode Characteristics
6 FSB67508 Rev. A
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FSB67508 Smart Power Module (SPM®)
Detailed Package Outline Drawings
7 FSB67508 Rev. A
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TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. AccuPower™ Auto-SPM™ Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EfficentMax™ EZSWITCH™* ™*
®
Fairchild® Fairchild Semiconductor® FACT Quiet Series™ FACT® FAST® FastvCore™ FETBench™ FlashWriter®*
FPS™ F-PFS™ FRFET® SM Global Power Resource Green FPS™ Green FPS™ e-Series™ Gmax™ GTO™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ MotionMax™ Motion-SPM™ OPTOLOGIC® OPTOPLANAR®
®
PowerTrench® PowerXS™ Programmable Active Droop™ QFET® QS™ Quiet Series™ RapidConfigure™ ™ Saving our world, 1mW/W/kW at a time™ SmartMax™ SMART START™ SPM® STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SupreMOS™ SyncFET™ Sync-Lock™ ® *
The Power Franchise
®
TinyBoost™ TinyBuck™ TinyCalc™ TinyLogic® TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ TriFault Detect™ TRUECURRENT™* μSerDes™
PDP SPM™ Power-SPM™
UHC® Ultra FRFET™ UniFET™ VCX™ VisualMax™ XS™
* Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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Rev. I41
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