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FSB32560
Motion SPM® 3 Series
Features
General Description
• UL Certified No. E209204 (UL1557)
FSB32560 is a Motion SPM® 3 module providing a fullyfeatured, high-performance inverter output stage for AC
Induction, BLDC, and PMSM motors. These modules
integrate optimized gate drive of the built-in IGBTs to
minimize EMI and losses, while also providing multiple on-module protection features including under-voltage lockouts, over-current shutdown, and fault reporting.
The built-in, high-speed HVIC requires only a single supply voltage and translates the incoming logic-level gate
inputs to the high-voltage, high-current drive signals
required to properly drive the module's internal IGBTs.
Separate negative IGBT terminals are available for each
phase to support the widest variety of control algorithms.
• 600 V - 25 A 3-Phase IGBT Inverter with Integral Gate
Drivers and Protection
• Low-Loss, Short-Circuit Rated IGBTs
• Low Thermal Resistance Using Ceramic Substrate
• Dedicated Vs Pins Simplify PCB Layout
• Separate Open-Emitter Pins from Low-Side IGBTs for
Three-Phase Current Sensing
• Single-Grounded Power Supply
• Isolation Rating: 2500 Vrms / min.
Applications
• Motion Control - Home Appliance / Industrial Motor
Related Resources
• AN-9035 - Motion SPM 3 Series Ver.2 User’s Guide
Figure 1. Package Overview
Package Marking and Ordering Information
Device
Device Marking
Package
Packing Type
Quantity
FSB32560
FSB32560
SPMBA-027
Rail
10
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
1
www.fairchildsemi.com
FSB32560 Motion SPM® 3 Series
September 2014
FSB32560 Motion SPM® 3 Series
Integrated Power Functions
• 600 V - 25 A IGBT inverter for three-phase DC / AC power conversion (please refer to Figure 3)
Integrated Drive, Protection and System Control Functions
• For inverter high-side IGBTs: gate drive circuit, high-voltage isolated high-speed level shifting
control circuit Under-Voltage Lock-Out Protection (UVLO)
Note: Available bootstrap circuit example is given in Figures 10 and 11.
• For inverter low-side IGBTs: gate drive circuit, Short-Circuit Protection (SCP)
control supply circuit Under-Voltage Lock-Out Protection (UVLO)
• Fault signaling: corresponding to UVLO (low-side supply) and SC faults
• Input interface: active-HIGH interface, works with 3.3 / 5 V logic, Schmitt-trigger input
Pin Configuration
13.7
(1) VCC(L)
(2) COM
(3) IN(UL)
(4) IN(VL)
(5) IN(WL)
(6) VFO
(7) CFOD
(8) CSC
(21) NU
(22) NV
19.2
(23) NW
(9) IN(UH)
(10) VCC(UH)
(11) VB(U)
(12) VS(U)
(13) IN(VH)
(14) VCC(VH)
(15) VB(V)
(16) VS(V)
(17) IN(WH)
(18) VCC(WH)
(19) VB(W)
(24) U
Case Temperature (TC)
Detecting Point
(25) V
(26) W
DBC Substrate
(27) P
(20) VS(W)
Figure 2. Top View
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
2
www.fairchildsemi.com
FSB32560 Motion SPM® 3 Series
Pin Descriptions
Pin Number
Pin Name
1
VCC(L)
Pin Description
Low-Side Common Bias Voltage for IC and IGBTs Driving
2
COM
Common Supply Ground
3
IN(UL)
Signal Input for Low-Side U-Phase
4
IN(VL)
Signal Input for Low-Side V-Phase
5
IN(WL)
Signal Input for Low-Side W-Phase
Fault Output
6
VFO
7
CFOD
Capacitor for Fault Output Duration Selection
Capacitor (Low-pass Filter) for Short-Circuit Current Detection Input
8
CSC
9
IN(UH)
10
VCC(UH)
11
VB(U)
High-Side Bias Voltage for U-Phase IGBT Driving
12
VS(U)
High-Side Bias Voltage Ground for U-Phase IGBT Driving
13
IN(VH)
Signal Input for High-Side V-Phase
14
VCC(VH)
15
VB(V)
High-Side Bias Voltage for V-Phase IGBT Driving
High-Side Bias Voltage Ground for V-Phase IGBT Driving
Signal Input for High-Side U-Phase
High-Side Bias Voltage for U-Phase IC
High-Side Bias Voltage for V-Phase IC
16
VS(V)
17
IN(WH)
18
VCC(WH)
19
VB(W)
High-Side Bias Voltage for W-Phase IGBT Driving
20
VS(W)
High-Side Bias Voltage Ground for W-Phase IGBT Driving
21
NU
Negative DC-Link Input for U-Phase
22
NV
Negative DC-Link Input for V-Phase
23
NW
Negative DC-Link Input for W-Phase
24
U
Output for U-Phase
25
V
Output for V-Phase
26
W
Output for W-Phase
27
P
Positive DC-Link Input
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
Signal Input for High-Side W Phase
High-Side Bias Voltage for W-Phase IC
3
www.fairchildsemi.com
FSB32560 Motion SPM® 3 Series
Internal Equivalent Circuit and Input/Output Pins
P (27)
(19) VB(W)
(18) VCC(WH)
(17) IN(WH)
(20) VS(W)
(15) VB(V)
(14) VCC(VH)
(16) VS(V)
(11) VB(U)
OUT
VS
W (26)
VB
VCC
OUT
VS
V (25)
VB
(10) VCC(UH)
VCC
COM
IN
(9) IN(UH)
(12) VS(U)
(8) CSC
OUT
VS
U (24)
C(SC) OUT(WL)
(7) CFOD
C(FOD)
(6) VFO
NW (23)
VFO
(5) IN(WL)
(3) IN(UL)
VCC
COM
IN
COM
IN
(13) IN(VH)
(4) IN(VL)
VB
IN(WL) OUT(VL)
IN(VL)
NV (22)
IN(UL)
(2) COM
COM
(1) VCC(L)
VCC
OUT(UL)
VSL
NU (21)
Figure 3. Internal Block Diagram
1st Notes:
1. Inverter low-side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection functions.
2. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals.
3. Inverter high-side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT.
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
4
www.fairchildsemi.com
unless otherwise specified.)
Inverter Part
Symbol
VPN
VPN(Surge)
VCES
± IC
Parameter
Conditions
Supply Voltage
Applied between P- NU, NV, NW
Supply Voltage (Surge)
Applied between P- NU, NV, NW
Unit
450
V
500
V
600
V
TC = 25°C
25
A
TC = 100°C
12
A
Collector - Emitter Voltage
Each IGBT Collector Current
Rating
PC
Collector Dissipation
TC = 25°C per Chip
TJ
Operating Junction Temperature
(2nd Note 1)
29
W
-20 ~ 125
°C
2nd Notes:
1. The maximum junction temperature rating of the power chips integrated within the Motion SPM® 3 product is 150C (at TC 100C). However, to insure safe operation of the
Motion SPM 3 product, the average junction temperature should be limited to TJ(ave) 125C (at TC 100C)
Control Part
Symbol
Parameter
Conditions
Rating
Unit
VCC
Control Supply Voltage
Applied between VCC(UH), VCC(VH), VCC(WH), VCC(L) COM
20
V
VBS
High-Side Control Bias
Voltage
Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) VS(W)
20
V
VIN
Input Signal Voltage
Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL),
IN(WL) - COM
-0.3 ~ 17
V
VFO
Fault Output Supply Voltage
Applied between VFO - COM
IFO
Fault Output Current
Sink Current at VFO Pin
VSC
Current-Sensing Input Voltage Applied between CSC - COM
-0.3 ~ VCC+0.3
V
5
mA
-0.3 ~ VCC+0.3
V
Rating
Unit
400
V
-20 ~ 100
°C
Total System
Symbol
Parameter
Conditions
VPN(PROT)
Self-Protection Supply Voltage Limit
(Short-Circuit Protection Capability)
VCC = VBS = 13.5 ~ 16.5 V
TJ = 125°C, Non-Repetitive, < 2 s
TC
Module Case Operation Temperature
-20CTJ 125C, See Figure 2
TSTG
Storage Temperature
VISO
Isolation Voltage
60 Hz, Sinusoidal, AC 1 Minute, Connect
Pins to Heat Sink Plate
-40 ~ 125
°C
2500
Vrms
Thermal Resistance
Symbol
Rth(j-c)Q
Rth(j-c)F
Parameter
Junction to Case Thermal
Resistance
Condition
Min.
Typ. Max.
Unit
Inverter IGBT Part (per 1 / 6 module)
-
-
3.5
°C/W
Inverter FWD Part (per 1 / 6 module)
-
-
4.7
°C/W
2nd Notes:
2. For the measurement point of case temperature(TC), please refer to Figure 2.
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
5
www.fairchildsemi.com
FSB32560 Motion SPM® 3 Series
Absolute Maximum Ratings (TJ = 25°C,
Inverter Part
Symbol
VCE(SAT)
VF
HS
tON
Parameter
Conditions
Min.
Typ.
Max.
Unit
Collector - Emitter
Saturation Voltage
VCC = VBS = 15 V
VIN = 5 V
IC = 25 A, TJ = 25°C
-
2.15
2.85
V
FWDi Forward Voltage
VIN = 0 V
IC = 25 A, TJ = 25°C
-
2.20
2.90
V
Switching Times
VPN = 300 V, VCC = VBS = 15 V
IC = 12 A
VIN = 0 V 5 V, Inductive Load
(2nd Note 3)
-
0.31
-
s
-
0.15
-
s
-
0.90
-
s
-
0.34
-
s
tC(ON)
tOFF
tC(OFF)
-
0.10
-
s
-
0.58
-
s
-
0.30
-
s
-
0.96
-
s
tC(OFF)
-
0.37
-
s
trr
-
0.10
-
s
-
-
250
A
trr
LS
VPN = 300 V, VCC = VBS = 15 V
IC = 12 A
VIN = 0 V 5 V, Inductive Load
(2nd Note 3)
tON
tC(ON)
tOFF
ICES
Collector - Emitter
Leakage Current
VCE = VCES
2nd Notes:
3. tON and tOFF include the propagation delay of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For
the detailed information, please see Figure 4.
100% I C 100% I C
trr
V CE
IC
IC
V CE
V IN
V IN
0
tON
tOFF
tC(ON)
V IN(ON)
tC(OFF)
V IN(OFF)
10% IC 90% I C 10% V CE
10% V CE
10% I C
(b) turn-off
(a) turn-on
Figure 4. Switching Time Definition
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
6
www.fairchildsemi.com
FSB32560 Motion SPM® 3 Series
Electrical Characteristics (TJ = 25°C, unless otherwise specified.)
Control Part
Symbol
IQCCL
Parameter
Conditions
Quiescent VCC Supply
Current
IQCCH
Min.
Typ.
Max.
Unit
VCC = 15 V
IN(UL, VL, WL) = 0 V
VCC(L) - COM
-
-
23
mA
VCC = 15 V
IN(UH, VH, WH) = 0 V
VCC(UH), VCC(VH), VCC(WH)
- COM
-
-
200
A
VB(U) - VS(U), VB(V) - VS(V),
VB(W) - VS(W)
-
-
500
A
4.5
-
-
V
IQBS
Quiescent VBS Supply Current
VBS = 15 V
IN(UH, VH, WH) = 0 V
VFOH
Fault Output Voltage
VSC = 0 V, VFO Circuit: 4.7 k to 5 V Pull-up
VSC = 1 V, VFO Circuit: 4.7 k to 5 V Pull-up
-
-
0.8
V
VSC(ref)
Short Circuit Current Trip Level VCC = 15 V (2nd Note 4)
0.45
0.50
0.55
V
UVCCD
Supply Circuit Under-Voltage Detection Level
Protection
Reset Level
10.7
11.9
13.0
V
UVCCR
11.2
12.4
13.2
V
UVBSD
Detection Level
UVBSR
Reset Level
VFOL
10
11
12
V
10.5
11.5
12.5
V
tFOD
Fault-out Pulse Width
CFOD = 33 nF (2nd Note 5)
1.0
1.8
-
ms
VIN(ON)
ON Threshold Voltage
3.0
-
-
V
VIN(OFF)
OFF Threshold Voltage
Applied between IN(UH), IN(VH), IN(WH), IN(UL),
IN(VL), IN(WL) - COM
-
-
0.8
V
2nd Notes:
4. Short-circuit protection is functioning only at the low-sides.
5. The fault-out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation: CFOD = 18.3 x 10-6 x tFOD [F]
Recommended Operating Conditions
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
VPN
Supply Voltage
Applied between P - NU, NV, NW
-
300
400
V
VCC
Control Supply Voltage
Applied between VCC(UH), VCC(VH), VCC(WH),
VCC(L) - COM
13.5
15
16.5
V
VBS
High-Side Bias Voltage
Applied between VB(U) - VS(U), VB(V) - VS(V),
VB(W) - VS(W)
13.0
15
18.5
V
-1
-
1
V / s
2.0
-
-
s
-
20
kHz
4
V
dVCC / dt, Control Supply Variation
dVBS / dt
tdead
Blanking Time for Preventing For Each Input Signal
Arm-Short
fPWM
PWM Input Signal
-20C TC 100°C, -20C TJ 125°C
-
VSEN
Voltage for Current Sensing
Applied between NU, NV, NW - COM
(Including Surge Voltage)
-4
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
7
www.fairchildsemi.com
FSB32560 Motion SPM® 3 Series
Electrical Characteristics (TJ = 25°C, unless otherwise specified.)
Parameter
Mounting Torque
Conditions
Mounting Screw: M3
Device Flatness
Min.
Typ.
Max.
Unit
0.51
0.62
0.72
N•m
0
-
+120
m
-
15.40
-
g
Recommended 0.62 N•m
See Figure 5
Weight
(+)
(+)
Figure 5. Flatness Measurement Position
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
8
www.fairchildsemi.com
FSB32560 Motion SPM® 3 Series
Mechanical Characteristics and Ratings
FSB32560 Motion SPM® 3 Series
Time Charts of Protective Function
Input Signal
Protection
Circuit State
RESET
SET
RESET
UVCCR
a1
Control
Supply Voltage
a6
UVCCD
a3
a2
a7
a4
Output Current
a5
Fault Output Signal
a1 : Control supply voltage rises: after the voltage rises UVCCR, the circuits start to operate when next input is applied.
a2 : Normal operation: IGBT ON and carrying current.
a3 : Under-Voltage detection (UVCCD).
a4 : IGBT OFF in spite of control input condition.
a5 : Fault output operation starts.
a6 : Under-Voltage reset (UVCCR).
a7 : Normal operation: IGBT ON and carrying current.
Figure 6. Under-Voltage Protection (Low-Side)
Input Signal
Protection
Circuit State
RESET
SET
RESET
UVBSR
Control
Supply Voltage
b5
b1
UVBSD
b3
b6
b2
b4
Output Current
High-level (no fault output)
Fault Output Signal
b1 : Control supply voltage rises: after the voltage reaches UVBSR, the circuits start to operate when next input is applied.
b2 : Normal operation: IGBT ON and carrying current.
b3 : Under-Voltage detection (UVBSD).
b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.
b5 : Under-Voltage reset (UVBSR).
b6 : Normal operation: IGBT ON and carrying current.
Figure 7. Under-Voltage Protection (High-Side)
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
9
www.fairchildsemi.com
c6
Protection
Circuit State
SET
Internal IGBT
Gate - Emitter Voltage
FSB32560 Motion SPM® 3 Series
Lower Arms
Control Input
c7
RESET
c4
c3
c2
SC
c1
c8
Output Current
SC Reference Voltage
Sensing Voltage
of Shunt Resistance
Fault Output Signal
c5
CR Circuit Time
Constant Delay
(with the external shunt resistance and CR connection)
c1 : Normal operation: IGBT ON and carrying current.
c2 : Short-Circuit current detection (SC trigger).
c3 : Hard IGBT gate interrupt.
c4 : IGBT turns OFF.
c5 : Fault output timer operation starts: the pulse width of the fault output signal is set by the external capacitor CFO.
c6 : Input “LOW”: IGBT OFF state.
c7 : Input “HIGH”: IGBT ON state, but during the active period of fault output, the IGBT doesn’t turn ON.
c8 : IGBT OFF state.
Figure 8. Short-Circuit Protection (Low-Side Operation Only)
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
10
www.fairchildsemi.com
FSB32560 Motion SPM® 3 Series
+5 V
SPM
RPF = 4.7 k
IN(UH) , IN(VH) , IN(WH)
MCU
IN (UL) , IN (VL) , IN(WL)
100
1 nF
VFO
CPF= 1 nF
COM
Figure 9. Recommended MCU I/O Interface Circuit
3rd Notes:
1. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme in the application and the wiring impedance of the application’s printed
circuit board. The Motion SPM® 3 Product input signal section integrates a 3.3 k(typ.) pull-down resistor. Therefore, when using an external filtering resistor, pay attention to
the signal voltage drop at input terminal.
2. The logic input works with standard CMOS or LSTTL outputs.
These values depend on PWM control algorithm.
+15 V
RBS
One-Leg Diagram of
Motion SPM 3 Product
DBS
P
0.1 µF
22 µF
Vcc
VB
IN
HO
COM VS
Inverter
Output
Vcc
1000 µF
1 µF
IN
OUT
COM VSL
N
Figure 10. Recommended Bootstrap Operation Circuit and Parameters
3rd Notes:
3. It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics.
4. The ceramic capacitor placed between VCC - COM should be over 1 F and mounted as close to the pins of the Motion SPM 3 product as possible.
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
11
www.fairchildsemi.com
R BS
DBS
P (27)
(19) V B(W)
VB
(18) V CC(WH)
CBS
Gating WH
C BSC
(17) IN (WH)
(20) V S(W)
R BS
DBS
VCC
OUT
COM
IN
(15) V B(V)
VB
(14) V CC(VH)
VCC
C BS
Gating VH
C BSC
M
C
U
D BS
(11) V B(U)
Gating UH
C BSC
VS
V (25)
M
VB
(10) V CC(UH)
CBS
OUT
COM
IN
(13) IN(VH)
(16) V S(V)
R BS
W (26)
VS
(9) IN (UH)
(12) V S(U)
VCC
C DCS
OUT
COM
IN
VS
Vdc
U (24)
RF
5V
(8) CSC
C SC
R PF
(7) C FOD
RS
CFOD
Fault
(6) V FO
(5) IN(WL)
Gating WL
C(SC)
OUT(WL)
C(FOD)
NW (23)
IN(WL) OUT(VL)
(4) IN (VL)
Gating VL
R SW
VFO
IN(VL)
NV (22)
R SV
(3) IN(UL)
IN(UL)
Gating UL
(2) COM
C BPF
COM
CPF
(1) V CC(L)
OUT(UL)
VCC
C SP15
Input Signal for
Short-Circuit Protection
V SL
N U (21)
R SU
C SPC15
R FW
W-Phase Current
V-Phase Current
U-Phase Current
R FV
R FU
CFW
C FV
C FU
Figure 11. Typical Application Circuit
4th Notes:
1. To avoid malfunction, the wiring of each input should be as short as possible (less than 2 - 3 cm).
2. By virtue of integrating an application-specific type of HVIC inside the Motion SPM® 3 product, direct coupling to MCU terminals without any optocoupler or transformer isolation is possible.
3. VFO output is open-collector type. This signal line should be pulled up to the positive side of the 5 V power supply with approximately 4.7 k resistance (please refer to Figure
9).
4. CSP15 of around seven times larger than bootstrap capacitor CBS is recommended.
5. VFO output pulse width should be determined by connecting an external capacitor (CFOD) between CFOD (pin 7) and COM (pin 2). (Example : if CFOD = 33 nF, then tFO = ms
(typ.)) Please refer to the 2nd note 5 for calculation method.
6. Input signal is active-HIGH type. There is a 3.3 kresistor inside the IC to pull down each input signal line to GND. When employing RC coupling circuits, set up such RC couple that input signal agree with turn-off / turn-on threshold voltage.
7. To prevent errors of the protection function, the wiring around RF and CSC should be as short as possible.
8. In the short-circuit protection circuit, please select the RFCSC time constant in the range 1.5 ~ 2 s.
9. Each capacitor should be mounted as close to the pins of the Motion SPM 3 product as possible.
10. To prevent surge destruction, the wiring between the smoothing capacitor and the P & GND pins should be as short as possible. The use of a high-frequency non-inductive
capacitor of around 0.1 ~ 0.22 F between the P & GND pins is recommended.
11. Relays are used in almost every systems of electrical equipment in home appliances. In these cases, there should be sufficient distance between the MCU and the relays.
12. CSPC15 should be over 1 F and mounted as close to the pins of the Motion SPM 3 product as possible.
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
12
www.fairchildsemi.com
FSB32560 Motion SPM® 3 Series
15 V
FSB32560 Motion SPM® 3 Series
Detailed Package Outline Drawings
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or data on the drawing and contact a FairchildSemiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide therm and conditions,
specifically the the warranty therein, which covers Fairchild products.
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©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
13
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FSB32560 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation
FSB32560 Rev. C4
14
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