MWIC930NR1

Freescale Semiconductor Technical Data Document Number: MWIC930N Rev. 6, 5/2006 RF LDMOS Wideband Integrated Power Amplifiers The MWIC930N wideband integrated circuit is designed for CDMA and GSM/GSM EDGE applications. It uses Freescale’s newest High Voltage (26 to 28 Volts) LDMOS IC technology and integrates a multi - stage structure. Its wideband On - Chip integral matching circuitry makes it usable from 790 to 1000 MHz. The linearity performances cover all modulations for cellular applications: GSM, GSM EDGE, TDMA, N - CDMA and W - CDMA. Final Application • Typical Performance @ P1dB: VDD = 26 Volts, IDQ1 = 90 mA, IDQ2 = 240 mA, Pout = 30 Watts P1dB, Full Frequency Band (921 - 960 MHz) Power Gain — 30 dB Power Added Efficiency — 45% Driver Application • Typical Single - Carrier N - CDMA Performance: VDD = 27 Volts, IDQ1 = 90 mA, IDQ2 = 240 mA, Pout = 5 Watts Avg., Full Frequency Band (865 - 894 MHz), IS - 95 (Pilot, Sync, Paging, Traffic Codes 8 Through 13), Channel Bandwidth = 1.2288 MHz. PAR = 9.8 dB @ 0.01% Probability on CCDF. Power Gain — 31 dB Power Added Efficiency — 21% ACPR @ 750 kHz Offset — - 52 dBc in 30 kHz Bandwidth • Capable of Handling 5:1 VSWR, @ 26 Vdc, 921 MHz, 30 Watts CW Output Power Features • Characterized with Series Equivalent Large - Signal Impedance Parameters • On - Chip Matching (50 Ohm Input, DC Blocked, >4 Ohm Output) • Integrated Quiescent Current Temperature Compensation with Enable/Disable Function • On - Chip Current Mirror gm Reference FET for Self Biasing Application (1) • Integrated ESD Protection • 200°C Capable Plastic Package • N Suffix Indicates Lead - Free Terminations. RoHS Compliant. • In Tape and Reel. R1 Suffix = 500 Units per 44 mm, 13 inch Reel. VRD2 VRG2 VDS1 MWIC930NR1 MWIC930GNR1 746 - 960 MHz, 30 W, 26 - 28 V SINGLE N - CDMA, GSM/GSM EDGE RF LDMOS WIDEBAND INTEGRATED POWER AMPLIFIERS CASE 1329 - 09 TO - 272 WB - 16 PLASTIC MWIC930NR1 CASE 1329A - 03 TO - 272 WB - 16 GULL PLASTIC MWIC930GNR1 GND VRD2 VRG2 VDS1 VRD1 VDS2/RFout RFin VRG1 VGS1 VGS2 NC GND 1 2 3 4 5 6 7 8 9 10 11 16 15 GND NC 14 RFin VRD1 VRG1 RFout/ VDS2 13 12 NC GND VGS1 VGS2 Quiescent Current Temperature Compensation (Top View) Note: Exposed backside flag is source terminal for transistors. Figure 1. Functional Block Diagram Figure 2. Pin Connections 1. Refer to AN1987/D, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf . Select Documentation/Application Notes - AN1987. © Freescale Semiconductor, Inc., 2006. All rights reserved. MWIC930NR1 MWIC930GNR1 1 RF Device Data Freescale Semiconductor Table 1. Maximum Ratings Rating Drain - Source Voltage Gate - Source Voltage Storage Temperature Range Operating Junction Temperature Symbol VDSS VGS Tstg TJ Value - 0.5, +65 - 0.5, +15 - 65 to +175 200 Unit Vdc Vdc °C °C Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case GSM Application (Pout = 30 W CW) GSM EDGE Application (Pout = 15 W CW) CDMA Application (Pout = 5 W CW) Stage 1, 26 Vdc, IDQ = 90 mA Stage 2, 26 Vdc, IDQ = 240 mA Stage 1, 27 Vdc, IDQ = 90 mA Stage 2, 27 Vdc, IDQ = 240 mA Stage 1, 27 Vdc, IDQ = 90 mA Stage 2, 27 Vdc, IDQ = 240 mA Symbol RθJC 5.9 1.4 6.5 1.7 6.5 1.8 Value (1,2) Unit °C/W Table 3. ESD Protection Characteristics Test Conditions Human Body Model Machine Model Charge Device Model Class 1 (Minimum) M3 (Minimum) C2 (Minimum) Table 4. Moisture Sensitivity Level Test Methodology Per JESD 22 - A113, IPC/JEDEC J - STD - 020 Rating 3 Package Peak Temperature 260 Unit °C Table 5. Electrical Characteristics (TC = 25°C, unless otherwise noted) Characteristic Symbol Min Typ Max Unit Functional Tests (In Freescale Test Fixture, 50 ohm system) VDD = 27 Vdc, IDQ1 = 90 mA, IDQ2 = 240 mA, Pout = 5 W Avg. N - CDMA, f = 880 MHz, Single - Carrier N - CDMA, 1.2288 MHz Channel Bandwidth Carrier. ACPR measured in 30 kHz Bandwidth @ ±750 MHz Offset. PAR = 9.8 dB @ 0.01% Probability on CCDF Power Gain Power Added Efficiency Input Return Loss (f = 880 MHz) Adjacent Channel Power Ratio Quiescent Current Accuracy over Temperature (2) Stage 1 with 33.2 kΩ Gate Feed Resistors ( - 30 to 115°C) Stage 2 with 47.5 kΩ Gate Feed Resistors ( - 30 to 115°C) Gain Flatness in 80 MHz Bandwidth @ Pout = 5 W CW Deviation from Linear Phase in 80 MHz Bandwidth @ Pout = 5 W CW Delay @ Pout = 5 W CW Including Output Matching Part - to - Part Phase Variation @ Pout = 5 W CW Gps PAE IRL ACPR 28 18 — — — ΔI1QT ΔI2QT GF Φ Delay ΔΦ — — — — ±2.5 ±2.5 0.3 0.6 3 ±15 — — — — dB ° ns ° 31 21 - 12 - 52 — — -9 - 48 — dB % dB dBc % Typical Performances (In Freescale Test Fixture) VDD = 26 Vdc, IDQ1 = 90 mA, IDQ2 = 240 mA, 840 MHz