HANBit
HMF51232J4V
FLASH-ROM MODULE 2MByte (512K x32-Bit) – 68-Pin JLCC Part No. HMF51232J4V
GENERAL DESCRIPTION
The HMF51232J4V is a high-speed flash read only memory (FROM) module containing 524,288 words organized in a x32bit configuration. The module consists of four 512Kx 8 FROM mounted on a 68-pin, JLCC FR4-printed circuit board. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0V flash or EPROM devices. Four chip enable inputs, (/CE1, /CE2, /CE3, /CE4) are used to enable the module ’s 4 bytes independently. Output enabl e (/OE) and write enable (/WE) can set the memory input and output. When FROM module is disable condition, the module is becoming power standby mode, system designer can get low -power design. All module components may be powered from a single +3 .3V DC power supply and all inputs and outputs are LVTTLcompatible.
FEATURES
w Access time : 55,70, 90 and 120ns w High-reliability, low-power design w Single + 3V ± 0.3V power supply w Easy memory expansion w All inputs and outputs are TTL-compatible w FR4-PCB design w Low profile 68-pin JLCC w Minimum 1,000,000 write/erase cycle w Sector erases architecture w Sector group protection w Temporary sector group unprotection w The used device is Am29LV040B w High-density 2MByte design
PIN ASSIGNMENT
DQ1 6 A1 8 A1 7 / CE4 / CE3 / CE2 / CE1 NC Vcc NC NC / OE /WE A1 6 A1 5 A1 4 DQ1 5 DQ17 DQ18 DQ19 Vss DQ20 DQ21 DQ22 DQ23 Vcc DQ24 DQ25 DQ26 DQ27 Vss DQ28 DQ29 DQ30
10 9 8 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 26 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
OPTIONS
w Timing 55ns access 70ns access 90ns access 120ns access w Packages 68-pin JLCC
MARKING
-55 -70 -90 -120
DQ14 DQ13 DQ12 Vss DQ11 DQ10 DQ9 DQ8 Vcc DQ7 DQ6 DQ5 DQ4 Vss DQ3 DQ2 DQ1
J
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DQ3 1 A6 A5 A4 A3 A2 A1 A0 Vcc A1 3 A1 2 A1 1 A1 0 A9 A8 A7 DQ0
68-pin JLCC TOP VIEW
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FUNCTIONAL BLOCK DIAGRAM
32 19
HMF51232J4V
DQ0 - DQ31 A0 - A18
A0-18 /WE /OE /CE DQ 0-7
U1
/CE1 A0-18 /WE /OE /CE /CE2 A0-18 /WE /OE /CE3 A0-18 /WE /OE /WE /OE /CE /CE4 DQ24-31 DQ16-23 DQ 8-15
U2
U3
/CE
U4
TRUTH TABLE
MODE READ W RITE STANDBY OUTPUT DISABLE Reset Sector Protect /CE L L Vcc±0.3V L X L /OE L H X H X H /WE H L X H X L DQ DOUT DIN HIGH-Z HIGH-Z HIGH-Z DIN,DOUT A6=L,A1=H,A0=L ADDRESSES AIN AIN X X X Sector Address,
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Sector Unprotect Temporary Sector Unprotect Note : X means don't care L X H X L X DIN,DOUT
HMF51232J4V
Sector Address, A6=L,A1=H,A0=L DIN AIN
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage with respect to ground all other pins Voltage with respect to ground Vcc Storage Temperature SYMBOL VIN,OUT VCC TSTG RATING -0.5V to Vcc +0.5V -0.5V to +4.0V -65oC to +150 oC
Operating Temperature TA -55oC to +125 oC w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only a nd functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER Vcc for regulated voltage range Vcc for full voltage range Ground SYMBOL VCC Vcc VSS MIN 3.0V 2.7V 0 0 TYP. MAX 3.6V 3.6V 0
DC AND OPERATING CHARACTERISTICS (0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 0.5V )
PARAMETER Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Vcc Active Current for Read(1) Vcc Active Current for Program /CE = VIL, /OE=VIH or Erase(2) Vcc Standby Current Vcc Reset Current Low Vcc Lock-Out Voltage Notes: 1. The Icc current listed is typically less than than 2mA/MHz, with /OE at V IH. Typical Vcc is 3.0V 2. Icc active while embedded algorithm (program or erase) is in progress 3. Maximum Icc current specifications are tested with Vcc=Vcc max /CE=Vcc±0.3V ICC3 ICC4 VLKO 2.3 5 5 2.5 mA mA V ICC2 30 mA TEST CONDITIONS Vcc=Vcc max, V IN= GND to Vcc Vcc=Vcc max, V out= GND to Vcc IOH = -2.0mA, Vcc = Vcc min IOL = 4.0mA, Vcc =Vcc min /CE = VIL, /OE=VIH, f=5mHz SYMBOL IL1 IL0 VOH VOL ICC1 0.85Vcc 0.45 12 MIN MAX ±1.0 ±1.0 UNITS µA µA V V mA
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ERASE AND PROGRAMMING PERFORMANCE
LIMITS PARAMETER MIN. Sector Erase Time TYP. 1.7 MAX. UNIT
HMF51232J4V
COMMENTS Excludes 00H programming
15
sec prior to erasure Excludes system-level
Byte Programming Time
-
9
300
us overhead Excludes system-level
Chip Programming Time
-
4.5
13.5
sec overhead
CAPACITANCE
PARAMETER SYMBOL CIN COUT CIN2 PARAMETER TEST SETUP DESCRIPTION Input Capacitance Output Capacitance Control Pin Capacitance
o
TYP. 6 8.5 7.5
MAX 7.5 12 9
UNIT pF pF pF
VIN = 0 VOUT = 0 VIN = 0
Notes : Test conditions TA = 25 C, f=1.0 MHz.
AC CHARACTERISTICS u Read Only Operations Characteristics
PARAMETER SYMBOLS JEDEC tAVAV tAVQV STANDARD tRC tACC Address to Output Delay /OE = VIL tELQV tGLQV tEHQZ tGHQZ tAXQX tCE tOE tDF tDF tQH /CE or /OE, Whichever Occurs First Notes : Test Conditions : Output Load : 1TTL gate and 100 pF Input rise and fall times : 5 ns Input pulse levels : 0V to 3.0V Timing measurement reference level Input : 1.5V / Output : 1.5V Chip Enable to Output Delay Chip Enable to Output Delay Chip Enable to Output High-Z Output Enable to Output High-Z Output Hold Time From Addresses, Min 0 0 ns /OE = VIL Max Max Max Max 55 30 25 25 90 35 30 30 ns ns ns ns Read Cycle Time /CE = V IL Max 55 90 ns Min 55 90 ns DESCRIPTION TEST SETUP -55 -90 UNIT
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HMF51232J4V
3.3V 2.7kΩ Device Under Test CL IN3064 or Equivalent
6.2kΩ
Diodes = IN3064 or Equivalent
Note : CL = 100pF including jig capacitance
u Write/Erase/Program Operations Alternate /WE Controlled Writes
PARAMETER SYMBOLS DESCRIPTION JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX STANDARD tWC tAS tAH tDS tDH tOES tGHWL tELWL tWHEH tWLWH tWHWL tWHWH1 tWHWH2 tGHWL tCS tCH tWP tWPH tWHWH1 tWHWH2 tVCS Notes : 1. This does not include the preprogramming time 2. This timing is only for Sector Protect operations
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-55 Min Min Min Min Min Min Min Min Min Min Min Typ Typ Min 55 0 45 35 0 0 0 0 0 35 30 9 0.7 50
-90 90 0 45 45 0 0 0 0 0 35 30 9 0.7 50
UNIT ns ns ns ns ns ns ns ns ns ns ns µs sec µs
W rite Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /CE Setup Time /CE Hold Time W rite Pulse Width W rite Pulse Width High Byte Programming Operation Sector Erase Operation (Note1) Vcc Setup Time
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u Write/Erase/Program Operations Alternate /CE Controlled Writes
PARAMETER SYMBOLS DESCRIPTION JEDEC tAVAV tAVEL tELAX tDVEH tEHDX STANDARD tWC tAS tAH tDS tDH tOES tGHEL tWLEL tEHWH tELEH tEHEL tWHWH1 tWHWH2 tGHEL tWS tWH tCP tCPH tWHWH1 tWHWH2 W rite Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /WE Setup Time /WE Hold Time /CE Pulse Width /CE Pulse Width High Byte Programming Operation Sector Erase Operation (Note) Min Min Min Min Min Min Min Min Min Min Min Typ Typ 55 0 45 35 0 0 0 0 0 35 30 9 0.7 -55
HMF51232J4V
-90 90 0 45 45 0 0 0 0 0 35 30 9 0.7
UNIT ns ns ns ns ns ns ns ns ns ns ns µs sec
Notes : This does not include the preprogramming time.
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u READ OPERATIONS TIMING
HMF51232J4V
u RESET TIMING
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u PROGRAM OPERATIONS TIMING
HMF51232J4V
u CHIP/SECTOR ERASE OPERATION TIMINGS
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u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
HMF51232J4V
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
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u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
HMF51232J4V
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
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PACKAGE DIMENSIONS
68-Pin JLCC
HMF51232J4V
24.94±0.20mm
4.30±0.20mm
0.46±0.20mm
23.67±0.20mm
1.278±0.20mm
ORDERING INFORMATION
Part Number
Density
Org.
Package
Component Number 4EA 4EA 4EA 4EA
Vcc
SPEED
HMF51232J4V-55 HMF51232J4V-70 HMF51232J4V-90 HMF51232J4V-120
2MByte 2MByte 2MByte 2MByte
512k×32bit 512k×32bit 512k×32bit 512k×32bit
68Pin-JLCC 68 Pin-JLCC 68 Pin-JLCC 68 Pin-JLCC
3.3V 3.3V 3.3V 3.3V
55ns 70ns 90ns 120ns
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