74LVC16245AEV

INTEGRATED CIRCUITS DATA SHEET 74LVC16245A; 74LVCH16245A 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state Product specification Supersedes data of 2003 Jan 30 2003 Nov 25 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state FEATURES • 5 V tolerant inputs/outputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption • MULTIBYTETM flow-through standard pin-out architecture • Low inductance multiple power and ground pins for minimum noise and ground bounce • Direct interface with TTL levels • High-impedance when VCC = 0 V • All data inputs have bushold (74LVCH16245A only) • Complies with JEDEC standard no. 8-1A • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL tPHL/tPLH CI CI/O CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. PARAMETER input capacitance input/output capacitance power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2 CONDITIONS DESCRIPTION 74LVC16245A; 74LVCH16245A The 74LVC(H)16245A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 Volt. These features allow the use of these devices as a mixed 3.3 and 5 V environment. The 74LVC(H)16245A is a 16-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for direction control. nOE controls the outputs so that the buses are effectively isolated. This device can be used as two 8-bit transceivers or one 16-bit transceiver. The 74LVCH16245A bushold data inputs eliminates the need for external pull-up resistors to hold unused inputs. TYPICAL 2.2 5.0 10 30 ns pF pF pF UNIT propagation delay nAn to nBn; nBn to nAn CL = 50 pF; VCC = 3.3 V 2003 Nov 25 2 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE 74LVC16245ADL 74LVCH16245ADL 74LVC16245ADGG 74LVCH16245ADGG 74LVC16245AEV 74LVCH16245AEV FUNCTION TABLE See note 1. INPUT nOE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. nDIR L H X nAn A=B inputs Z −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C PINS 48 48 48 48 56 56 PACKAGE SSOP48 SSOP48 TSSOP48 TSSOP48 VFBGA56 VFBGA56 74LVC16245A; 74LVCH16245A MATERIAL plastic plastic plastic plastic plastic plastic CODE SOT370-1 SOT370-1 SOT362-1 SOT362-1 SOT702-1 SOT702-1 OUTPUT nBn inputs B=A Z 2003 Nov 25 3 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state PINNING SYMBOL 1DIR 1B0 1B1 GND 1B2 1B3 VCC 1B4 1B5 1B6 1B7 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2DIR 2OE 2A7 2A6 2A5 2A4 2A3 2A2 2A1 2A0 1A7 1A6 1A5 1A4 1A3 1A2 1A1 1A0 1OE n.c. 1 2 3 4, 10, 15, 21, 28, 34, 39, 45 5 6 7, 18, 31, 42 8 9 11 12 13 14 16 17 19 20 22 23 24 25 26 27 29 30 32 33 35 36 37 38 40 41 43 44 46 47 48 − PIN A1 B2 B1 B3, B4, D3, D4, G3, G4, J3, J4 C2 C1 C3, C4, H3, H4 D2 D1 E2 E1 F1 F2 G1 G2 H1 H2 J1 J2 K1 K6 J5 J6 H5 H6 G5 G6 F5 F6 E6 E5 D6 D5 C6 C5 B6 B5 A6 A2, A3, A4, A5, K2, K3, K4, K5 BALL 74LVC16245A; 74LVCH16245A DESCRIPTION direction control input data input/output data input/output ground (0 V) data input/output data input/output supply voltage data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output direction control input output enable input (active LOW) data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output data input/output output enable input (active LOW) not connected 2003 Nov 25 4 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 74LVC16245A; 74LVCH16245A 1DIR 1B0 1B1 GND 1B2 1B3 VCC 1B4 1B5 1 2 3 4 5 6 7 8 9 48 1OE 47 1A0 46 1A1 45 GND 44 1A2 43 1A3 42 VCC 41 1A4 40 1A5 39 GND 38 1A6 37 1A7 36 2A0 35 2A1 34 GND 33 2A2 32 2A3 31 VCC 30 2A4 29 2A5 28 GND 27 2A6 26 2A7 25 2OE mna710 A 1DIR n.c. n.c. n.c. n.c. 1OE B 1B1 1B0 GND GND 1A0 1A1 C 1B3 1B2 VCC GND VCC GND 1A2 1A3 GND 10 1B6 11 1B7 12 2B0 13 2B1 14 GND 15 2B2 16 2B3 17 VCC 18 2B4 19 2B5 20 GND 21 2B6 22 2B7 23 2DIR 24 D 1B5 1B4 1A4 1A5 E 1B7 1B6 1A6 1A7 16245 F 2B0 2B1 2A1 2A0 G 2B2 2B3 GND GND 2A3 2A2 H 2B4 2B5 VCC GND VCC GND 2A5 2A4 J 2B6 2B7 2A7 2A6 K 2DIR 1 n.c. 2 n.c. 3 n.c. 4 n.c. 5 2OE 6 mna707 Fig.1 Pin configuration SSOP48 and TSSOP48. Fig.2 Pin configuration VFBGA56. 2003 Nov 25 5 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 74LVC16245A; 74LVCH16245A handbook, full pagewidth 1DIR 1 48 2DIR 1OE 2A0 2 1B0 2A1 3 1B1 2A2 5 1B2 2A3 6 1B3 2A4 8 1B4 2A5 9 1B5 2A6 11 1B6 2A7 12 1B7 24 25 36 13 35 14 33 16 32 17 30 19 29 20 27 22 26 23 2B7 2B6 2B5 2B4 2B3 2B2 2B1 2B0 2OE 1A0 47 1A1 46 1A2 44 1A3 43 1A4 41 1A5 40 1A6 38 1A7 37 MNA708 Fig.3 Logic symbol. 2003 Nov 25 6 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 74LVC16245A; 74LVCH16245A handbook, halfpage 1OE 1DIR 48 1 25 2OE 24 2DIR G3 3EN1 [BA] 3EN2 [AB] G6 6EN4 [BA] 6EN5 [AB] 1 2 2 3 5 6 8 9 11 12 4 5 13 14 16 17 19 20 22 23 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 MNA705 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 handbook, halfpage VCC data input to internal circuit MNA709 Fig.4 Logic symbol (IEEE/IEC). Fig.5 Bushold circuit. 2003 Nov 25 7 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER supply voltage CONDITIONS for maximum speed performance for low voltage applications VI VO Tamb tr, tf input voltage output voltage operating ambient temperature input rise and fall times output HIGH or LOW state output 3-state in free air VCC = 1.2 to 2.7 V VCC = 2.7 to 3.6 V MIN. 2.7 1.2 0 0 0 −40 0 0 74LVC16245A; 74LVCH16245A MAX. 3.6 3.6 5.5 VCC 5.5 +125 20 10 V V V V V °C UNIT ns/V ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO PARAMETER supply voltage input diode current input voltage output diode current output voltage VI < 0 note 1 VO > VCC or VO < 0 output HIGH or LOW state; note 1 output 3-state; note 1 IO ICC, IGND Tstg Ptot output source or sink current VCC or GND current storage temperature power dissipation SSOP and TSSOP package VFBGA package Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 60 °C the value of PD derates linearly with 5.5 mW/K. 3. Above 70 °C the value of PD derates linearly with 1.8 mW/K. Tamb = −40 to +125 °C; note 2 Tamb = −40 to +125 °C; note 3 − − 500 1000 mW mW VO = 0 to VCC CONDITIONS − −0.5 − −0.5 −0.5 − − −65 MIN. −0.5 MAX. +6.5 −50 +6.5 ±50 VCC + 0.5 +6.5 ±50 ±100 +150 V mA V mA V V mA mA °C UNIT 2003 Nov 25 8 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 to +85 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = −100 µA IO = −12 mA IO = −18 mA IO = −24 mA VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 12 mA IO = 24 mA ILI IOZ input leakage current 3-state output OFF-state current VI = 5.5 V or GND ; notes 2 and 3 VI = VIH or VIL; VO = 5.5 V or GN D VI = VCC or GND; IO = 0 VI =VCC − 0.6 V; IO = 0 VI = 0.8 V; notes 4, 5 and 6 VI = 2.0 V; notes 4, 5 and 6 notes 4, 5 and 7 notes 4, 5 and 7 2.7 to 3.6 2.7 3.0 3.6 3.6 − − − − − 0 − − ±0.1 0.1 2.7 to 3.6 2.7 3.0 3.0 VCC − 0.2 VCC − 0.5 VCC − 0.6 VCC − 0.8 VCC − − − 1.2 2.7 to 3.6 1.2 2.7 to 3.6 VCC 2.0 − − − − − − VCC (V) MIN. 74LVC16245A; 74LVCH16245A TYP. (1) MAX. UNIT − − 0 0.8 − − − − 0.20 0.40 0.55 ±5 ±5 V V V V V V V V V V V µA µA Ioff ICC ∆ICC IBHL IBHH IBHLO IBHHO power off leakage supply VI or VO = 5.5 V quiescent supply current additional quiescent supply current per pin bushold LOW sustaining current bushold HIGH sustaining current bushold LOW overdrive current bushold HIGH overdrive current 0.0 3.6 2.7 to 3.6 3.0 3.0 3.6 3.6 − − − 75 −75 500 −500 0.1 0.1 5 − − − − ±10 10 500 − − − − µA µA µA µA µA µA µA 2003 Nov 25 9 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 to +125 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = −100 µA IO = −12 mA IO = −18 mA IO = −24 mA VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 12 mA IO = 24 mA ILI IOZ input leakage current 3-state output OFF-state current VI = 5.5 V or GND ; note 2 VI = VIH or VIL; VO = 5.5 V or GN D; notes 2 and 3 VI = VCC or GND; IO = 0 VI =VCC − 0.6 V; IO = 0 VI = 0.8 V; notes 4, 5 and 6 VI = 2.0 V; notes 4, 5 and 6 notes 4, 5 and 7 notes 4, 5 and 7 2.7 to 3.6 2.7 3.0 3.6 3.6 − − − − − 0 − − − − 2.7 to 3.6 2.7 3.0 3.0 VCC − 0.3 VCC − 0.65 VCC − 0.75 VCC − 1 − − − − 1.2 2.7 to 3.6 1.2 2.7 to 3.6 VCC 2.0 − − − − − − VCC (V) MIN. 74LVC16245A; 74LVCH16245A TYP. (1) MAX. UNIT − − GND 0.8 − − − − 0.3 0.6 0.8 ±20 ±20 V V V V V V V V V V V µA µA Ioff ICC ∆ICC IBHL IBHH IBHLO IBHHO Notes power off leakage supply VI or VO = 5.5 V quiescent supply current additional quiescent supply current per pin bushold LOW sustaining current bushold HIGH sustaining current bushold LOW overdrive current bushold HIGH overdrive current 0.0 3.6 2.7 to 3.6 3.0 3.0 3.6 3.6 − − − 60 −60 500 −500 − − − − − − − ±20 40 5000 − − − − µA µA µA µA µA µA µA 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 2. For bushold parts, the bushold circuit is switched off when VI > VCC allowing 5.5 V on the input terminal. 3. For I/O ports the parameter IOZ includes the input leakage current. 4. Valid for data inputs of bushold parts (74LVCH16245A) only. 5. For data inputs only, control inputs do not have a bushold circuit. 6. The specified sustaining current at the data input holds the input below the specified VI level. 7. The specified overdrive current at the data input forces the data input to the opposite input state. 2003 Nov 25 10 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state AC CHARACTERISTICS GND = 0 V; tr = tf ≤ 2.5 ns. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS Tamb = −40 to +85 °C tPHL/tPLH propagation delay nAn to nBn; nBn to nAn see Figs 6 and 8 1.2 2.7 3.0 to 3.6 tPZH/tPZL 3-state output enable time nOE to nAn; nOE to nBn see Figs 7 and 8 1.2 2.7 3.0 to 3.6 tPHZ/tPLZ 3-state output disable time nOE to nAn; nOE to nBn see Figs 7 and 8 1.2 2.7 3.0 to 3.6 Tamb = −40 to +125 °C tPHL/tPLH propagation delay nAn to nBn; nBn to nAn see Figs 6 and 8 1.2 2.7 3.0 to 3.6 tPZH/tPZL 3-state output enable time nOE to nAn; nOE to nBn see Figs 7 and 8 1.2 2.7 3.0 to 3.6 tPHZ/tPLZ 3-state output disable time nOE to nAn; nOE to nBn see Figs 7 and 8 1.2 2.7 3.0 to 3.6 Notes 1. All typical values are measured at Tamb = 25 °C. 2. Typical values are measured at VCC = 3.3 V and Tamb = 25 °C. − 1.0 1.0 − 1.5 1.0 − 1.5 1.5 − 1.0 1.0 − 1.5 1.0 − 1.5 1.5 VCC (V) MIN. 74LVC16245A; 74LVCH16245A TYP.(1) MAX. UNIT 13.0 2.7 2.2(2) 15.0 3.6 2.8(2) 11.0 3.4 3.2(2) − − − − − − − − − − 4.7 4.5 − 6.7 5.5 − 6.6 5.6 − 6.0 6.0 − 8.5 7.0 − 8.5 7.0 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 2003 Nov 25 11 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state AC WAVEFORMS 74LVC16245A; 74LVCH16245A handbook, halfpage VI nAn, nBn input GND t PHL VOH nBn, nAn output VOL VM t PLH VM MNA477 INPUT VCC 1.2 V 2.7 V 3.0 to 3.6 V VM 0.5 × VCC 1.5 V 1.5 V VCC 2.7 V 2.7 V VI tr = tf ≤ 2.5 ns ≤ 2.5 ns ≤ 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load. Fig.6 The input (nAn, nBn) to output (nBn, nAn) propagation delays. 2003 Nov 25 12 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 74LVC16245A; 74LVCH16245A handbook, full pagewidth VI nOE input GND tPLZ VCC output LOW-to-OFF OFF-to-LOW VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled VY VM VM VX tPZH tPZL VM outputs disabled outputs enabled MNA362 INPUT VCC 1.2 V 2.7 V 3.0 to 3.6 V VM 0.5 × VCC 1.5 V 1.5 V VCC 2.7 V 2.7 V VI tr = tf ≤ 2.5 ns ≤ 2.5 ns ≤ 2.5 ns VX = VOL + 0.3 V at VCC ≥ 2.7 V; VX = VOL + 0.1 V at VCC < 2.7 V. VY = VOH − 0.3 V at VCC ≥ 2.7 V; VY = VOH − 0.1 V at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.7 3-state enable and disable times. 2003 Nov 25 13 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 74LVC16245A; 74LVCH16245A handbook, full pagewidth VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL MNA616 VCC 1.2 V 2.7 V 3.0 to 3.6 V Note VI VCC 2.7 V 2.7 V CL 50 pF 50 pF 50 pF RL(1) 500 Ω 500 Ω 500 Ω VEXT tPLH/tPHL tPZH/tPHZ open open open GND GND GND tPZL/tPLZ 2 × VCC 2 × VCC 2 × VCC 1. The circuit performs better when RL = 1000 Ω. Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.8 Load circuitry for switching times. 2003 Nov 25 14 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state PACKAGE OUTLINES SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm 74LVC16245A; 74LVCH16245A SOT370-1 D E A X c y HE vM A Z 48 25 Q A2 A1 (A 3) θ Lp 1 bp 24 wM L detail X A pin 1 index e 0 5 scale 10 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.8 A1 0.4 0.2 A2 2.35 2.20 A3 0.25 bp 0.3 0.2 c 0.22 0.13 D (1) 16.00 15.75 E (1) 7.6 7.4 e 0.635 HE 10.4 10.1 L 1.4 Lp 1.0 0.6 Q 1.2 1.0 v 0.25 w 0.18 y 0.1 Z (1) 0.85 0.40 θ 8 0o o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT370-1 REFERENCES IEC JEDEC MO-118 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 2003 Nov 25 15 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 74LVC16245A; 74LVCH16245A TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1 D E A X c y HE vMA Z 48 25 Q A2 A1 pin 1 index Lp L (A 3) A θ 1 e bp 24 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions). UNIT mm A max. 1.2 A1 0.15 0.05 A2 1.05 0.85 A3 0.25 bp 0.28 0.17 c 0.2 0.1 D (1) 12.6 12.4 E (2) 6.2 6.0 e 0.5 HE 8.3 7.9 L 1 Lp 0.8 0.4 Q 0.50 0.35 v 0.25 w 0.08 y 0.1 Z 0.8 0.4 θ 8 0o o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT362-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 2003 Nov 25 16 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 74LVC16245A; 74LVCH16245A VFBGA56: plastic very thin fine-pitch ball grid array package; 56 balls; body 4.5 x 7 x 0.65 mm SOT702-1 D B A ball A1 index area E A A2 A1 detail X e1 e 1/2 e b ∅v M C A B ∅w M C C y1 C y K J H e G F E D C B A ball A1 index area 1 2 3 4 5 6 1/2 e e2 X DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1 A1 0.3 0.2 A2 0.7 0.6 b 0.45 0.35 D 4.6 4.4 E 7.1 6.9 e 0.65 e1 3.25 e2 5.85 v 0.15 w 0.08 y 0.08 y1 0.1 0 2.5 scale 5 mm OUTLINE VERSION SOT702-1 REFERENCES IEC JEDEC MO-225 JEITA EUROPEAN PROJECTION ISSUE DATE 02-08-08 03-07-01 2003 Nov 25 17 Philips Semiconductors Product specification 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION 74LVC16245A; 74LVCH16245A This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). II Preliminary data Qualification III Product data Production Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification  The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition  Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications  These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes  Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2003 Nov 25 18 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2003 SCA75 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R20/07/pp19 Date of release: 2003 Nov 25 Document order number: 9397 750 12155