74LVC16245AEV,118

74LVC16245A; 74LVCH16245A 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state Rev. 14 — 24 September 2021 Product data sheet 1. General description The 74LVC16245A; 74LVCH16245A is a 16-bit transceiver with 3-state outputs. The device can be used as two 8-bit transceivers or one 16-bit transceiver. The device features two output enables (1OE and 2OE) each controlling eight outputs, and two send/receive (1DIR and 2DIR) inputs for direction control. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. The 74LVCH16245A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs. 2. Features and benefits • • • • • • • • • • • Overvoltage tolerant inputs to 5.5 V Wide supply voltage range from 1.2 V to 3.6 V CMOS low power dissipation MULTIBYTE flow-through standard pin-out architecture Low inductance multiple power and ground pins for minimum noise and ground bounce Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation All data inputs have bus hold (74LVCH16245A only) Complies with JEDEC standard: • JESD8-7A (1.65 V to 1.95 V) • JESD8-5A (2.3 V to 2.7 V) • JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-B exceeds 200 V • CDM ANSI/ESDA/Jedec JS-002 exceeds 1000 V Specified from -40 °C to +85 °C and -40 °C to +125 °C 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 3. Ordering information Table 1. Ordering information Type number Temperature range 74LVC16245ADGG Package Name Description -40 °C to +125 °C TSSOP48 plastic thin shrink small outline package; SOT362-1 48 leads; body width 6.1 mm -40 °C to +125 °C TVSOP48 plastic thin shrink small outline package; 48 leads; body width 4.4 mm; lead pitch 0.4 mm 74LVCH16245ADGG 74LVC16245ADGV 74LVCH16245ADGV Version SOT480-1 4. Functional diagram 2DIR 1DIR 2OE 1OE 2A0 1A0 1B0 1A1 2B0 2A1 1B1 1A2 2B1 2A2 1B2 1A3 2B2 2A3 1B3 1A4 2B3 2A4 1B4 1A5 2B4 2A5 1B5 1A6 2B5 2A6 1B6 2B6 2A7 1A7 1B7 2B7 001aaa789 Fig. 1. Logic symbol 74LVC_LVCH16245A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 2 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 1OE 1DIR G3 3EN1[BA] 3EN2[AB] G6 6EN4[BA] 6EN5[AB] 2OE 2DIR 1A0 1B0 1 2 1A1 1B1 1A2 1B2 1A3 1B3 1A4 1B4 1A5 1B5 1A6 1B6 1A7 1B7 2A0 2B0 4 5 2A1 2B1 2A2 2B2 2A3 2B3 2A4 2B4 2A5 2B5 2A6 2B6 2B7 2A7 001aaa790 Fig. 2. IEC logic symbol VCC data input to internal circuit mna705 Fig. 3. Bus hold circuit 74LVC_LVCH16245A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 3 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 5. Pinning information 5.1. Pinning 74LVC16245A 74LVCH16245A 1DIR 1 48 1OE 1B0 2 47 1A0 1B1 3 46 1A1 GND 4 45 GND 1B2 5 44 1A2 1B3 6 VCC 7 43 1A3 42 VCC 1B4 8 41 1A4 1B5 9 40 1A5 GND 10 39 GND 1B6 11 38 1A6 1B7 12 37 1A7 2B0 13 36 2A0 2B1 14 35 2A1 GND 15 34 GND 2B2 16 33 2A2 2B3 17 32 2A3 VCC 18 31 VCC 2B4 19 30 2A4 2B5 20 29 2A5 GND 21 28 GND 2B6 22 27 2A6 2B7 23 26 2A7 2DIR 24 25 2OE 001aad110 Fig. 4. Pin configuration SOT362-1 (TSSOP48) and SOT480-1 (TVSOP48) 5.2. Pin description Table 2. Pin description Symbol Pin Description 1DIR, 2DIR 1, 24 direction control input 1B0 to 1B7 2, 3, 5, 6, 8, 9, 11, 12 data input/output 2B0 to 2B7 13, 14, 16, 17, 19, 20, 22, 23 data input/output GND 4, 10, 15, 21, 28, 34, 39, 45 ground (0 V) VCC 7, 18, 31, 42 supply voltage 1OE, 2OE 48, 25 output enable input (active LOW) 1A0 to 1A7 47, 46, 44, 43, 41, 40, 38, 37 data input/output 2A0 to 2A7 36, 35, 33, 32, 30, 29, 27, 26 data input/output 74LVC_LVCH16245A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 4 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Inputs Outputs nOE nDIR nAn nBn L L nAn = nBn inputs L H inputs nBn = nAn H X Z Z 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +6.5 V -50 - -0.5 +6.5 V - ±50 mA VCC supply voltage IIK input clamping current VI input voltage IOK output clamping current VO > VCC or VO < 0 V VO output voltage output HIGH or LOW [2] -0.5 VCC + 0.5 V output 3-state [2] -0.5 +6.5 V IO output current - ±50 mA ICC supply current - 100 mA IGND ground current -100 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 500 mW [1] [2] [3] VI < 0 V [1] VO = 0 V to VCC Tamb = -40 °C to +125 °C [3] mA The minimum input voltage ratings may be exceeded if the input current ratings are observed. The output voltage ratings may be exceeded if the output current ratings are observed. For SOT362-1 (TSSOP48) packages: Ptot derates linearly with 12.2 mW/K above 109 °C. For SOT480-1 (TVSOP48) packages: Ptot derates linearly with 5.5 mW/K above 60 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VCC 1.65 - 3.6 V 1.2 - 3.6 V supply voltage functional VI input voltage VO output voltage 0 - 5.5 V output HIGH or LOW 0 - VCC V output 3-state 0 - 5.5 V -40 - +125 °C Tamb ambient temperature in free air Δt/ΔV input transition rise and fall rate VCC = 1.2 V to 2.7 V 0 - 20 ns/V VCC = 2.7 V to 3.6 V 0 - 10 ns/V 74LVC_LVCH16245A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 5 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage Conditions -40 °C to +85 °C VCC = 1.2 V VCC = 1.65 V to 1.95 V -40 °C to +125 °C Unit Min Typ [1] Max Min Max 1.08 - - 1.08 - V 0.65VCC - - 0.65VCC - V VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V VCC = 1.2 V - - 0.12 - 0.12 V VCC = 1.65 V to 1.95 V - - 0.35VCC - VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V VCC - 0.2 - - VCC - 0.3 - V IO = -4 mA; VCC = 1.65 V 1.2 - - 1.05 - V IO = -8 mA; VCC = 2.3 V 1.8 - - 1.65 - V IO = -12 mA; VCC = 2.7 V 2.2 - - 2.05 - V IO = -18 mA; VCC = 3.0 V 2.4 - - 2.25 - V IO = -24 mA; VCC = 3.0 V 2.2 - - 2.0 - V - - 0.2 - 0.3 V IO = 4 mA; VCC = 1.65 V - - 0.45 - 0.65 V IO = 8 mA; VCC = 2.3 V - - 0.6 - 0.8 V IO = 12 mA; VCC = 2.7 V - - 0.4 - 0.6 V IO = 24 mA; VCC = 3.0 V - - 0.55 - 0.8 V [2] - ±0.1 ±5 - ±20 μA [2][3] - ±0.1 ±5 - ±20 μA HIGH-level output VI = VIH or VIL voltage IO = -100 μA; VCC = 1.65 V to 3.6 V LOW-level output VI = VIH or VIL voltage IO = 100 μA; VCC = 1.65 V to 3.6 V II input leakage current IOZ OFF-state output VI = VIH or VIL; current VO = 5.5 V or GND; VCC = 3.6 V IOFF power-off leakage VI or VO = 5.5 V; VCC = 0.0 V current - ±0.1 ±10 - ±20 μA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 3.6 V - 0.1 20 - 80 μA ΔICC additional supply current per input pin; VI = VCC - 0.6 V; IO = 0 A; VCC = 2.7 V to 3.6 V - 5 500 - 5000 μA CI input capacitance VCC = 0 V to 3.6 V; VI = GND to VCC - 5.0 - - - pF CI/O input/output capacitance VCC = 0 V to 3.6 V; VI = GND to VCC - 10 - - - pF IBHL bus hold LOW current VCC = 1.65; VI = 0.58 V 10 - - 10 - μA VCC = 2.3; VI = 0.7 V 30 - - 25 - μA VCC = 3.0; VI = 0.8 V 75 - - 60 - μA 74LVC_LVCH16245A Product data sheet VI = 5.5 V or GND; VCC = 3.6 V 0.35VCC V [4][5] All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 6 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state Symbol Parameter IBHH IBHLO bus hold HIGH current Conditions -40 °C to +85 °C Min Typ [1] Max Min Max -10 - - -10 - μA VCC = 2.3; VI = 1.7 V -30 - - -25 - μA VCC = 3.0; VI = 2.0 V -75 - - -60 - μA 200 - - 200 - μA 300 - - 300 - μA 500 - - 500 - μA -200 - - -200 - μA -300 - - -300 - μA -500 - - -500 - μA VCC = 1.65; VI = 1.07 V VCC = 1.95 V bus hold LOW overdrive current V = 2.7 V CC [4][5] [4][6] VCC = 3.6 V IBHHO VCC = 1.95 V bus hold HIGH overdrive current V = 2.7 V CC [4][6] VCC = 3.6 V [1] [2] [3] [4] [5] [6] -40 °C to +125 °C Unit All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 °C. The bus hold circuit is switched off when VI > VCC allowing 5.5 V on the input terminal. For I/O ports the parameter IOZ includes the input leakage current. Valid for data inputs of bus hold parts only (74LVCH16245A). Note that control inputs do not have a bus hold circuit. The specified sustaining current at the data input holds the input below the specified VI level. The specified overdrive current at the data input forces the data input to the opposite input state. 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 7. Symbol Parameter tpd propagation delay Conditions -40 °C to +85 °C Typ [1] Max Min Max - 13.0 - - - ns VCC = 1.65 V to 1.95 V 1.5 5.2 12.2 1.5 13.8 ns VCC = 2.3 V to 2.7 V 1.0 2.8 6.0 1.0 6.7 ns VCC = 2.7 V 1.0 2.7 4.7 1.0 6.0 ns 1.0 2.4 4.5 1.0 6.0 ns - 15.0 - - - ns VCC = 1.65 V to 1.95 V 1.5 5.9 15.0 1.5 16.9 ns VCC = 2.3 V to 2.7 V 1.0 3.3 7.9 1.0 8.8 ns VCC = 2.7 V 1.5 3.5 6.7 1.5 8.5 ns VCC = 3.0 V to 3.6 V 1.0 2.7 5.5 1.0 7.0 ns - 11.0 - - - ns VCC = 1.65 V to 1.95 V 1.0 4.9 13.1 1.0 14.7 ns VCC = 2.3 V to 2.7 V 0.5 2.7 7.1 0.5 7.9 ns VCC = 2.7 V 1.5 3.4 6.6 1.5 8.5 ns VCC = 3.0 V to 3.6 V 1.5 3.3 5.6 1.5 7.0 ns nAn to nBn; nBn to nAn; see Fig. 5 [2] VCC = 3.0 V to 3.6 V enable time nOE to nAn, nBn; see Fig. 6 [2] VCC = 1.2 V tdis disable time nOE to nAn, nBn; see Fig. 6 VCC = 1.2 V 74LVC_LVCH16245A Product data sheet Unit Min VCC = 1.2 V ten -40 °C to +125 °C [2] All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 7 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state Symbol Parameter CPD [1] [2] [3] power dissipation capacitance Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max VCC = 1.65 V to 1.95 V - 11.5 - - - pF VCC = 2.3 V to 2.7 V - 15.2 - - - pF VCC = 3.0 V to 3.6 V - 18.5 - - - pF per input; VI = GND to VCC [3] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively. tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in Volts N = number of inputs switching 2 Σ(CL × VCC × fo) = sum of the outputs. 10.1. Waveforms and test circuit VI nAn, nBn input VM GND t PHL t PLH VOH nBn, nAn output VM VOL mna477 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. The input (nAn, nBn) to output (nBn, nAn) propagation delays VI nOE input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ VOH tPZH VY output HIGH-to-OFF OFF-to-HIGH GND VM outputs enabled outputs disabled outputs enabled mna362 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. 3-state enable and disable times 74LVC_LVCH16245A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 8 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state Table 8. Measurement points Supply voltage Input Output VCC VM VI VM VX VY 1.2 V 0.5 × VCC VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V 1.65 V to 1.95 V 0.5 × VCC VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V 2.3 V to 2.7 V 0.5 × VCC VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V 2.7 V 1.5 V 2.7 V 1.5 V VOL + 0.3 V VOH - 0.3 V 3.0 V to 3.6 V 1.5 V 2.7 V 1.5 V VOL + 0.3 V VOH - 0.3 V VI negative pulse tW 90 % VM 0V tf 0V tr tr VI positive pulse VM 10 % tf 90 % VM VM 10 % tW VEXT VCC VI G RL VO DUT RT CL RL 001aae331 Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 7. Test circuit for measuring switching times Table 9. Test data Supply voltage Input Load VEXT VI tr, tf CL RL tPLH, tPHL tPLZ, tPZL tPHZ, tPZH 1.2 V VCC ≤ 2 ns 30 pF 1 kΩ open 2 × VCC GND 1.65 V to 1.95 V VCC ≤ 2 ns 30 pF 1 kΩ open 2 × VCC GND 2.3 V to 2.7 V VCC ≤ 2 ns 30 pF 500 Ω open 2 × VCC GND 2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 2 × VCC GND 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 2 × VCC GND 74LVC_LVCH16245A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 9 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 11. Package outline TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1 D E A X c v HE y A Z 48 25 Q A2 A1 (A3) pin 1 index A θ Lp 1 L 24 bp e detail X w 0 5 mm 2.5 scale Dimensions (mm are the original dimensions) Unit mm max nom min A 1.2 A1 A2 0.15 1.05 0.05 0.85 A3 0.25 bp c D(1) E(2) 0.28 0.2 12.6 6.2 0.17 0.1 12.4 6.0 e HE 0.5 8.3 7.9 L 1 Lp Q 0.8 0.50 0.4 0.35 v w 0.25 0.08 y 0.1 Z θ 0.8 8° 0.4 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. Outline version SOT362-1 Fig. 8. References IEC JEDEC JEITA sot362-1_po European projection Issue date 03-02-19 13-08-05 MO-153 Package outline SOT362-1 (TSSOP48) 74LVC_LVCH16245A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 10 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state TVSOP48: plastic thin shrink small outline package; 48 leads; body width 4.4 mm; lead pitch 0.4 mm SOT480-1 E D A X c y HE v M A Z 25 48 Q A2 (A 3) A1 pin 1 index A θ Lp L detail X 1 24 w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.85 0.25 0.23 0.13 0.20 0.09 9.8 9.6 4.5 4.3 0.4 6.6 6.2 1 0.7 0.5 0.4 0.3 0.2 0.07 0.08 0.4 0.1 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT480-1 Fig. 9. REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 03-02-18 19-12-11 MO-153 Package outline SOT480-1 (TVSOP48) 74LVC_LVCH16245A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 11 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 12. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 74LVC_LVCH16245A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 12 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC_LVCH16245A v.14 20210924 Product data sheet - 74LVC_LVCH16245A v.13 Modifications: • • • • 74LVC_LVCH16245A v.13 20190213 Modifications: • • • • • • Type numbers 74LVC16245ADL and 74LVCH16245ADL (SOT370-1/SSOP48) removed. Section 1 and Section 2 updated. Table 4: Derating values for Ptot total power dissipation updated. Fig. 9: Package outline drawing SOT480-1 (TVSOP48) updated. - 74LVC_LVCH16245A v.12 The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Type numbers 74LVC16245AEV and 74LVCH16245AEV (SOT702-1) removed. Type numbers 74LVC16245ABX and 74LVCH16245ABX (SOT1134-2) removed. Type numbers 74LVC16245ADGV and 74LVCH16245ADGV (SOT480-1) added. Package outline drawing Fig. 8 (TSSOP48) updated. 74LVC_LVCH16245A v.12 20120213 Modifications: • 74LVC_LVCH16245A v.11 20111208 Modifications: • 74LVC_LVCH16245A v.10 20110623 Modifications: • • Product data sheet Product data sheet - 74LVC_LVCH16245A v.11 For type number 74LVC16245ABX and 74LVCH16245ABX the sot code has changed to SOT1134-2. Product data sheet - 74LVC_LVCH16245A v.10 Table 4, Table 5, Table 6, Table 7, and Table 9: values added for lower voltage ranges. Product data sheet - 74LVC_LVCH16245A v.9 type numbers 74LVC16245ABQ and 74LVCH16245ABQ changed to 74LVC16245ABX and 74LVCH16245ABX. Pin configuration SOT1134-2 (HXQFN60): figure note 1 changed. 74LVC_LVCH16245A v.9 20100329 Product data sheet - 74LVC_LVCH16245A v.8 74LVC_LVCH16245A v.8 20081106 Product data sheet - 74LVC_LVCH16245A v.7 74LVC_LVCH16245A v.7 20031125 Product specification - 74LVC_LVCH16245A v.6 74LVC_LVCH16245A v.6 20030130 Product specification - 74LVC_LVCH16245A v.5 74LVC_LVCH16245A v.5 20021030 Product specification - 74LVC_H16245A v.4 74LVC_H16245A v.4 19970925 Product specification - 74LVC16245A_ 74LVCH16245A v.3 74LVC16245A_ 74LVCH16245A v.3 19970925 Product specification - 74LVC16245A v.2 74LVC16245A v.2 19970801 Product specification - 74LVC16245A v.1 74LVC16245A v.1 - - - - 74LVC_LVCH16245A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 13 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state 14. 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Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 14 / 15 74LVC16245A; 74LVCH16245A Nexperia 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Functional diagram.......................................................2 5. Pinning information......................................................4 5.1. Pinning.........................................................................4 5.2. Pin description............................................................. 4 6. Functional description................................................. 5 7. Limiting values............................................................. 5 8. Recommended operating conditions..........................5 9. Static characteristics....................................................6 10. Dynamic characteristics............................................ 7 10.1. Waveforms and test circuit........................................ 8 11. Package outline........................................................ 10 12. Abbreviations............................................................ 12 13. Revision history........................................................13 14. Legal information......................................................14 © Nexperia B.V. 2021. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 24 September 2021 74LVC_LVCH16245A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 15 / 15