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74LVC2G17

74LVC2G17

  • 厂商:

    ICST(IDT)

  • 封装:

  • 描述:

    74LVC2G17 - Dual non-inverting Schmitt-trigger with 5 V tolerant input - Integrated Circuit Systems

  • 数据手册
  • 价格&库存
74LVC2G17 数据手册
INTEGRATED CIRCUITS DATA SHEET 74LVC2G17 Dual non-inverting Schmitt-trigger with 5 V tolerant input Product specification 2003 Aug 13 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input FEATURES • Wide supply voltage range from 1.65 to 5.5 V • 5 V tolerant input/output for interfacing with 5 V logic • High noise immunity • Complies with JEDEC standard: – JESD8-7 (1.65 to 1.95 V) – JESD8-5 (2.3 to 2.7 V) – JESD8B/JESD36 (2.7 to 3.6 V). • ESD protection: – HBM EIA/JESD22-A114-A exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V. • ±24 mA output drive (VCC = 3.0 V) • CMOS low power consumption • Latch-up performance exceeds 250 mA • Direct interface with TTL levels • SOT363 and SOT457 package • Specified from −40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C. SYMBOL tPHL/tPLH PARAMETER CONDITIONS VCC = 2.5 V; CL = 30 pF; RL = 500 Ω VCC = 2.7 V; CL = 50 pF; RL = 500 Ω VCC = 3.3 V; CL = 50 pF; RL = 500 Ω VCC = 5.0 V; CL = 50 pF; RL = 500 Ω CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; ∑ (CL × VCC2 × fo) = sum of outputs. 2. The condition is VI = GND to VCC. input capacitance power dissipation capacitance per buffer VCC = 3.3 V; notes 1 and 2 DESCRIPTION APPLICATIONS 74LVC2G17 • Wave and pulse shapers for highly noisy environments. The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 and 5 V environment. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging back flow current through the device when it is powered down. The 74LVC2G17 provides two non-inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. TYPICAL 5.6 3.7 3.8 3.6 2.7 3.5 16.3 ns ns ns ns ns UNIT propagation delay inputs nA to output nY VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ pF pF 2003 Aug 13 2 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input FUNCTION TABLE See note 1. INPUT nA L H Note 1. H = HIGH voltage level; L = LOW voltage level. ORDERING INFORMATION PACKAGES TYPE NUMBER 74LVC2G17GW 74LVC2G17GV PINNING PIN 1 2 3 4 5 6 1A GND 2A 2Y VCC 1Y SYMBOL data input ground (0 V) data input data output supply voltage data output DESCRIPTION TEMPERATURE RANGE −40 to +125 °C −40 to +125 °C PINS 6 6 PACKAGE SC-88 SC-74 MATERIAL plastic plastic OUTPUT nY L H 74LVC2G17 CODE SOT363 SOT457 MARKING VV V17 2003 Aug 13 3 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 handbook, halfpage handbook, halfpage 1A 1 GND 2 2A 3 MNB065 6 1Y 1 1A 1Y 6 17 5 VCC 3 4 2Y MNB066 2A 2Y 4 Fig.1 Pin configuration. Fig.2 Logic symbol. handbook, halfpage 1 6 handbook, halfpage 1A 1Y 3 4 2A 2Y MNB068 MNB067 Fig.3 IEC logic symbol. Fig.4 Logic diagram. 2003 Aug 13 4 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times VCC = 1.65 to 2.7 V VCC = 2.7 to 5.5 V CONDITIONS 0 0 −40 0 0 MIN. 1.65 74LVC2G17 MAX. 5.5 5.5 VCC +125 20 10 V V V UNIT °C ns/V ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO ICC, IGND Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. PARAMETER supply voltage input diode current input voltage output diode current output voltage output source or sink current VCC or GND current storage temperature power dissipation Tamb = −40 to +125 °C VI < 0 note 1 VO > VCC or VO < 0 active mode; notes 1 and 2 VO = 0 to VCC CONDITIONS − −0.5 − −0.5 − − −65 − MIN. −0.5 MAX. +6.5 −50 +6.5 ±50 +6.5 ±50 ±100 +150 300 V mA V mA V mA mA °C mW UNIT VCC + 0.5 V Power-down mode; notes 1 and 2 −0.5 2003 Aug 13 5 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 to +85 °C VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA VOH HIGH-level output voltage VI = VIH or VIL IO = −100 µA IO = −4 mA IO = −8 mA IO = −12 mA IO =− 24 mA IO = −32 mA ILI Ioff ICC ∆ICC input leakage current power OFF leakage current VI = 5.5 V or GND VI or VO = 5.5 V 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 5.5 0 5.5 2.3 to 5.5 VCC − 0.1 1.2 1.9 2.2 2.3 3.8 − − − − − − − − − − ±0.1 ±0.1 0.1 5 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 − − − − − − − − − − − − VCC (V) MIN. TYP.(1) 74LVC2G17 MAX. UNIT 0.1 0.45 0.3 0.4 0.55 0.55 − − − − − − ±5 ±10 10 500 V V V V V V V V V V V V µA µA µA µA quiescent supply current VI = VCC or GND; IO = 0 additional quiescent supply current per pin VI = VCC − 0.6 V; IO = 0 2003 Aug 13 6 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 to +125 °C VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA VOH HIGH-level output voltage VI = VIH or VIL IO = −100 µA IO = −4 mA IO = −8 mA IO = −12 mA IO =− 24 mA IO = −32 mA ILI Ioff ICC ∆ICC Note 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. input leakage current power OFF leakage current VI = 5.5 V or GND VI or VO = 5.5 V 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 5.5 0 5.5 2.3 to 5.5 VCC − 0.1 0.95 1.7 1.9 2.0 3.4 − − − − − − − − − − ±0.1 − − − 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 − − − − − − − − − − − − VCC (V) MIN. 74LVC2G17 TYP.(1) MAX. UNIT 0.1 0.70 0.45 0.60 0.80 0.80 − − − − − − ±20 ±20 40 5000 V V V V V V V V V V V V µA µA µA µA quiescent supply current VI = VCC or GND; IO = 0 additional quiescent supply current per pin VI = VCC − 0.6 V; IO = 0 2003 Aug 13 7 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input TRANSFER CHARACTERISTICS Voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL Tamb = −40 to +85 °C VT+ positive-going threshold see Figs 5 and 6 1.8 2.3 3.0 4.5 5.5 VT− negative-going threshold see Figs 5 and 6 1.8 2.3 3.0 4.5 5.5 VH hysteresis (VT+ − VT−) see Figs 5, 6 and 7 1.8 2.3 3.0 4.5 5.5 Tamb = −40 to +125 °C VT+ positive-going threshold see Figs 5 and 6 1.8 2.3 3.0 4.5 5.5 VT− negative-going threshold see Figs 5 and 6 1.8 2.3 3.0 4.5 5.5 VH hysteresis (VT+ − VT−) see Figs 5, 6 and 7 1.8 2.3 3.0 4.5 5.5 Notes 1. All typical values are measured at Tamb = 25 °C. 0.70 1.00 1.30 1.90 2.20 0.25 0.40 0.60 1.00 1.20 0.15 0.25 0.40 0.60 0.70 − − − − − − − − − − − − − − − 0.70 1.00 1.30 1.90 2.20 0.25 0.40 0.60 1.00 1.20 0.15 0.25 0.40 0.60 0.70 1.10 1.40 1.76 2.47 2.91 0.61 0.80 1.04 1.55 1.86 0.49 0.60 0.73 0.92 1.02 PARAMETER WAVEFORMS VCC (V) MIN. 74LVC2G17 TYP.(1) MAX. UNIT 1.50 1.80 2.20 3.10 3.60 0.90 1.15 1.50 2.00 2.30 1.00 1.10 1.20 1.50 1.70 V V V V V V V V V V V V V V V 1.70 2.00 2.40 3.30 3.80 1.10 1.35 1.70 2.20 2.50 1.20 1.30 1.40 1.70 1.90 V V V V V V V V V V V V V V V 2003 Aug 13 8 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 handbook, halfpage VO handbook, halfpage VI VT+ VT− VH VH VT− VT+ VI MNB069 VO MNB070 VT+ and VT− are between limits of 20% and 70%. Fig.5 Transfer characteristic. Fig.6 Definition of VT+, VT− and VH. handbook, halfpage ICC 14 MNB071 (mA) 12 10 8 6 4 2 0 0 0.5 1 1.5 VI (V) 2 VCC = 3.0 V. Fig.7 Typical 74LVC2G17 transfer characteristic. 2003 Aug 13 9 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input AC CHARACTERISTICS GND = 0 V. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS Tamb = −40 to +85 °C tPHL/tPLH propagation delay nA to nY see Figs 8 and 9 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Tamb = −40 to +125 °C tPHL/tPLH propagation delay nA to nY see Figs 8 and 9 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Note 1. All typical values are measured at Tamb = 25 °C. 1.5 1.0 1.0 1.0 1.0 − − − − − 1.5 1.0 1.0 1.0 1.0 5.6 3.7 3.8 3.6 2.7 VCC (V) MIN. TYP.(1) 74LVC2G17 MAX. UNIT 10.5 6.5 6.5 5.7 4.3 ns ns ns ns ns 13.1 8.5 8.5 7.1 5.4 ns ns ns ns ns 2003 Aug 13 10 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input AC WAVEFORMS handbook, halfpage VI 74LVC2G17 nA input GND tPLH VOH nY output VOL VM VM tPHL VM VM MNB072 INPUT VCC VM VCC VCC 2.7 V 2.7 V VCC VI tr = tf ≤ 2.0 ns ≤ 2.0 ns ≤ 2.5 ns ≤ 2.5 ns ≤ 2.5 ns 1.65 to 1.95 V 0.5 × VCC 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 4.5 to 5.5 V 0.5 × VCC 1.5 V 1.5 V 0.5 × VCC VOL and VOH are typical output voltage drop that occur with the output load. Fig.8 The input (nA) to output (nY) propagation delays and the output transition times. handbook, full pagewidth VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL MNA616 VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 4.5 to 5.5 V VI VCC VCC 2.7 V 2.7 V VCC CL 30 pF 30 pF 50 pF 50 pF 50 pF RL 1 kΩ 500 Ω 500 Ω 500 Ω 500 Ω VEXT tPLH/tPHL open open open open open tPZH/tPHZ GND GND GND GND GND tPZL/tPLZ 2 × VCC 2 × VCC 6V 6V 2 × VCC Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.9 Load circuitry for switching times. 2003 Aug 13 11 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input APPLICATION INFORMATION 74LVC2G17 handbook, halfpage 50 ICC (mA) 40 MNB073 30 20 10 0 2 3 4 5 VCC (V) 6 Linear change of VI between 0.8 to 2.0 V. All values given are typical unless otherwise specified. Fig.10 Average ICC for 74LVC2G17 Schmitt-trigger devices. 2003 Aug 13 12 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input PACKAGE OUTLINES Plastic surface mounted package; 6 leads 74LVC2G17 SOT363 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 1 e1 e 2 bp 3 wM B detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT363 REFERENCES IEC JEDEC EIAJ SC-88 EUROPEAN PROJECTION ISSUE DATE 97-02-28 2003 Aug 13 13 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 Plastic surface mounted package; 6 leads SOT457 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 c 1 2 3 Lp e bp wM B detail X 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 0.1 0.013 bp 0.40 0.25 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT457 REFERENCES IEC JEDEC EIAJ SC-74 EUROPEAN PROJECTION ISSUE DATE 97-02-28 01-05-04 2003 Aug 13 14 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION 74LVC2G17 This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). II Preliminary data Qualification III Product data Production Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification  The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition  Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications  These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes  Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2003 Aug 13 15 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2003 SCA75 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613508/01/pp16 Date of release: 2003 Aug 13 Document order number: 9397 750 11688
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