ISL28486

® ISL28286, ISL28486 Data Sheet June 28, 2007 FN6312.1 Dual and Quad Micropower Single Supply Rail-to-Rail Input and Output (RRIO) Precision Op Amp The ISL28286 and ISL28486 are dual and quad channel micropower operational amplifiers optimized for single supply operation over the 2.4V to 5V range. They can be operated from one lithium cell or two Ni-Cd batteries. For equivalent performance in a single channel op amp reference EL8186. These devices feature an Input Range Enhancement Circuit (IREC) which enables them to maintain CMRR performance for input voltages 10% above the positive supply rail and down to the negative supply. The output operation is rail to rail. The ISL28286 and ISL28486 draw minimal supply current while meeting excellent DC-accuracy, AC-performance, noise and output drive specifications. The ISL28286 contains a power down enable pin that reduces the power supply current to less than 4µA max in the disabled state. Features • Low power 120µA typical supply current (ISL28286) • 600µV maximum offset voltage • 500pA typical input bias current • 400kHz typical gain-bandwidth product • 115dB typical PSRR and CMRR • Single supply operation down to 2.4V • Input is capable of swinging above V+ and to V- (ground sensing) • Rail-to-rail input and output (RRIO) • Pb-free plus anneal available (RoHS compliant) Applications • Battery- or solar-powered systems • 4mA to 25mA current loops • Handheld consumer products • Medical devices Pinouts ISL28286 (10 LD MSOP) TOP VIEW IN+_A 1 EN_A 2 V- 3 EN_B 4 IN+_B 5 + + 10 IN-_A 9 OUT_A 8 V+ 7 OUT_B 6 IN-_B • Thermocouple amplifiers • Photodiode pre-amps • pH probe amplifiers Ordering Information PART NUMBER (Note) ISL28286FUZ* ISL28486FAZ* PART MARKING 8286Z 28486 FAZ PACKAGE (Pb-free) PKG. DWG. # 10 Ld MSOP MDP0043 16 Ld QSOP MDP0040 *Add “-T7” suffix for tape and reel. Please refer to TB347 for details on reel specifications. ISL28486 (16 LD QSOP) TOP VIEW OUT_A 1 IN-_A 2 + IN+_A 3 V+ 4 IN+_B 5 IN-_B 6 OUT_B 7 NC 8 + + + 16 OUT_D 15 IN-_D 14 IN+_D 13 V12 IN+_C 11 IN-_C 10 OUT_C 9 NC NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006, 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL28286, ISL28486 Absolute Maximum Ratings (TA = +25°C) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V Output Short-Circuit Duration. . . . . . . . . . . . . . . . . . . . . . . Indefinite ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V Thermal Information Thermal Resistance θJA (°C/W) 10 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . 115 16 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . . 112 Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. DESCRIPTION CONDITIONS MIN (Note 1) TYP MAX (Note 1) UNIT PARAMETER DC SPECIFICATIONS VOS Δ V OS --------------ΔT IOS IB CMIR CMRR PSRR AVOL Input Offset Voltage Input Offset Voltage vs Temperature Input Offset Current Input Bias Current Common-Mode Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain Guaranteed by CMRR VCM = 0V to 5V V+ = 2.4V to 5V VO = 0.5V to 4.5V, RL = 100kΩ VO = 0.5V to 4.5V, RL = 1kΩ -600 -650 ±20 600 650 µV µV/°C 0.7 -2.5 -2.5 -2 -2.5 0 90 80 90 80 275 275 115 115 500 95 3 130 4.990 4.970 4.800 4.750 4.996 4.880 120 240 4 156 175 315 350 7 9 6 30 175 225 ±0.25 2.5 2.5 2 2.5 5 nA nA V dB dB V/mV V/mV mV mV V V µA µA µA ±0.5 VOUT Maximum Output Voltage Swing Output low, RL = 100kΩ Output low, RL = 1kΩ Output high, RL = 100kΩ Output high, RL = 1kΩ IS,ON Supply Current, Enabled ISL28286, All channels enabled. ISL28486, All channels enabled. IS,OFF Supply Current, Disabled ISL28286, All channels disabled. 2 FN6312.1 June 28, 2007 ISL28286, ISL28486 Electrical Specifications V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. (Continued) DESCRIPTION Short Circuit Sourcing Capability Short Circuit Sinking Capability Supply Operating Range EN Pin High Level (ISL28286) EN Pin Low Level (ISL28286 EN Pin Input High Current (ISL28286) EN Pin Input Low Current (ISL28286) VEN = V+ VEN = V0.7 0 R L = 1 0Ω R L = 1 0Ω V+ to VCONDITIONS MIN (Note 1) 29 23 24 19 2.4 2 0.8 1.3 1.5 0.1 TYP 31 26 5 MAX (Note 1) UNIT mA mA V V V µA µA PARAMETER ISC+ ISCVSUPPLY VENH VENL IENH IENL AC SPECIFICATONS GBW en Gain Bandwidth Product Input Noise Voltage Peak-to-Peak Input Noise Voltage Density in CMRR @ 60Hz PSRR+ @ 120Hz PSRR- @ 120Hz Input Noise Current Density Input Common Mode Rejection Ratio Power Supply Rejection Ratio (V+) Power Supply Rejection Ratio (V-) AV = 100, RF = 100kΩ, RG = 1kΩ, RL = 10kΩ to VCM f = 0.1Hz to 10Hz fO = 1kHz fO = 1kHz VCM = 1VP-P, RL = 10kΩ to VCM V+, V- = ±12V and ±2.5V, VSOURCE = 1VP-P, RL = 10kΩ to VCM V+, V- = ±12V and ±2.5V VSOURCE = 1VP-P, RL = 10kΩ to VCM 400 4.5 50 0.18 78 -105 -73 kHz µVP-P nV/√Hz pA/√Hz dB dB dB TRANSIENT RESPONSE SR tEN Slew Rate Enable to Output Turn-on Delay Time, 10% EN to 10% VOUT, (ISL28286) Enable to Output Turn-off Delay Time, 10% EN to 10% VOUT, (ISL28286) NOTE: 1. Parts are 100% tested at +25°C. Over temperature limits established by characterization and are not production tested. ±0.10 ±0.09 ±0.17 ±0.20 ±0.25 V/µs µs µs VEN = 5V to 0V, AV = -1, Rg = Rf = RL = 1k to VCM VEN = 0V to 5V, AV = -1, Rg = Rf = RL = 1k to VCM 2 0.1 3 FN6312.1 June 28, 2007 ISL28286, ISL28486 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open +1 0 -1 -2 GAIN (dB) -3 -4 -5 -6 -7 -8 1k 10k 100k FREQUENCY (Hz) 1M 5M VOUT = 50mVp-p AV = 1 CL = 3pF RF = 0/RG = INF V+, V- = ±2.5V RL = 1k V+, V- = ±2.5V RL = 10k V+, V- = ±1.2V RL = 1 k GAIN (dB) V+, V- = ±1.2V RL = 10k 45 40 35 30 25 20 AV = 100 V+, V- = ±2.5V 15 RL = 10kΩ CL = 2.7pF 10 R /R = 99.02 FG V+, V- = ±1.0V RF = 221kΩ 5 RG = 2.23kΩ 0 100 1k 10k 100k FREQUENCY (Hz) V+, V- = ±1.25V 1M FIGURE 1. FREQUENCY RESPONSE vs SUPPLY VOLTAGE FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE 120 80 GAIN (dB) 40 0 PHASE -40 -80 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) GAIN 80 40 PHASE (°) 0 -40 -80 -120 10M GAIN (dB) 100 80 PHASE 60 40 200 150 100 50 0 PHASE (°) 20 0 -20 10 GAIN -50 -100 -150 1M 100 1k 10k 100k FREQUENCY (Hz) FIGURE 3. AVOL vs FREQUENCY @ 100kΩ LOAD FIGURE 4. AVOL vs FREQUENCY @ 1kΩ LOAD 120 110 100 90 PSRR (dB) 80 70 60 50 40 30 20 10 0 10 PSRR V+ = 5VDC VSOURCE = 1VP-P RL = 100kΩ AV = +1 100 1k 10k 100k 1M PSRR + CMRR(dB) 100 90 80 70 60 50 40 30 20 10 10 100 1k V+ = 5VDC VSOURCE = 1VP-P RL = 100kΩ AV = +1 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 5. PSRR vs FREQUENCY FIGURE 6. CMRR vs FREQUENCY 4 FN6312.1 June 28, 2007 ISL28286, ISL28486 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 10.00 CURRENT NOISE (pA/√Hz) VOLTAGE NOISE (nV/√Hz) (Continued) 1k 1.00 100 0.10 10 0.01 1 10 100 1k 10k 100k FREQUENCY (Hz) 1 1 10 100 1k 10k 100k FREQUENCY (Hz) FIGURE 7. CURRENT NOISE vs FREQUENCY FIGURE 8. VOLTAGE NOISE vs FREQUENCY 2.56 VOLTAGE NOISE (1µV/DIV) 2.54 2.52 VOLTS (V) 2.50 2.48 2.46 4.5µVP-P 2.44 2.42 TIME (1s/DIV) 0 2 4 6 8 10 12 TIME (µs) 14 16 18 20 V+ = 5VDC VOUT = 0.1VP-P RL = 500Ω AV = +1 VOUT VIN FIGURE 9. 0.1Hz TO 10Hz INPUT VOLTAGE NOISE FIGURE 10. SMALL SIGNAL TRANSIENT RESPONSE 5.0 VIN 4.0 3.0 2.0 1.0 VOUT 0 0 100 200 300 TIME (µs) 400 VIN 500 0.1V/DIV V+ = 5VDC VOUT = 0.1VP-P RL = 500Ω AV = -2 VOUT 1V/DIV EN INPUT AV = -1 VIN = 200mVP-P V+ = 5V VOLTS (V) 0 VOUT 0 10µs/DIV FIGURE 11. LARGE SIGNAL TRANSIENT RESPONSE FIGURE 12. ENABLE TO OUTPUT DELAY TIME 5 FN6312.1 June 28, 2007 ISL28286, ISL28486 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 100 80 60 VOS (μV) 40 20 0 -20 -40 -60 -80 -100 -1 V+ = 5V RL = OPEN RF = 100k, RG = 100 AV = +1000 0 1 2 3 VCM (V) 4 5 6 I-BIAS (nA) (Continued) 100 80 60 40 20 0 -20 -40 -60 -80 -100 -1 V + = 5V RL = OPEN RF= 100k, RG = 100 AV = +1000 0 1 2 3 VCM (V) 4 5 6 FIGURE 13. INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE FIGURE 14. INPUT OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE 155 135 CURRENT (μA) 115 95 75 55 35 2.0 340 N = 1150 320 MAX 300 280 260 240 220 2.5 3.0 3.5 4.0 4.5 5.0 5.5 200 -40 -20 0 20 40 60 80 100 120 MEDIAN SUPPLY CURRENT (µA) MIN SUPPLY VOLTAGE (V) TEMPERATURE (°C) FIGURE 15. ISL28286 SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 16. ISL28486 SUPPLY CURRENT vs TEMPERATURE, V+, V- = ±2.5V ENABLED, RL = INF 4.8 4.6 4.4 CURRENT (μA) 4.2 4.0 3.8 3.6 3.4 3.2 -40 N = 12 800 N = 1150 600 MEDIAN MAX MIN VOS (μV) 400 200 MEDIAN 0 -200 -400 -600 MIN MAX -20 0 20 40 60 80 100 120 -800 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 17. ISL28286 SUPPLY CURRENT vs TEMPERATURE, V+, V- = ±2.5V DISABLED, RL = INF FIGURE 18. VOS vs TEMPERATURE, VIN = 0V, V+, V- = ±2.5V 6 FN6312.1 June 28, 2007 ISL28286, ISL28486 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 800 600 400 IBIAS + (nA) VOS (μV) 200 MEDIAN 0 -200 -400 -600 -800 -40 -20 0 20 40 60 80 100 120 MIN N = 1150 MAX 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN (Continued) N = 1150 MAX TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 19. VOS vs TEMPERATURE, VIN = 0V, V+, V- = ±1.2V FIGURE 20. IBIAS + vs TEMPERATURE, V+, V- = ±2.5V 3.0 2.5 2.0 1.5 IBIAS - (nA) 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -2.5 -40 N = 1150 MAX IBIAS + (nA) MEDIAN 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 MIN -1.0 -1.5 MIN MEDIAN N = 1150 MAX -20 0 20 40 60 80 100 120 -2.0 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 21. IBIAS - vs TEMPERATURE, V+, V- = ±2.5V FIGURE 22. IBIAS + vs TEMPERATURE, V+, V- = ±1.2V 3.0 2.5 2.0 1.5 IBIAS - (nA) N = 1150 2.5 2.0 MAX IOS (nA) MEDIAN 1.5 1.0 0.5 0.0 -0.5 -1.0 MIN -1.5 -2.0 N = 1150 MAX MEDIAN 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -40 -20 0 20 MIN 40 60 80 100 120 -2.5 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 23. IBIAS - vs TEMPERATURE, V+, V- = ±1.2V FIGURE 24. IOS vs TEMPERATURE, V+, V- = ±2.5V 7 FN6312.1 June 28, 2007 ISL28286, ISL28486 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 1070 970 870 AVOL (V/mV) 770 670 570 470 370 270 -40 -20 0 20 50 MIN 40 60 80 100 120 30 -40 -20 0 20 40 60 80 100 120 MEDIAN MAX AVOL (V/mV) N = 1150 150 N = 1150 130 MAX 110 90 MEDIAN 70 MIN (Continued) TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 25. AVOL vs TEMPERATURE, V+, V- = ±2.5V, RL = 100k FIGURE 26. AVOL vs TEMPERATURE, V+, V- = ±2.5V, RL = 1k 140 N = 1150 130 120 PSRR (dB) MEDIAN 110 100 MIN 90 80 -40 MAX 140 N = 1150 130 120 MEDIAN 110 100 MIN 90 80 -40 MAX CMRR (dB) -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 27. CMRR vs TEMPERATURE, VCM = +2.5V TO -2.5V, V+, V- = ±2.5V FIGURE 28. PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.75V 4.91 N = 1150 4.90 4.89 VOUT (V) 4.88 4.87 MIN 4.86 4.85 MAX VOUT (V) 4.9972 N = 1150 4.9970 4.9968 MAX 4.9966 4.9964 4.9962 MIN 4.9960 4.9958 -40 -20 0 20 40 60 80 100 120 4.9956 -40 -20 0 20 40 60 80 100 120 MEDIAN MEDIAN TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 29. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V, RL = 1k FIGURE 30. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V, RL = 100k 8 FN6312.1 June 28, 2007 ISL28286, ISL28486 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 170 N = 1150 160 150 VOUT (mV) 140 130 MIN 120 110 100 90 -40 -20 0 20 40 60 80 100 120 VOUT (mV) MAX MEDIAN 3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN N = 1150 (Continued) MAX TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 31. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V, RL = 1k FIGURE 32. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V, RL = 100k + OUTPUT SHORT CIRCUIT CURRENT (mA) N = 1150 39 37 MAX 35 33 MEDIAN 31 29 MIN 27 25 -40 -20 0 20 40 60 80 100 120 + OUTPUT SHORT CIRCUIT CURRENT (mA) 41 -21 N = 1150 -23 MAX -25 -27 MIN -29 -31 -33 -40 MEDIAN -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 33. + OUTPUT SHORT CIRCUIT CURRENT vs TEMPERATURE, VIN = -2.55V, RL = 10, V+, V- = ±2.5V FIGURE 34. - OUTPUT SHORT CIRCUIT CURRENT vs TEMPERATURE, VIN = -2.55V, RL = 10, V+, V- = ±2.5V 0.24 N = 1150 0.22 + SLEW RATE (V/µs) - SLEW RATE (V/µs) 0.20 MAX 0.18 0.16 MIN 0.14 0.12 0.10 -40 -20 0 20 40 60 80 100 120 MEDIAN 0.24 N = 1150 0.22 0.20 MAX 0.18 0.16 0.14 0.12 0.10 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 35. + SLEW RATE vs TEMPERATURE, VOUT = 1.5V, AV = +2 FIGURE 36. - SLEW RATE vs TEMPERATURE, VOUT = 1.5V, AV = +2 9 FN6312.1 June 28, 2007 ISL28286, ISL28486 Pin Descriptions ISL28286 ISL28486 (10 LD MSOP) (16 LD QSOP) PIN NAME EQUIVALENT CIRCUIT 1 2 3 4 5 6 7 8 9 10 5 6 7 4 1 2 10 11 12 14 15 16 8, 9 13 3 IN+_A EN_A VEN_B IN+_B IN-_B OUT_B V+ OUT_A IN-_A OUT_C IN-_C IN+_C IN+_D IN-_D OUT_D NC Circuit 1 Circuit 2 Circuit 4 Circuit 2 Circuit 1 Circuit 1 Circuit 3 Circuit 4 Circuit 3 Circuit 1 Circuit 3 Circuit 1 Circuit 1 Circuit 1 Circuit 1 Circuit 3 DESCRIPTION Amplifier A non-inverting input Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. Negative power supply Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. Amplifier B non-inverting input Amplifier B inverting input Amplifier B output Positive power supply Amplifier A output Amplifier A inverting input Amplifier C output Amplifier C inverting input Amplifier C non-inverting input Amplifier D non-inverting input Amplifier D inverting input Amplifier D output No internal connection V+ V+ LOGIC PIN VCIRCUIT 2 CIRCUIT 3 OUT VVCIRCUIT 4 V+ IN- V+ CAPACITIVELY COUPLED ESD CLAMP IN+ V- CIRCUIT 1 10 FN6312.1 June 28, 2007 ISL28286, ISL28486 Applications Information Introduction The ISL28286 and ISL28486 are dual and quad BiCMOS rail-to-rail input, output (RRIO) micropower precision operational amplifiers. These devices are designed to operate from a single supply (2.4V to 5.0V) or dual supplies (±1.2V to ±2.5V) while drawing only 120μA (ISL28286) of supply current. This combination of low power and precision performance makes these devices suitable for solar and battery power applications. direction. Both parts with a 100kΩ load will swing to within 4mV of the supply rails. Enable/Disable Feature The ISL28286 offers two EN pins (EN_A and EN_B) which disable the op amp when pulled up to at least 2.0V. In the disabled state (output in a high impedance state), the part consumes typically 4µA. By disabling the part, multiple parts can be connected together as a MUX. The outputs are tied together in parallel and a channel can be selected by the EN pins. The EN pins also have an internal pull-down. If left open, the EN pins will pull to the negative rail and the op amp will be enabled by default. Rail-to-Rail Input Many rail-to-rail input stages use two differential input pairs, a long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties have to be paid for this circuit topology. As the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. The ISL28286 and ISL28486 achieve input rail-to-rail without sacrificing important precision specifications and degrading distortion performance. The devices’ input offset voltage exhibits a smooth behavior throughout the entire commonmode input range. The input bias current versus the common-mode voltage range gives us an undistorted behavior from typically down to the negative rail to 10% higher than the V+ rail (0.5V higher than V+ when V+ equals 5V). Using Only One Channel The ISL28286 and ISL28486 are dual and quad channel op amps. If the application only requires one channel when using the ISL28286 or less than 4 channels when using the ISL28486, the user must configure the unused channel(s) to prevent them from oscillating. The unused channel(s) will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 37). + 1/2 ISL28286 1/4 ISL28486 Input Protection All input terminals have internal ESD protection diodes to positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. Both parts have additional back-to-back diodes across the input terminals. If overdriving the inputs is necessary, the external input current must never exceed 5mA. External series resistors may be used as an external protection to limit excessive external voltage and current from damaging the inputs. FIGURE 37. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Proper Layout Maximizes Performance To achieve the maximum performance of the high input impedance and low offset voltage of the ISL28286 and ISL28486, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasitic resistance on the board. When input leakage current is a concern, the use of guard rings around the amplifier inputs will further reduce leakage currents. Figure 38 shows a guard ring example for a unity gain amplifier that uses the low impedance amplifier output at the same voltage as the high impedance input to eliminate surface leakage. The guard ring does not need to be a specific width, but it should form a continuous loop around both inputs. For further reduction of leakage currents, components can be mounted to the PC board using Teflon standoff insulators. Input Bias Current Compensation The ISL28286 and ISL28486 contain an input bias cancellation circuit which reduces the bias currents down to a typical of 500pA while maintaining an excellent bandwidth for a micro-power operational amplifier. The input stage transistors are still biased with adequate current for speed but the canceling circuit sinks most of the base current, leaving a small fraction as input bias current. Rail-to-Rail Output A pair of complementary MOSFET devices are used to achieve the rail-to-rail output swing. The NMOS sinks current to swing the output in the negative direction. The PMOS sources current to swing the output in the positive 11 FN6312.1 June 28, 2007 ISL28286, ISL28486 HIGH IMPEDANCE INPUT IN V+ where: • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) • PDMAX for each amplifier can be calculated as follows: V OUTMAX PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × --------------------------RL (EQ. 2) FIGURE 38. GUARD RING EXAMPLE FOR UNITY GAIN AMPLIFIER where: • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation of 1 amplifier • VS = Supply voltage (Magnitude of V+ and V-) • IMAX = Maximum supply current of 1 amplifier • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance Current Limiting The ISL28286 and ISL28486 have no internal currentlimiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. Power Dissipation It is possible to exceed the +150°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related as follows: T JMAX = T MAX + ( θ JA xPD MAXTOTAL ) (EQ. 1) 12 FN6312.1 June 28, 2007 ISL28286, ISL28486 Mini SO Package Family (MSOP) 0.25 M C A B D N A (N/2)+1 MDP0043 MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. ±0.05 ±0.09 +0.07/-0.08 ±0.05 ±0.10 ±0.15 ±0.10 Basic ±0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. E E1 PIN #1 I.D. A2 b c B 1 (N/2) D E E1 e C SEATING PLANE 0.10 C N LEADS b H e L L1 N 0.08 M C A B L1 A c SEE DETAIL "X" 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. A2 GAUGE PLANE L DETAIL X 0.25 A1 3° ±3° 13 FN6312.1 June 28, 2007 ISL28286, ISL28486 Quarter Size Outline Plastic Packages Family (QSOP) A D N (N/2)+1 MDP0040 QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY INCHES SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES PIN #1 I.D. MARK A A1 A2 b 0.068 0.006 0.056 0.010 0.008 0.193 0.236 0.154 0.025 0.025 0.041 16 0.068 0.006 0.056 0.010 0.008 0.341 0.236 0.154 0.025 0.025 0.041 24 0.068 0.006 0.056 0.010 0.008 0.390 0.236 0.154 0.025 0.025 0.041 28 Max. ±0.002 ±0.004 ±0.002 ±0.001 ±0.004 ±0.008 ±0.004 Basic ±0.009 Basic Reference 1, 3 2, 3 Rev. F 2/07 E E1 1 B 0.010 CAB (N/2) c D E e C SEATING PLANE 0.004 C 0.007 CAB b H E1 e L L1 N L1 A c SEE DETAIL "X" NOTES: 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 0.010 A2 GAUGE PLANE L 4°±4° DETAIL X A1 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 14 FN6312.1 June 28, 2007