IS31AP2005
2.95W MONO FILTER-LESS CLASS-D AUDIO POWER AMPLIFIER
June 2017
GENERAL DESCRIPTION
FEATURES
The IS31AP2005 is a high efficiency, 2.95W mono
Class-D audio power amplifier. A low noise, filter-less
PWM architecture eliminates the output filter, reducing
external component count, system cost, and
simplifying design.
Operating in a single 5V supply, IS31AP2005 is
capable of driving 4Ω speaker load at a continuous
average output of 2.95W with 10% THD+N. The
IS31AP2005 has high efficiency with speaker load
compared to a typical Class-AB amplifier.
5V supply at THD= 10%
- 2.95W into 4Ω (Typ.)
- 1.70W into 8Ω (Typ.)
Efficiency at 5V:
- 83% at 400mW with a 4Ω speaker
- 89% at 400mW with an 8Ω speaker
Optimized PWM output stage eliminates LC
output filter
Fully differential design reduces RF rectification
and eliminates bypass capacitor
Integrated pop-and-click suppression circuitry
Short-circuit and thermal protect
DFN-8 (3mm×3mm) and MSOP-8 packages
RoHS compliant and 100% lead (Pb)-free
In cellular handsets, the earpiece, speaker phone, and
melody ringer can each be driven by the IS31AP2005.
The gain of IS31AP2005 is externally configurable
which allows independent gain control from multiple
sources by summing signals from each function.
The IS31AP2005 is available in DFN-8 (3mm × 3mm),
MSOP-8 packages.
APPLICATIONS
Wireless or cellular handsets and PDAs
Portable DVD player
Notebook PC
Portable radio
Educational toys
USB speakers
Portable gaming
TYPICAL APPLICATION CIRCUIT
Figure 1
Typical Application Circuit with Differential Input
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
1
IS31AP2005
Figure 2
Typical Application Schematic with Single-ended Input
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
2
IS31AP2005
PIN CONFIGURATION
Package
Pin Configuration (Top view)
DFN-8
MSOP-8
PIN DESCRIPTION
No.
Pin
Description
1
SDB
Shutdown terminal, active low logic.
2
NC
No internal connection.
3
IN+
Positive differential input.
4
IN-
Negative differential input.
5
OUT+
Positive BTL output.
6
VCC
Power supply.
7
GND
High-current ground.
8
OUT-
Negative BTL output.
Thermal Pad
Connect to GND.
DFN-8
MSOP-8
-
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
3
IS31AP2005
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No.
Package
QTY/Reel
IS31AP2005-DLS2-TR
IS31AP2005-SLS2-TR
DFN-8, Lead-free
MSOP-8, Lead-free
2500
Copyright © 2017 Lumissil Microsystems. All rights reserved. Lumissil Microsystems reserves the right to make changes to this specification and its
products at any time without notice. Lumissil Microsystems assumes no liability arising out of the application or use of any information, products or
services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and
before placing orders for products.
Lumissil Microsystems does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in
such applications unless Lumissil Microsystems receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Lumissil Microsystems is adequately protected under the circumstances
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
4
IS31AP2005
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VCC
Voltage at any input pin
Maximum junction temperature, TJMAX
Storage temperature range, TSTG
Operating temperature range, TA
Thermal resistance, θJA (DFN-8)
θJA (MSOP-8)
ESD (HBM)
ESD (CDM)
-0.3V ~ +6.0V
-0.3V ~ VCC+0.3V
+150°C
-65°C ~ +150°C
-40°C ~ +85°C
70°C /W
211.4°C /W
±7kV
±500V
Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
VCC= 2.7V ~ 5.5V, TA= 25°C, unless otherwise noted. (Note 1)
Symbol
Parameter
VCC
Supply voltage
|VOS|
Output offset voltage
(measured differentially)
Condition
VSDB= 0V, AV= 2V/V
10
VCC= 5.5V, no load
2.6
VCC= 2.7V, no load
1.2
Quiescent current
ISD
Shutdown current
fSW
Switching frequency
RIN
Input resistor
Gain≤ 20V/V
Audio input gain
RIN= 150kΩ
VIH
High-level input voltage
VIL
Low-level input voltage
Typ.
2.7
ICC
Gain
Min.
VSDB= 0.4V
Max.
Unit
5.5
V
mV
mA
1
250
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
μA
kHz
15
kΩ
2
V/V
1.4
V
0.4
V
5
IS31AP2005
ELECTRICAL CHARACTERISTICS
TA= 25°C, Gain= 2V/V. (Note 2)
Symbol
Parameter
Condition
THD+N= 10%
f= 1kHz, RL= 8Ω
THD+N= 10%
f= 1kHz, RL= 4Ω
PO
Output power
THD+N= 1%
f= 1kHz, RL= 8Ω
THD+N= 1%
f= 1kHz, RL= 4Ω
Min.
Typ.
VCC= 5.0V
1.70
VCC= 4.2V
1.20
VCC= 3.6V
0.83
VCC= 5.0V
2.95
VCC= 4.2V
2.05
VCC= 3.6V
1.55
VCC= 5.0V
1.45
VCC= 4.2V
0.95
VCC= 3.6V
0.66
VCC= 5.0V
2.50
VCC= 4.2V
1.70
VCC= 3.6V
1.25
VCC= 5.0V, PO=1.0W, RL= 8Ω, f= 1kHz
0.28
VCC= 5.0V, PO=1.2W, RL= 4Ω, f= 1kHz
0.31
Max.
Unit
W
W
W
W
THD+N
Total harmonic
distortion plus noise
VNO
Output voltage noise
VCC= 3.6V~5V, f= 20Hz to 20kHz, inputs
ac-grounded with CIN= 1μF A-Weighting
68
μVrms
tWU
Wake-up time from
shutdown
VCC= 3.6V
36
ms
SNR
Signal-to-noise ratio
PO=1.0W, RL= 8Ω, VCC= 5.0V
92
dB
Power supply
rejection ratio
VCC= 3.6V ~ 5.5V, f= 217kHz
-65
dB
PSRR
%
Note 1: All parts are production tested at TA= 25°C. Other temperature limits are guaranteed by design.
Note 2: Guaranteed by design.
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
6
IS31AP2005
TYPICAL PERFORMANCE CHARACTERISTICS
20
20
RL = 8Ω+33µH
f = 1kHz
10
VCC = 3.6V
VCC = 3.6V
5
THD+N(%)
5
THD+N(%)
RL = 4Ω+33µH
f = 1kHz
10
2
VCC = 4.2V
1
2
VCC = 4.2V
1
0.5
0.5
0.2
0.2
VCC = 5.0V
VCC = 5.0V
0.1
10m
20m
50m
100m
200m
500m
1
2
0.1
10m
3
20m
50m
Figure 4
THD+N vs. Output Power
THD+N(%)
THD+N(%)
10
RL = 8Ω+33µH
2
VCC = 5.0V
PO = 1W
1
0.2
RL = 4Ω+33µH
VCC = 5.0V
PO = 1.2W
2
1
0.2
0.01
50
100
200
500
1k
VCC = 3.6V
PO = 650mW
0.02
0.02
2k
5k
10k 20k
20
50
100
200
Figure 5
Figure 6
THD+N vs. Frequency
1k
2k
5k
10k 20k
5k
20k
THD+N vs. Frequency
0
200
VCC = 3.6V~5.0V
RL = 8Ω+33µH
-20
100
PSRR(dB)
Output Voltage(uV)
500
Frequency(Hz)
Frequency(Hz)
70
50
30
20
10
20
3 4
2
THD+N vs. Output Power
0.05
VCC = 3.6V
PO = 500mW
0.05
20
1
0.1
0.1
0.01
500m
20
20
10
200m
Output Power(W)
Output Power(W)
Figure 3
100m
VCC = 3.6V~5.0V
RL = 8Ω+33μH
Input Grounded
-40
-60
-80
50
100
200
1k
2k
5k
10k
20k
-100
20
50
100
Noise
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
500
1k
2k
Frequency(Hz)
Frequency(Hz)
Figure 7
200
Figure 8
PSRR vs. Frequency
7
IS31AP2005
1.8
3.5
RL = 8Ω+33μH
f = 1kHz
1.6
3
THD+N = 10%
1.4
THD+N = 10%
Output Power(W)
Output Power(W)
RL = 4Ω+33μH
f = 1kHz
1.2
1
0.8
THD+N = 1%
0.6
2.5
2
1.5
1
0.4
THD+N = 1%
0.5
0.2
0
2.5
3
3.5
4
4.5
5
0
2.5
3
4
4.5
5
Power Supply(V)
Power Supply(V)
Figure 9
3.5
Output Power vs. Supply Voltage
Figure 10
Output Power vs. Supply Voltage
100
80
Efficiency(%)
RL=8Ω
RL=4Ω
60
40
20
VCC = 5V
Gain=2V/V
0
0
0. 4
0. 8
1. 2
1. 6
2
2. 4
2. 8
Output Power(W)
Figure 11
Efficiency vs. Output Power
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
8
IS31AP2005
FUNCTIONAL BLOCK DIAGRAM
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
9
IS31AP2005
APPLICATION INFORMATION
FULLY DIFFERENTIAL AMPLIFIER
VBattery
6
VCC
The IS31AP2005 is a fully differential amplifier with
differential inputs and outputs. The fully differential
amplifier consists of a differential amplifier and a
common-mode amplifier. The differential amplifier
ensures that the amplifier outputs a differential voltage
on the output that is equal to the differential input times
the gain. The common-mode feedback ensures that
the common-mode voltage at the output is biased
around VCC/2 regardless of the common-mode voltage
at the input. The fully differential IS31AP2005 can still
be used with a single-ended input; however, the
IS31AP2005 should be used with differential inputs
when in a noisy environment, like a wireless handset,
to ensure maximum noise rejection.
INPUT RESISTORS (RIN)
ADVANTAGES
AMPLIFIERS
The input resistors (RIN) set the gain of the amplifier
according to Equation (1).
OF
FULLY
DIFFERENTIAL
The fully differential amplifier does not require a
bypass capacitor. This is because any shift in the
midsupply affects both positive and negative channels
equally and cancels at the differential output.
GSM handsets save power by turning on and shutting
off the RF transmitter at a rate of 217Hz. The
transmitted signal is picked-up on input and output
traces. The fully differential amplifier cancels the signal
much better than the typical audio amplifier.
COMPONENT SELECTION
Figure 12 shows the IS31AP2005 with differential
inputs and optional input capacitors. Input capacitors
are used when the common mode input voltage range
specs can not be guaranteed or high pass filter is
considered.
Figure 13 shows the IS31AP2005 with single-ended
inputs. The input capacitors have to be used in the
single ended case because it is much more
susceptible to noise in this case.
VBattery
CS
1 F
CIN0.1 F
6
0.1 F
RIN150k
Differential
Input
4
3
CIN+
0.1 F
VCC
ININ+
OUT+
IS31AP2005
OUT-
5
8
RIN+
150k
1
Shutdown
Control
SDB
GND
7
100k
Figure 12
Typical Application Circuit with Differential Input
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
CS
1 F
0.1 F
CIN0.1 F
RIN150k
Single-ended
Input
4
3
OUT+
IN-
IS31AP2005
IN+
OUT-
5
8
RIN+
150k
CIN+
0.1 F
1
Shutdown
Control
SDB
GND
7
100k
Figure 13
Typical Application Circuit with Single-Ended Input
Gain
2 150k V
RIN
V
(1)
Resistor matching is very important in fully differential
amplifiers. The balance of the output on the reference
voltage depends on matched ratios of the resistors.
CMRR, PSRR, and cancellation of the second
harmonic distortion diminish if resistor mismatch
occurs. Therefore, it is recommended to use 1%
accuracy resistors or better to keep the performance
optimized. Matching is more important than overall
accuracy.
Place the input resistors close to the IS31AP2005 to
reduce noise injection on the high-impedance nodes.
For optimal performance the gain should be set to
2V/V or lower. Lower gain allows the IS31AP2005 to
operate at its best, and keeps a high voltage at the
input making the inputs less susceptible to noise.
DECOUPLING CAPACITOR (CS)
The IS31AP2005 is a high-performance Class-D audio
amplifier that requires adequate power supply
decoupling to ensure high efficiency and low total
harmonic distortion (THD). For higher frequency
transients, spikes, or digital noises on the line, a good
low equivalent-series-resistance (ESR) ceramic
capacitor, typically 1μF, placed as close as possible to
the device VCC pin works best. Placing this decoupling
capacitor close to the IS31AP2005 is also important for
the efficiency of the Class-D amplifier, because any
resistance or inductance in the trace between the
device and the capacitor can cause a loss in efficiency.
For filtering lower-frequency noise signals, a 10μF or
greater capacitor placed near the audio power
amplifier would also be helpful, but it is not required in
most applications because of better PSRR of this
device.
10
IS31AP2005
INPUT CAPACITORS (CIN)
The input capacitors and input resistors form a
high-pass filter with the corner frequency, fC,
determined in Equation (2).
1
f
c 2R C
IN IN
(2)
The value of the input capacitor is important to
consider as it directly affects the bass (low frequency)
performance of the circuit. Speakers in wireless
phones cannot usually respond well to low frequencies,
so the corner frequency can be set to block low
frequencies in this application.
Equation (3) is reconfigured to solve for the input
coupling capacitance.
C
IN
1
2R IN f C
(3)
Figure 14
Application Circuit with Summing Two Differential Inputs
If summing left and right inputs with a gain of 1V/V, use
RIN1= RIN2= 300kΩ.
If summing a ring tone and a phone signal, set the
ring-tone gain to Gain2= 2V/V, and the phone gain to
Gain1= 0.1V/V. The resistor values would be.
RIN1= 3MΩ, and RIN2= 150kΩ.
If the corner frequency is within the audio band, the
capacitors should have a tolerance of ±10% or better,
because any mismatch in capacitance causes an
impedance mismatch at the corner frequency and
below.
For a flat low-frequency response, use large input
coupling capacitors (1μF). However, in a GSM phone
the ground signal is fluctuating at 217Hz, but the signal
from the codec does not have the same 217Hz
fluctuation. The difference between the two signals is
amplified, sent to the speaker, and heard as a 217Hz
hum.
SUMMING INPUT SIGNALS
Most wireless phones or PDAs need to sum signals at
the audio power amplifier or just have two signal
sources that need separate gain. The IS31AP2005
makes it easy to sum signals or use separate signal
sources with different gains. Many phones now use the
same speaker for the earpiece and ringer, where the
wireless phone would require a much lower gain for
the phone earpiece than for the ringer. PDAs and
phones that have stereo headphones require summing
of the right and left channels to output the stereo signal
to the mono speaker.
SUMMING A DIFFERENTIAL INPUT SIGNAL AND A
SINGLE-ENDED INPUT SIGNAL
Figure 15 shows how to sum a differential input signal
and a single-ended input signal. Ground noise may
couple in through IN- with this method. It is better to
use differential inputs. The corner frequency of the
single-ended input is set by CIN2, shown in Equation (6).
To assure that each input is balanced, the
single-ended input must be driven by a low-impedance
source even if the input is not in use. The gain for each
input source can be set independently by Equations (4)
and (5).
C IN 2
Gain1
VO
2 150 k
RIN 1
VIN 1
V
V
(4)
Gain 2
VO
2 150 k
R IN 2
VIN 2
V
V
(5)
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
(6)
2RIN 2 f C 2
If summing a ring tone and phone signals, the phone
signals should use the differential inputs while the ring
tone should use the single-ended input. The phone
gain is set at Gain1= 0.1V/V, and the ring-tone gain is
set to Gain2= 2V/V, the resistor values would be
RIN1= 3MΩ, and RIN2= 150kΩ.
The high pass corner frequency of the single-ended
input is set by CIN2. If the desired corner frequency is
less than 20Hz.
SUMMING TWO DIFFERENTIAL INPUT SIGNALS
Two extra resistors are needed for summing
differential signals (Figure 14). The gain for each input
source can be set independently by Equations (4) and
(5).
1
C IN 2
1
2 150 k 20 Hz
C IN 2 53 pF
(7)
(8)
11
IS31AP2005
C IN 2
Application Circuit with Summing Differential Input and
Single-Ended Input Signals
SUMMING TWO SINGLE-ENDED INPUT SIGNALS
The corner frequencies (fC1 and fC2) for each input
source can be set independently by Equations (9) and
(10). Resistor, RP, and capacitor, CP, are needed on
the IN+ terminal to match the impedance on the INterminal (Figure 16). The gain for each input source
can be set independently by Equations (4) and (5).
(10)
2RIN 2 f C 2
C P C IN 1 C IN 2
(11)
R IN 1 R IN 2
RIN 1 RIN 2
(12)
R
Figure 15
1
P
CIN2-
RIN2-
CIN1-
RIN1-
Single-ended
Input 2
4
Single-ended
Input 1
3
CP
Figure 16
ININ+
RP
Application Circuit with Summing Two Single-Ended
Inputs
The single-ended inputs must be driven by low
impedance sources.
C IN 1
1
2RIN 1 f C 1
(9)
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
12
IS31AP2005
CLASSIFICATION REFLOW PROFILES
Profile Feature
Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp)
3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)*
Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc)
Max 30 seconds
Average ramp-down rate (Tp to Tsmax)
6°C/second max.
Time 25°C to peak temperature
8 minutes max.
Figure 17 Classification Profile
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
13
IS31AP2005
PACKAGING INFORMATION
DFN-8
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
14
IS31AP2005
MSOP-8
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
15
IS31AP2005
RECOMMENDED LAND PATTERN
DFN-8
MSOP-8
Note:
1. Land pattern complies to IPC-7351.
2. All dimensions in MM.
3. This document (including dimensions, notes & specs) is a recommendation based on typical circuit board manufacturing parameters. Since
land pattern design depends on many factors unknown (eg. user’s board manufacturing specs), user must determine suitability for use.
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
16
IS31AP2005
REVISION HISTORY
Revision
A
B
Detail Information
Initial release
1. P.1 Add short-circuit and thermal protect
2. P.7-8 Update PSRR and efficiency figures
3. Add function block
4. POD should use GOODARK
Date
2011.07.06
2012.12.11
C
1. Add ESD(CDM)
2. Add SOP-8 package
2. Add land pattern
2015.08.31
D
1. Remove SOP-8 package information
2. Add θJA
2017.06.02
Lumissil Microsystems – www.lumissil.com
Rev. D, 06/02/2017
17
工商网监
湘ICP备2023018690号
