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LT1205CS#PBF

LT1205CS#PBF

  • 厂商:

    LINEAR(凌力尔特)

  • 封装:

    SOIC16_150MIL

  • 描述:

    Video Switch IC 2 Channel 16-SOIC

  • 数据手册
  • 价格&库存
LT1205CS#PBF 数据手册
LT1203/LT1205 150MHz Video Multiplexers U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ – 3dB Bandwidth: 150MHz 0.1dB Gain Flatness: 30MHz Channel-to-Channel Switching Time: 25ns Turn-On/Turn-Off Time: 25ns High Slew Rate: 300V/µs Disabled Output Impedance: 10MΩ 50mV Switching Transient Channel Separation at 10MHz: > 90dB Differential Gain: 0.02% Differential Phase: 0.02° Wide Supply Range: ±5V to ±15V Output Short-Circuit Protected Push-Pull Output UO APPLICATI ■ ■ ■ ■ ■ ■ Broadcast Quality Video Multiplexing Picture-in-Picture Switching HDTV Computer Graphics Title Generation Video Crosspoint Matrices Video Routers These multiplexers act as SPDT video switches with 10ns transition times at toggle rates up to 30MHz. The – 3dB bandwidth is 150MHz and 0.1dB gain flatness is 30MHz. Many parts can be tied together at their outputs by using the enable feature which reduces the power dissipation and raises the output impedance to 10MΩ. Output capacitance when disabled is only 3pF and the LT1203 peaks less than 3dB into a 50pF load. Channel crosstalk and disable isolation are greater than 90dB up to 10MHz. An on-chip buffer interfaces to fast TTL or CMOS logic. Switching transients are only 50mV with a 25ns duration. The LT1203 and LT1205 outputs are protected against shorts to ground. The LT1203/LT1205 are manufactured using Linear Technology’s proprietary complementary bipolar process. The LT1203 is available in both the 8-lead PDIP and SO package while the LT1205 is available in the 16-lead narrow body SO package. UO ■ S The LT1203 is a wideband 2-input video multiplexer designed for pixel switching and broadcast quality routing. The LT1205 is a dual version that is configured as a 4-input, 2-output multiplexer. TYPICAL APPLICATI Large-Signal Response High Speed RGB MUX CHANNEL SELECT RED 1 RED 2 V+ +1 EN +1 V– GREEN 1 GREEN 2 LT1205 +1 V+ V+ +1 LT1203 BLUE 2 +1 V– VOUT GREEN LOGIC V– BLUE 1 LOGIC EN +1 VOUT RED EN VOUT BLUE LOGIC LT1203 • TA01 1 LT1203/LT1205 W W W AXI U U ABSOLUTE RATI GS Supply Voltage ...................................................... ±18V Signal Input Current (Note 1) ............................ ±20mA Logic Input Current (Note 2).............................. ±50mA Output Short-Circuit Duration (Note 3) ........ Continuous Specified Temperature Range (Note 4) ....... 0°C to 70°C Operating Temperature Range ............... – 40°C to 85°C Storage Temperature Range ................ – 65°C to 150°C Junction Temperature (Note 5) ............................ 150°C Lead Temperature (Soldering, 10 sec)................. 300°C W U U PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER TOP VIEW V+ VIN0 1 8 GND 2 7 VOUT VIN1 3 6 EN – 5 LOGIC V 4 LT1203CN8* LT1203CS8* N8 PACKAGE S8 PACKAGE 8-LEAD PLASTIC DIP 8-LEAD PLASTIC SOIC S8 PART MARKING TJMAX = 150°C, θJA = 100°C/W (N) TJMAX = 150°C, θJA = 150°C/W (S) 1203 TOP VIEW VINO 1 16 V + GND 2 15 VOUT1 VIN1 3 14 EN1 V– LT1205CS* 13 LOGIC 1 4 VIN2 5 12 V + GND 6 11 VOUT2 VIN3 7 10 EN2 V– ORDER PART NUMBER 9 8 LOGIC 2 S PACKAGE 16-LEAD PLASTIC SOIC TJMAX = 150°C, θJA = 100°C/W *See Note 4 Consult factory for Industrial and Military grade parts. ELECTRICAL CHARACTERISTICS 0°C ≤ TA ≤ 70°C, ±5V ≤ VS ≤ ±15V, RL = 1k, pulse tested, EN pin open or high, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Output Offset Voltage Any Input Selected Output Offset Matching Between Outputs ∆VOS/∆T Output Offset Drift IIN Input Current RIN Input Resistance VS = ±5V, VIN = ±2V VS = ±15V, VIN = ±2V CIN Input Capacitance Input Selected Input Deselected COUT Disabled Output Capacitance EN Pin Voltage ≤ 0.8V VIN Input Voltage (Note 1) VS = ±5V VS = ±15V ● ● ±2 ±2 Power Supply Rejection Ratio VS = ±4.5 to ±15V ● 60 70 Gain Error VS = ±15V, VIN = ±2V, RL = 1k VS = ±15V, VIN = ±2V, RL = 400Ω VS = ±5V, VIN = ±2V, RL = 1k ● ● ● PSRR 2 MIN TYP MAX ● 10 30 ● 0.3 5 ● 40 ● 0.6 ● ● 1 2 UNITS mV mV µV/°C 5 µA 5 5 MΩ MΩ 2.6 2.6 pF pF 2.8 pF ±2.8 ±3.0 V V 2 6 3 dB 4 10 6 % % % LT1203/LT1205 ELECTRICAL CHARACTERISTICS 0°C ≤ TA ≤ 70°C, ±5V ≤ VS ≤ ±15V, RL = 1k, pulse tested, EN pin open or high, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOUT Output Voltage VS = ±15V, VIN = ±2V, RL = 400Ω VS = ±5V, VIN = ±2V, RL = 1k ● ● Overload Swing (Note 1) VS = ±15V, VIN = ±5V VS = ±5V, VIN = ±5V ● ● IOUT Output Current VS = ±15V, VIN = ±2V, RL = 400Ω VS = ±5V, VIN = ±2V, RL = 1k ● ● ±4.5 ±1.8 ±4.75 ±2.00 ROUT Enabled Output Resistance Disabled Output Resistance EN Pin Voltage = 2V, VOUT = ±2V, VS = ±15V EN Pin Voltage = 0.5V, VOUT = ±2V, VS = ±15V ● ● 20 10 42 1 Ω MΩ Supply Current (LT1203) EN Pin Voltage = 2V EN Pin Voltage = 0.5V ● ● 10.0 5.8 14 8 mA mA Supply Current (LT1205) EN Pin Voltage = 2V EN Pin Voltage = 0.5V ● ● 20.0 11.6 28 16 mA mA VIL Logic Low Logic Pin ● VIH Logic High Logic Pin ● Enable Low EN Pin ● Enable High EN Pin ● IIL Digital Input Current Low LT1203 Pin 5, LT1205 Pins 9, 13 = 0V ● 1.5 6.5 IIH Digital Input Current High LT1203 Pin 5, LT1205 Pins 9, 13 = 5V ● 10 200 nA IEN Enable Pin Current LT1203 Pin 6, LT1205 Pins 10, 14 ● 20 80 µA IS AC CHARACTERISTICS MIN TYP ±1.8 ±1.8 ±1.90 ±1.94 ±0.9 ±0.9 MAX UNITS V V ±1.5 ±1.5 V V mA mA 0.8 V 2 V 0.5 V 2 V µA TA = 25°C, VS = ±15V, RL = 1k, EN pin open or high, unless otherwise noted. SYMBOL PARAMETER SR Slew Rate (Note 6) FPBW Full Power Bandwidth (Note 7) tSEL Channel-to-Channel Select Time (Note 8) RL = 10k Enable Time (Note 9) RL = 1k 25 35 ns 25 35 ns Disable Time (Note 9) RL = 1k 20 35 ns Small-Signal Rise and Fall Time VOUT = 250mVP-P, 10% to 90% 2.6 ns Propagation Delay VOUT = 250mVP-P 2.9 ns Overshoot VOUT = 250mVP-P 5 % Crosstalk (Note 10) RS = 10Ω 90 dB Chip Disabled Crosstalk (Note 10) RL = 10Ω, EN Pin Voltage ≤ 0.8V 110 dB Channel Select Output Transient All VIN = 0V 50 mVP-P Settling Time 1%, VOUT = 1V 30 ns Differential Gain (Note 11) VS = ±15V, RL = 10k 0.02 % Differential Phase (Note 11) VS = ±15V, RL = 10k 0.02 DEG Insertion Loss RL = 100k, CL = 30pF, VOUT = 500mVP-P, f = 1MHz 0.02 dB tr, tf tS CONDITIONS MIN 180 300 V/µs VOUT = 2VP-P 28.6 47.7 MHz The ● denotes specifications which apply over the specified temperature range. Note 1: The analog inputs (pins 1, 3 for the LT1203, pins 1, 3, 5, 7 for the LT1205) are protected against ESD and overvoltage with internal SCRs. TYP MAX UNITS For inputs ≤ ±2.8V the SCR will not fire. Voltages above 2.8V will fire the SCR and the DC current should be limited to 20mA. To turn off the SCR the pin voltage must be reduced to less than 1V or the current reduced to less than 600µA. 3 LT1203/LT1205 Note 2: The digital inputs (pins 5, 6 for the LT1203, pins 9, 10, 13, 14 for the LT1205) are protected against ESD and overvoltage with internal SCRs. For inputs ≤ ±6V the SCR will not fire. Voltages above 6V will fire the SCR and the DC current should be limited to 50mA. To turn off the SCR the pin voltage must be reduced to less than 2V or the current reduced to less than 10mA. Note 3: A heat sink may be required depending on the power supply voltage. Note 4: Commercial grade parts are designed to operate over the temperature range of – 40°C to 85°C but are neither tested nor guaranteed beyond 0°C to 70°C. Industrial grade parts specified and tested over – 40°C to 85°C are available on special request, consult factory. Note 5: TJ is calculated from the ambient temperature TA and the power dissipation PD according to the following formulas: LT1203CN8: TJ = TA + (PD × 100°C/W) LT1203CS8: TJ = TA + (PD × 150°C/W) LT1205CS: TJ = TA + (PD × 100°C/W) Note 6: Slew rate is measured at ±2.0V on a ±2.5V output signal while operating on ±15V supplies, RL = 1k. Note 7: Full power bandwidth is calculated from the slew rate measurement: FPBW = SR/2πVPEAK Note 8: For the LT1203, apply 1VDC to pin 1 and measure the time for the appearance of 0.5V at pin 7 when pin 5 goes from 5V to 0V. Apply 1VDC to pin 1 and measure the time for disappearance of 0.5V at pin 7 when pin 5 goes from 0V to 5V. Apply 1VDC to pin 3 and measure the time for the appearance of 0.5V at pin 7 when pin 5 goes from 0V to 5V. Apply 1VDC to pin 3 and measure the time for disappearance of 0.5V at pin 7 when pin 5 goes from 5V to 0V. For the LT1205 the same test is performed on both MUXs. Note 9: For the LT1203, apply 1VDC to pin 1 and measure the time for the appearance of 0.5V at pin 7 when pin 6 goes from 0V to 5V. Pin 5 voltage = 0V. Apply 1VDC to pin 1 and measure the time for disappearance of 0.2V at pin 7 when pin 6 goes from 5V to 0V. Pin 5 voltage = 0V. Apply 1VDC to pin 3 and measure the time for the appearance of 0.5V at pin 7 when pin 6 goes from 0V to 5V. Pin 5 voltage = 5V. Apply 1VDC to pin 3 and measure the time for disappearance of 0.2V at pin 7 when pin 5 goes from 5V to 0V. Pin 5 voltage = 5V. For the LT1205 the same test is performed on both MUXs. Note 10: VIN = 0dBm (0.223VRMS) at 10MHz on one input with the other input selected and RS = 10Ω. For disable crosstalk all inputs are driven simultaneously. In disable the output impedance is very high and signal couples across the package; the load impedance determines the crosstalk. Note 11: Differential gain and phase are measured using a Tektronix TSG120 YC/NTSC signal generator and a Tektronix 1780R video measurement set. The resolution of this equipment is 0.1% and 0.1°. Ten identical MUXs were cascaded giving an effective resolution of 0.01% and 0.01°. TRUTH TABLE LOGIC EN VOUT 0 1 VIN0 1 1 VIN1 0 0* HIGH ZOUT 1 0 HIGH ZOUT *Must be ≤0.5V W U TYPICAL PERFOR A CE CHARACTERISTICS ±5V Frequency Response ±15V Frequency Response –20 4 –40 3 2 –60 2 –60 1 –80 1 –80 0 –100 0 –100 –1 –120 VS = ±5V TA = 25°C RL = ∞ 4 –20 –40 –1 –120 –2 –140 –2 –140 –3 –160 –3 –160 –4 –180 –4 –180 –200 1000 –5 –5 1 10 100 FREQUENCY (MHz) LT1203/05 • TPC01 4 0 VS = ±15V TA = 25°C RL = ∞ 1 10 100 FREQUENCY (MHz) –200 1000 LT1203/05 • TPC02 PHASE (DEG) GAIN (dB) 3 GAIN (dB) 5 PHASE (DEG) 0 5 LT1203/LT1205 W U TYPICAL PERFOR A CE CHARACTERISTICS – 3dB Bandwidth vs Supply Voltage Frequency Response with Capacitive Loads 5 TA = 25°C RL = 10k PEAKING ≤ 0.5dB –30 VS = ±15V TA = 25°C RL = ∞ 4 3 180 CL = 50pF GAIN (dB) 2 160 CL = 10pF CL = 100pF 1 0 –1 –2 140 –3 6 4 8 10 12 14 16 1 18 10 FREQUENCY (MHz) SUPPLY VOLTAGE (±V) Crosstalk Rejection vs Frequency –30 DISABLE REJECTION (dB) –80 VS = ±5V – 90 VS = ±15V 70 – 40 –50 RL = ∞ – 60 –70 RL = 1k –80 –90 RL = 100Ω –100 RL = 10Ω –110 –120 –110 1 10 FREQUENCY (MHz) 100 10 FREQUENCY (MHz) 1 125° SUPPLY CURRENT (mA) 30 20 20 10 1 LT1203/05 • TPC08 LT1203 RL = ∞ –55° 8.8 8.4 7.6 100M LT1203/05 • TPC09 100 10 FREQUENCY (MHz) Supply Current vs Supply Voltage (Disabled) 8.0 1M 10M FREQUENCY (Hz) +PSRR 30 25° 9.2 100k 40 5.2 LT1203 RL = ∞ 40 VS = ±15V TA = 25°C RL = ∞ RS = 0Ω 0 100 9.6 VS = ±15V TA = 25°C 60 10 10k –PSRR 50 Supply Current vs Supply Voltage (Enabled) 100 80 60 LT1203/05 • TPC07 LT1203/05 • TPC06 Output Impedance (Enabled) vs Frequency 100 LT1203/05 • TPC05 SUPPLY CURRENT (mA) CROSSTALK REJECTION (dB) –70 10 FREQUENCY (MHz) Power Supply Rejection Ratio vs Frequency VS = ±15V TA = 25°C –30 –100 OUTPUT IMPEDANCE (Ω) 1 –20 TA = 25°C RS = 0Ω RL = ∞ – 60 RS = 0Ω RS = 10Ω –90 Disable Rejection vs Frequency –50 RS = 37.5Ω –80 LT1203/05 • TPC04 LT1203/05 • TPC03 – 40 RS = 75Ω –70 100 POWER SUPPLY REJECTION RATIO (dB) 2 – 60 –110 –5 0 –50 –100 –4 120 VS = ±15V TA = 25°C RL = ∞ – 40 CL = 20pF CROSSTALK REJECTION (dB) 200 FREQUENCY (MHz) Crosstalk Rejection vs Frequency 5.0 25° 125° 4.8 –55° 4.6 4.4 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE (±V) 16 18 LT1203/05 • TPC10 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE (±V) 16 18 LT1203/05 • TPC11 5 LT1203/LT1205 W U TYPICAL PERFOR A CE CHARACTERISTICS Gain Error vs Temperature Input Bias Current vs Input Voltage 8 1.2 RL = 400Ω 6 GAIN ERROR (%) 1.0 5 4 3 RL = 1k 2 VS = ±15V RL = ∞ 3 125°C 0.8 OUTPUT VOLTAGE (V) VS = ±15V VIN = –2V TO 2V INPUT BIAS CURRENT (µA) 7 Output Voltage vs Input Voltage 4 25°C 0.6 –55°C 0.4 0.2 0 50 25 75 0 TEMPERATURE (°C) 100 – 0.4 –4 125 2 1 0 –1 –2 –3 – 0.2 1 –50 –25 VS = ±15V TA = 25°C RL = 1k –3 –2 1 2 –1 0 INPUT VOLTAGE (V) LT1203/05 • TPC12 3 4 –4 –5 – 4 –3 –2 –1 0 1 2 INPUT VOLTAGE (V) Small-Signal Rise Time 2.0 VS = ±15V RL = 1k 1.5 10mV 1mV OUTPUT STEP (V) 1.0 0.5 0 –0.5 –1.0 10mV 1mV –1.5 –2.0 0 100 300 400 200 SETTLING TIME (ns) 500 RL = 1k LT1203/05 • TPC16 LT1203/05 • TPC15 VIN1 to VIN0 Select Time VIN0 to VIN1 Select Time LOGIC (PIN 5) LOGIC (PIN 5) VOUT (PIN 7) VOUT (PIN 7) VS = ±15V VINO = 1V RL = 10k VIN1 = 0V 6 LT1203/05 • TPC17 VS = ±15V VINO = 1V RL = 10k VIN1 = 0V 4 5 LT1203/05 • TPC14 LT1203/05 • TPC13 Settling Time to 1mV and 10mV vs Output Step 3 LT1203/05 • TPC18 LT1203/LT1205 W U TYPICAL PERFOR A CE CHARACTERISTICS Channel 1 Enable Channel 1 Disable EN (PIN 6) EN (PIN 6) VOUT (PIN 7) VOUT (PIN 7) W U UO APPLICATI VS = ±15V VINO = 1V RL = 1k VIN1 = 0V LT1203/05 • TPC19 VINO = 1V VIN1 = 0V LT1203/05 • TPC20 U VS = ±15V RL = 1k S I FOR ATIO Input Protection The logic inputs have ESD protection (≥ 2kV) and shorting them to 12V or 15V will cause excessive current to flow. Limit the current to less than 50mA when driving the logic above 6V. The analog inputs are protected against ESD and overvoltage with internal SCRs. For inputs ≥ ±2.8V the SCRs will fire and the DC current should be limited to 20mA. Power Supplies The LT1203/LT1205 will operate from ±5V (10V total) to ±15V (30V total) and is specified over this range. Characteristics change very little over this voltage range. It is not necessary to use equal value supplies however, the output offset voltage will change. The offset will change about 300µV per volt of supply mismatch. The LT1203/LT1205 have a very wide bandwidth yet are tolerant of power supply bypassing. The power supplies should be bypassed with a 0.1µF or 0.01µF ceramic capacitor within 0.5 inch of the part. Circuit Layout Use a ground plane to ensure a low impedance ground is available throughout the PCB layout. Separate the inputs with ground plane to ensure high channel separation. For minimum peaking, maximum bandwidth and maximum gain flatness sockets are not recommended because they can add considerable stray inductance and capacitance. If a socket must be used, use a low profile, low capacitance socket such as the SamTec ISO-308. Switching Transients The LT1203/LT1205 use input buffers to ensure switching transients do not couple to other video equipment sharing the input line. Output switching transients are about 50mVP-P with a 20ns duration and input transients are LT1203 Channel-to-Channel Switching Transient OUTPUT 50mV/DIV INPUT 20mV/DIV LOGIC (PIN 5) RS = 50Ω LT1203/05 • AI01 7 LT1203/LT1205 W U U UO APPLICATI S I FOR ATIO CMOS MUX Channel-to-Channel Switching Transient only 10mVP-P. A photo of the switching transients from a CMOS MUX shows glitches to be 50 times larger than on the LT1203. Also shown is the output of the LT1203 switching on and off a 2MHz sinewave cleanly and without abnormalities. OUTPUT 1V/DIV Pixel Switching INPUT 1V/DIV The multiplexers are fabricated on LTC's Complementary Bipolar Process to attain fast switching speed, high bandwidth, and a wide supply voltage range compatible with traditional video systems. Channel-to-channel switching time and Enable time are both 25ns, therefore delay is the same when switching between channels or between ICs. To demonstrate the switching speed of the LT1203/LT1205 the RGB MUX of Figure 1 is used to switch RGB Workstation inputs with a 22ns pixel width. Figure 2a is a photo showing the Workstation output and RGB MUX output. The slight rise time degradation at the RGB MUX output is due to the bandwidth of the LT1260 current feedback amplifier used to drive the 75Ω cable. In Figure 2b, the LT1203 switches to an input at zero at the end of the first pixel and removes the following pixels. LOGIC CONTROL LT1203/05 • AI02 RS = 50Ω NOTE: 50 TIMES LARGER THAN LT1203 TRANSIENT LT1203 Switching Inputs LOGIC (PIN 5) OUTPUT (PIN 7) LT1203/05 • AI03 CHANNEL 1 = 0V CHANNEL 2 = 2MHz SINEWAVE J8 ENABLE V+ J7 LOGIC C4 4.7µF + R10 1.5k 16 J1 RED 1 1 1 2 J2 RED 2 R2 75Ω 3 4 J3 GREEN 1 R3 75Ω J5 BLUE 1 R5 75Ω 5 J4 GREEN 2 R4 75Ω 6 7 8 J6 BLUE 2 +1 2 15 14 +1 LT1205 R7* 10k 13 3 4 R 4 5 10 R8* 10k 9 8 +1 LT1203 R14 1.5k 7 6 5 7 R9* 10k 8 R15 1.5k *OPTIONAL C1 0.1µF Figure 1. RGB MUX R16 75Ω J9 RED 13 – + G 12 R17 75Ω J10 GREEN 11 6 R13 1.5k 15 14 3 R12 1.5k 11 +1 +1 + 12 +1 2 – 16 C2 0.1µF 1 R6 75Ω 8 GND + R11 1.5k C3 4.7µF R1 75Ω V– + B – 10 9 LT1260 LT1203/05 • F01 R18 75Ω J11 BLUE LT1203/LT1205 U W U UO APPLICATI S I FOR ATIO 4 VS = ±15V RL = 150Ω RF = RG = 1.3k 3 2 GAIN (dB) WORKSTATION OUTPUT 1 R, B 0 G –1 –2 RGB MUX OUTPUT –3 –4 1 LT1203/05 • F02a 10 100 FREQUENCY (MHz) 1000 LT1203/05 • F04 Figure 2a. Workstation and RGB MUX Output Figure 4. RGB MUX Frequency Response of Demonstration Board #041 Input Expansion WORKSTATION OUTPUT The output impedance of the LT1203/LT1205 is typically 20Ω when enabled and 10MΩ when disabled or not selected. This high disabled output impedance allows the output of many LT1205s to be shorted together to form large crosspoint arrays. With their outputs shorted together, shoot-through current is low because the “on” channel is disabled before the “off” channel is activated. RGB MUX OUTPUT Timing and Supply Current Waveforms LT1203/05 • F02b Figure 2b. RGB MUX Output Switched to Ground After One Pixel ENABLE IC #1 ENABLE IC #2 5V/DIV 5V/DIV Demonstration Board A Demonstration Board (#041) of the RGB MUX in Figure 1 has been fabricated and its layout is shown in Figure 3. The small-signal bandwidth of the RGB MUX is set by the bandwidth of the LT1260. The stray capacitance of the surface mount feedback resistors RF and RG restricts the – 3dB bandwidth to about 95MHz. The bandwidth can be improved by about 20% using the through-hole LT1260 and components. A frequency response plot in Figure 4 shows that the R, G, and B amplifiers have slightly different frequency responses. The difference in the G amplifier is due to different output trace routing to feedback resistor R13. VOUT 1V/DIV IS 10mA/DIV LT1203/05 • AI04 Four LT1205s are used in Figure 5 to form a 16-to-1 multiplexer which is very space efficient and uses only six SO packages. In this application 15 switches are turned off and only one is active. An attenuator is formed by the 15 deselected switches and the active device which has an 9 LT1203/LT1205 041A R1 LOGIC ENABLE V– V+ GND R1 R R2 R2 U1 R3 R11 R7 R10 C3 U3 R12 G1 R17 G R13 C1 U2 G2 R16 C2 R18 R8 R14 R15 C4 R9 B R4 B1 R5 B2 (408) 432-1900 LT1203/LT1205 FAST SWITCHING RGB MULTIPLEXER DEMO BOARD R6 COPYWRITE '93 MADE IN USA LT1205/03 • F03 Figure 3. Demo Board #041 Layout 10 LT1203/LT1205 W U U UO APPLICATI S I FOR ATIO –15V 15V GND 5V C1 0.1µF A 16 1 CH0 R1 75Ω 15 16 +1 C2 0.1µF 14 2 15 3 14 13 13 12 12 11 11 10 10 9 9 7 4 5 6 7 8 1 +1 +1 +1 U1 LT1205 3 4 5 6 7 8 4 5 6 7 8 1 4 5 6 7 8 R16 75Ω C3 0.1µF B Y2 C B 1 2 C 3 D Y3 U5 Y4 74HCT238 Y5 G1 Y6 G2B Y7 G2A EN 6 5 4 14 +1 13 12 +1 + 11 10 +1 U2 LT1205 C5 4.7µF 2 U6 LT1252 9 3 7 + – 6 RS 75Ω OUTPUT 4 RF 1.6k C6 4.7µF 16 +1 RG 1.6k 15 14 +1 13 TRUTH TABLE 12 +1 11 10 +1 U3 LT1205 9 16 +1 2 3 Y1 15 2 3 A OPTIONAL RX 10k + 1 8 Y0 16 +1 2 CH15 C7 0.1µF 15 14 +1 13 12 +1 11 10 +1 U4 LT1205 9 C4 0.1µF LT1203/05 • F05 D X L L L L L L L L H H H H H H H H LOGIC SELECT C B A X X X L L L L L H L H L L H H H L L H L H H H L H H H L L L L L H L H L L H H H L L H L H H H L H H H ENABLE EN OUTPUT L H H H H H H H H H H H H H H H H OFF CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 Figure 5. 16-to-1 Multiplexer and Truth Table 11 LT1203/LT1205 W U U UO APPLICATI S I FOR ATIO 16-to-1 MUX Response output impedance of only 25Ω at 10MHz. This attenuator is responsible for the outstanding All Hostile Crosstalk Rejection of 90dB at 10MHz with 15 input signals. Several suggestions to attain this high rejection include: 16-to-1 MUX, Switching LT1205 Enable Lines 5V SELECT LINE C 0V 0 GAIN (dB) 1. Mount the feedback resistors for the surface mount LT1252 on the back side of the PC board. 2. Keep the feedback trace (pin 3) of the LT1252 as short as possible. 3. Route V + and V – for the LT1205s on the component (top) side and under the devices (between inputs and outputs). 4. Use the backside of the PC board as a solid ground plane. Connect the LT1205 device grounds and bypass capacitors grounds as vias to the backside ground plane. VS = ±15V RL = 100Ω RF = RG = 1.6k 2 –2 –4 –6 1 10 FREQUENCY (MHz) 100 LT1203/05 • AI07 Each “off” switch has 2.8pF of output capacitance and 15 “off” switches tied together represent a 48pF load to the one active switch. In this case the active device will peak about 3dB at 50MHz. An attribute of current feedback amplifiers is that the bandwidth can easily be adjusted by changing the feedback resistors, and in this application the LT1252’s bandwidth is reduced to about 60MHz using 1.6k feedback resistors. This has the effect of reducing the peaking in the MUX to 0.25dB and flattening the response to 0.05dB at 30MHz. 4 × 4 Crosspoint 1V 0V VIN4 = 0V VIN0 = 1V LT1203/05 • AI05 RF = RG = 1.6k RL = 100Ω 16-to-1 Multiplexer All Hostile Crosstalk Rejection HOSTILE CROSSTALK REJECTION (dB) –20 VS = ±15V RS = 10Ω RL = 100Ω –40 –60 –80 –100 –120 1 10 FREQUENCY (MHz) 100 LT1203/05 • AI06 12 The compact high performance 4 × 4 crosspoint shown in Figure 6 uses four LT1205s to route any input to any or all outputs. The complete crosspoint uses only six SO packages and less than six square inches of PC board space. The LT1254 quad current feedback amplifier serves as a cable driver with a gain of 2. A ±5V supply is used to ensure that the maximum 150°C junction temperature of the LT1254 is not exceeded in the SO package. With this supply voltage the crosspoint can operate at a 70°C ambient temperature and drive 2V (peak or DC) into a double-terminated 75Ω video cable. The feedback resistors of these output amplifiers have been optimized for this supply voltage. The – 3dB bandwidth of the crosspoint is over 100MHz with only 0.8dB of peaking. All Hostile Crosstalk Rejection is 85dB at 10MHz when a shorted input is routed to all outputs. To obtain this level of performance it is necessary to follow techniques similar to LT1203/LT1205 W U U UO APPLICATI S I FOR ATIO –5V 5V GND 3 C1 0.1µF CH0 J1 1 R1 75Ω 2 3 4 5 6 7 8 C2 0.1µF 16 +1 2 4 5 CH1 J2 6 7 R2 75Ω 8 R3 75Ω R5 10k 13 R10 820Ω 12 +1 11 10 +1 U1 LT1205 5 9 R6 10k 16 +1 + U6 B LT1254 – R11 820Ω R12 820Ω 14 +1 + 12 +1 11 10 10 +1 U2 LT1205 9 9 16 +1 15 14 6 7 8 C5 4.7µF 13 3 5 OUTPUT 1 J6 15 2 4 7 R18 75Ω OUTPUT 0 J5 – + +1 4 – R19 75Ω 8 U6 C LT1254 CH2 J3 1 1 R17 75Ω R9 820Ω 14 +1 2 3 U6 A LT1254 15 6 1 + OUTPUT 2 J7 11 R13 820Ω U5 74HC04 R7 10k R14 820Ω C6 4.7µF + 13 12 +1 11 12 10 +1 U3 LT1205 9 13 + R20 75Ω 14 U6 D LT1254 OUTPUT 3 J8 – R15 820Ω 1 16 +1 3 4 5 CH3 J4 6 7 8 R4 75Ω C3 0.1µF R8 10k 15 2 14 +1 R16 820Ω 13 TRUTH TABLE 12 +1 SELECT LOGIC 11 A L L H H 10 +1 U4 LT1205 9 C4 0.1µF B L H L H INPUT CHANNEL CH0 CH1 CH2 CH3 LT1203/05 • F06 B A SELECT LOGIC OUTPUT 0 A B SELECT LOGIC OUTPUT 1 A B SELECT LOGIC OUTPUT 2 A B SELECT LOGIC OUTPUT 3 Figure 6. 4 × 4 Crosspoint and Truth Table 13 LT1203/LT1205 U W U UO APPLICATI S I FOR ATIO those used in the 16-to-1 crosspoint with one additional suggestion: Surround the LT1205 output traces by ground plane and route them away from the (–) inputs of the other three LT1254s. Each pair of logic inputs labeled Select Logic Output is used to select a particular output. The truth table is used to select the desired input and is applied to each pair of logic inputs. For example, to route Channel 1 Input to Output 3, the 4th pair of logic inputs labeled Select Logic Output 3 is coded A = Low and B = High. To route Channel 3 Input to all outputs, set all eight logic inputs High. Channel 3 is the default input with all logic inputs open. To shut off all channels a pair of LT1259s can be substituted for the LT1254. The LT1259 is a dual current feedback amplifier with a shutdown pin that reduces the supply current to 0µA. Response of All Four Inputs for the 4 × 4 Crosspoint 4 × 4 Crosspoint, All Hostile Rejection HOSTILE CROSSTALK REJECTION (dB) 2 GAIN (dB) 0 –2 –4 –6 VS = ±5V RF = RG = 820Ω RL = 100Ω VS = ±5V RL = 100Ω RS = 0Ω –40 –60 –80 –100 –120 –8 1 10 FREQUENCY (MHz) 100 200 1 10 FREQUENCY (MHz) LT1203/05 • AI08 LT1203/05 • AI09 4 × 4 Crosspoint, Switching Channel 0 to Channel 2 5V INPUT A OF SELECT LOGIC OUTPUT 0 0V CHANNEL 0 = 1V CHANNEL 2 = 0V 14 100 LT1203/05 • AI10 LT1203/LT1205 W W SI PLIFIED SCHE ATIC V+ 2V V– OFF IN 0 V– IN 1 OUT V+ ENABLE V+ LOGIC –2V LOGIC V– GND LT1203/05 • SS PACKAGE DESCRIPTIO U Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead Plastic DIP 0.400 (10.160) MAX 8 7 6 5 0.250 ± 0.010 (6.350 ± 0.254) 1 0.300 – 0.320 (7.620 – 8.128) 0.009 – 0.015 (0.229 – 0.381) ( +0.025 0.325 –0.015 8.255 +0.635 –0.381 ) 2 0.045 – 0.065 (1.143 – 1.651) 3 4 0.130 ± 0.005 (3.302 ± 0.127) 0.065 (1.651) TYP 0.045 ± 0.015 (1.143 ± 0.381) 0.100 ± 0.010 (2.540 ± 0.254) 0.125 (3.175) MIN 0.018 ± 0.003 (0.457 ± 0.076) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 0.020 (0.508) MIN N8 0392 15 LT1203/LT1205 PACKAGE DESCRIPTIO U Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic SOIC 0.189 – 0.197* (4.801 – 5.004) 7 8 5 6 0.150 – 0.157* (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 3 2 4 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 0°– 8° TYP 0.016 – 0.050 0.406 – 1.270 0.050 (1.270) BSC 0.014 – 0.019 (0.355 – 0.483) SO8 0294 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm). S Package 16-Lead Plastic SOIC 0.386 – 0.394* (9.804 – 10.008) 16 15 14 13 12 11 10 9 0.150 – 0.157* (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 2 3 4 5 6 7 8 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 0° – 8° TYP 0.016 – 0.050 0.406 – 1.270 0.014 – 0.019 (0.355 – 0.483) 0.050 (1.270) TYP SO16 0893 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm). 16 Linear Technology Corporation LT/GP 0494 10K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977  LINEAR TECHNOLOGY CORPORATION 1994
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