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LTC2847IUHF#TRPBF

LTC2847IUHF#TRPBF

  • 厂商:

    LINEAR(凌力尔特)

  • 封装:

    QFN38

  • 描述:

    IC TXRX MULTIPROTOCOL 38-QFN

  • 数据手册
  • 价格&库存
LTC2847IUHF#TRPBF 数据手册
LTC2847 Software-Selectable Multiprotocol Transceiver with Termination and 3.3V Digital Interface U FEATURES ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC®2847 is a 3-driver/3-receiver multiprotocol transceiver with on-chip cable termination. When combined with the LTC2845, this chip set forms a complete softwareselectable DTE or DCE interface port that supports the RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21 protocols. All necessary cable termination is provided inside the LTC2847. The VCC supplies the drivers, the receivers and an internal charge pump that requires only five space-saving surface mounted capacitors. The VIN supply drives the digital interface circuitry including the receiver output drivers. It can be tied to VCC or be powered off a lower supply (down to 3V) to interface with low voltage ASICs. The LTC2847 is available in a 0.8mm tall, 5mm × 7mm QFN package. Software-Selectable Transceiver Supports: RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21 Operates from Single 5V Supply Separate Supply Pin for Digital Interface Works down to 3V On-Chip Cable Termination Complete DTE or DCE Port with LTC2845 Available in 38-Pin 5mm × 7mm QFN Package U APPLICATIO S ■ ■ ■ Data Networking CSU and DSU Data Routers , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATIO Complete DTE or DCE Multiprotocol Serial Interface with DB-25 Connector RL TM LL RI CTS DSR DCD DTR RTS RXD TXC D4 R5 21 25 D3 R3 R4 18 * 13 5 R2 22 6 TXD D3 D2 D1 T T T 12 15 11 24 14 LTC2847 LTC2845 D5 SCTE RXC D2 D1 R1 10 8 23 20 19 4 1 7 R3 R2 T T 16 3 9 R1 17 2 TXD A (103) TXD B SCTE A (113) SCTE B TXC A (114) TXC B RXC A (115) RXC B RXD A (104) RXD B SG (102) SHIELD (101) RTS A (105) RTS B DTR A (108) DCD A (109) DTR B DCD B DSR A (107) DSR B CTS A (106) CTS B RI (125) LL A (141) TM (142) RL (140) DB-25 CONNECTOR 2847 TA01 *OPTIONAL sn2847 2847fs 1 LTC2847 W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO (Note 1) ORDER PART NUMBER VEE VEE C2 – C2 + VEE C1– C1+ TOP VIEW 38 37 36 35 34 33 32 NC 1 31 GND VDD 2 30 GND NC 3 29 D1 A VCC 4 28 D1 B D1 5 27 D2 A D2 6 26 D2 B D3 7 25 D3/R1 A R1 8 24 D3/R1 B R2 9 23 NC R3 10 22 NC M0 11 21 R2 A M1 12 LTC2847CUHF LTC2847IUHF UHF PART MARKING 2847 2847I 20 R2 B NC NC R3 A R3 B DCE/DTE M2 13 14 15 16 17 18 19 VIN VCC Voltage.............................................. – 0.3V to 6.5V VIN Voltage .............................................. – 0.3V to 6.5V Input Voltage Transmitters ........................... – 0.3V to (VCC + 0.3V) Receivers ............................................... – 18V to 18V Logic Pins .............................. – 0.3V to (VCC + 0.3V) Output Voltage Transmitters ................. (VEE – 0.3V) to (VDD + 0.3V) Receivers ................................. – 0.3V to (VIN + 0.3V) VEE ........................................................ – 10V to 0.3V VDD ....................................................... – 0.3V to 10V Short-Circuit Duration Transmitter Output ..................................... Indefinite Receiver Output .......................................... Indefinite VEE .................................................................. 30 sec Operating Temperature Range LTC2847C ............................................... 0°C to 70°C LTC2847I ........................................... – 40°C to 85°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C UHF PACKAGE 38-LEAD (7mm × 5mm) PLASTIC QFN UNDERSIDE METAL INTERNALLY CONNECTED TO VEE (PCB CONNECTION OPTIONAL) TJMAX = 125°C, θJA = 34°C/W Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VIN = 3.3V, unless otherwise noted (Notes 2, 3) SYMBOL PARAMETER CONDITIONS VCC Supply Current (DCE Mode, All Digital Pins = GND or VIN) RS530, RS530-A, X.21 Modes, No Load RS530, RS530-A, X.21 Modes, Full Load V.35 Mode V.28 Mode, No Load V.28 Mode, Full Load No-Cable Mode MIN TYP MAX UNITS Supplies ICC 14 100 126 20 35 300 ● ● ● ● 130 170 75 900 mA mA mA mA mA µA IVIN VIN Supply Current (DCE Mode, All Digital Pins = GND or VIN) All Modes Except No-Cable Mode 405 µA PD Internal Power Dissipation (DCE Mode) RS530, RS530-A, X.21 Modes, Full Load V.35 Mode, Full Load V.28 Mode, Full Load 410 625 150 mW mW mW V+ Positive Charge Pump Output Voltage V.11 or V.28 Mode, No Load V.35 Mode V.28 Mode, with Load V.28 Mode, with Load, IDD = 10mA 9.3 8.0 8.7 6.5 V V V V ● ● ● 8 7 8 sn2847 2847fs 2 LTC2847 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VIN = 3.3V, unless otherwise noted (Notes 2, 3) SYMBOL PARAMETER CONDITIONS V– Negative Charge Pump Output Voltage V.28 Mode, No Load V.28 Mode, Full Load V.35 Mode RS530, RS530-A, X.21 Modes, Full Load fOSC Charge Pump Oscillator Frequency tr Charge Pump Rise Time ● ● ● MIN TYP – 7.5 – 5.5 – 4.5 – 9.6 – 8.5 – 6.5 – 6.0 V V V V 500 kHz 2 ms No-Cable Mode/Power-Off to Normal Operation MAX UNITS Logic Inputs and Outputs VIH Logic Input High Voltage D1, D2, D3, M0, M1, M2, DCE/DTE ● VIL Logic Input Low Voltage D1, D2, D3, M0, M1, M2, DCE/DTE ● IIN Logic Input Current D1, D2, D3 M0, M1, M2, DCE/DTE = GND M0, M1, M2, DCE/DTE = VIN ● ● ● – 30 – 75 2.7 3 VOH Output High Voltage IO = – 3mA ● VOL Output Low Voltage IO = 1.6mA ● IOSR Output Short-Circuit Current 0V ≤ VO ≤ VIN ● IOZR Three-State Output Current M0 = M1 = M2 = VIN, VO = GND M0 = M1 = M2 = VIN, VO = VIN ● ● VODO Open Circuit Differential Output Voltage RL = 1.95k (Figure 1) ● VODL Loaded Differential Output Voltage RL = 50Ω (Figure 1) RL = 50Ω (Figure 1) ● 2.0 V 0.2 –30 –85 0.8 V ±10 – 120 ±10 µA µA µA V 0.4 V ±50 mA –160 ±10 µA µA ±5 V 0.67VODO V V 0.2 V V.11 Driver 0.5VODO ±2 ∆VOD Change in Magnitude of Differential Output Voltage RL = 50Ω (Figure 1) ● VOC Common Mode Output Voltage RL = 50Ω (Figure 1) ● 3 V ∆VOC Change in Magnitude of Common Mode Output Voltage RL = 50Ω (Figure 1) ● 0.2 V ISS Short-Circuit Current VOUT = GND IOZ Output Leakage Current VA and VB ≤ 0.25V, Power Off or ±1 ● ±150 mA ±100 µA No-Cable Mode or Driver Disabled t r, t f Rise or Fall Time (Figures 2, 13) ● 2 15 25 ns t PLH Input to Output Rising (Figures 2, 13) ● 15 40 65 ns t PHL Input to Output Falling (Figures 2, 13) ● 15 40 65 ns ∆t Input to Output Difference, tPLH – tPHL (Figures 2, 13) ● 0 3 12 ns t SKEW Output to Output Skew (Figures 2, 13) 3 ns sn2847 2847fs 3 LTC2847 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VIN = 3.3V, unless otherwise noted (Notes 2, 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 0.2 V 40 mV V.11 Receiver VTH Input Threshold Voltage – 7V ≤ VCM ≤ 7V ● ∆VTH Input Hysteresis – 7V ≤ VCM ≤ 7V ● RIN Input Impedance –7V ≤ VCM ≤ 7V (Figure 3) ● t r, t f Rise or Fall Time CL = 50pF (Figures 4, 14) t PLH Input to Output Rising CL = 50pF (Figures 4, 14) ● 50 90 ns t PHL Input to Output Falling CL = 50pF (Figures 4, 14) ● 50 90 ns ∆t Input to Output Difference, tPLH – tPHL CL = 50pF (Figures 4, 14) ● 0 4 25 ns VOD Differential Output Voltage Open Circuit, RL = 1.95k (Figure 5) With Load, – 4V ≤ VCM ≤ 4V (Figure 6) ● ±0.44 ±0.55 ±1.2 ±0.66 V V VOA, VOB Single-Ended Output Voltage Open Circuit, RL = 1.95k (Figure 5) ● ±1.2 V VOC Transmitter Output Offset RL = 50Ω (Figure 5) ● ±0.6 V IOH Transmitter Output High Current VA, VB = 0V ● –9 – 13 mA IOL Transmitter Output Low Current VA, VB = 0V ● 9 IOZ Transmitter Output Leakage Current VA and VB ≤ 0.25V ● ROD Transmitter Differential Mode Impedance ROC Transmitter Common Mode Impedance – 2V ≤ VCM ≤ 2V (Figure 7) t r , tf t PLH Rise or Fall Time (Figures 8, 13) Input to Output (Figures 8, 13) ● 15 35 65 ns 15 35 65 ns 0 16 ns – 0.2 15 100 103 Ω 15 ns V.35 Driver ● – 11 11 13 mA ±1 ±100 µA 50 100 150 Ω 135 150 165 5 t PHL Input to Output (Figures 8, 13) ● ∆t Input to Output Difference, tPLH – tPHL (Figures 8, 13) ● t SKEW Output to Output Skew (Figures 8, 13) Ω ns 4 ns V.35 Receiver VTH Differential Receiver Input Threshold Voltage – 2V ≤ VCM ≤ 2V (Figure 9) ● ∆VTH Receiver Input Hysteresis – 2V ≤ VCM ≤ 2V (Figure 9) ● RID Receiver Differential Mode Impedance – 2V ≤ VCM ≤ 2V ● RIC Receiver Common Mode Impedance – 2V ≤ VCM ≤ 2V (Figure 10) t r, t f Rise or Fall Time CL = 50pF (Figures 4, 14) tPLH Input to Output CL = 50pF (Figures 4, 14) ● 50 90 ns tPHL Input to Output CL = 50pF (Figures 4, 14) ● 50 90 ns ∆t Input to Output Difference, tPLH – tPHL CL = 50pF (Figures 4, 14) ● 0 4 25 ns VO Output Voltage Open Circuit RL = 3k (Figure 11) ● ● ±5 ±8.5 ±10 V V ISS Short-Circuit Current VOUT = GND ● ±150 mA ROZ Power-Off Resistance – 2V < VO < 2V, Power Off or No-Cable Mode ● 300 SR Slew Rate RL = 7k, CL = 0 (Figures 11, 15) ● 4 30 V/µs t PLH Input to Output RL = 3k, CL = 2500pF (Figures 11, 15) ● 1.5 2.5 µs t PHL Input to Output RL = 3k, CL = 2500pF (Figures 11, 15) ● 1.5 2.5 µs – 0.2 0.2 V 15 40 mV 90 103 110 Ω 135 150 165 Ω 15 ns V.28 Driver Ω sn2847 2847fs 4 LTC2847 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VIN = 3.3V, unless otherwise noted (Notes 2, 3) SYMBOL PARAMETER V.28 Receiver VTHL Input Low Threshold Voltage VTLH Input High Threshold Voltage ∆VTH Receiver Input Hysteresis RIN Receiver Input Impedance t r , tf Rise or Fall Time tPLH Input to Output tPHL Input to Output CONDITIONS MIN (Figure 12) (Figure 12) (Figure 12) – 15V ≤ VA ≤ 15V CL = 50pF (Figures 12, 16) CL = 50pF (Figures 12, 16) CL = 50pF (Figures 12, 16) Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: All currents into device pins are positive; all currents out of device are negative. All voltages are referenced to device ground unless otherwise specified. TYP ● 2 0 3 ● ● ● 0.05 5 15 60 160 ● ● MAX UNITS 0.8 V V V kΩ ns ns ns 0.3 7 300 300 Note 3: All typicals are given for VCC = 5V, VIN = 3.3V, CVCC = CVIN = 10µF, CVDD = 1µF, CVEE = 3.3µF and TA = 25°C. U W TYPICAL PERFOR A CE CHARACTERISTICS V.11 Mode ICC vs Data Rate 170 V.35 Mode ICC vs Data Rate TA = 25°C 160 V.28 Mode ICC vs Data Rate 60 150 TA = 25°C TA = 25°C 145 55 140 50 ICC (mA) ICC (mA) 140 130 120 ICC (mA) 150 135 45 130 40 125 35 110 100 90 10 100 120 1000 10000 30 10 DATA RATE (kBd) 10 10000 100 1000 DATA RATE (kBd) V.11 Mode ICC vs Temperature V.35 Mode ICC vs Temperature 37.5 127.5 105 37.0 127.0 36.5 126.5 95 90 36.0 126.0 ICC (mA) ICC (mA) 100 ICC (mA) 80 100 V.28 Mode ICC vs Temperature 128.0 110 60 2846 G06 2846 G05 2846 G04 125.5 125.0 35.5 35.0 124.5 34.5 124.0 85 34.0 123.5 80 –40 –20 20 40 DATA RATE (kBd) 40 20 60 0 TEMPERATURE (°C) 80 100 2846 G07 123.0 –40 –20 40 20 0 60 TEMPERATURE (°C) 80 100 2846 G08 33.5 –40 – 20 60 40 20 TEMPERATURE (°C) 0 80 100 3846 G09 sn2847 2847fs 5 LTC2847 U U U PI FU CTIO S NC (Pins 1,3,18,19,22,23): No Connect. R3 B (Pin 16): Receiver 3 Noninverting Input. VDD (Pin 2): Generated Positive Supply Voltage for V.28. Connect a 1µF capacitor to ground. R3 A (Pin 17): Receiver 3 Inverting Input. VCC (Pin 4): Input Supply Pin. Input supply to charge pump and transceiver. 4.75V ≤ VCC ≤ 5.25V. Connect a 1µF capacitor to GND. D1 (Pin 5): TTL Level Driver 1 Input. D2 (Pin 6): TTL Level Driver 2 Input. D3 (Pin 7): TTL Level Driver 3 Input. R2 B (Pin 20): Receiver 2 Noninverting Input. R2 A (Pin 21): Receiver 2 Inverting Input. D3/R1 B (Pin 24): Receiver 1 Noninverting Input and Driver 3 Noninverting Output. D3/R1 A (Pin 25): Receiver 1 Inverting Input and Driver 3 Inverting Output. D2 B (Pin 26): Driver 2 Noninverting Output. R1 (Pin 8): CMOS Level Receiver 1 Output with Pull-Up to VIN when Three-Stated. D2 A (Pin 27): Driver 2 Inverting Output. R2 (Pin 9): CMOS Level Receiver 2 Output with Pull-Up to VIN when Three-Stated. D1 A (Pin 29): Driver 1 Inverting Output. R3 (Pin 10): CMOS Level Receiver 3 Output with Pull-Up to VIN when Three-Stated. D1 B (Pin 28): Driver 1 Noninverting Output. GND (Pins 30,31): Transceiver Ground. M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up to VIN. See Table 1. VEE (Pins 32,33,36): Generated Negative Supply Voltage. Connect a 3.3µF capacitor to GND. Exposed pad can also be connected to VEE. M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up to VIN. See Table 1. C2 – (Pin 34): Capacitor C2 Negative Terminal. Connect a 1µF capacitor between C2 + and C2 –. VIN (Pin 13): Input Supply Pin. Input supply to digital interface including receiver output drivers. 3V ≤ VIN ≤ 5.25V. Connect to VCC (Pin 4) or to separate supply for lower receiver output swing. Connect a 1µF capacitor to GND. C2 + (Pin 35): Capacitor C2 Positive Terminal. Connect a 1µF capacitor between C2 + and C2 – . M2 (Pin 14): TTL Level Mode Select Input 2 with Pull-Up to VIN. See Table 1. C1– (Pin 37): Capacitor C1 Negative Terminal. Connect a 1µF capacitor between C1+ and C1–. C1+ (Pin 38): Capacitor C1 Positive Terminal. Connect a 1µF capacitor between C1+ and C1–. DCE/DTE (Pin 15): TTL Level Mode Select Input with Pull-Up to VIN. See Table 1. sn2847 2847fs 6 LTC2847 W BLOCK DIAGRA CHARGE PUMP C1– 37 C1– C2+ 35 C2+ C1+ 38 C1+ C2– 34 C2– VDD 2 VDD VEE VCC GND VCC 4 32 33 36 VEE 30 31 GND 29 D1 A 50Ω S1 D1 5 D1 S2 125Ω 50Ω 28 D1 B 27 D2 A 50Ω S1 D2 6 D2 S2 125Ω 50Ω 26 D2 B D3 7 D3 25 D3/R1 A 10k 20k 6k S3 DCE/DTE 15 10k 51.5Ω S2 S1 125Ω 51.5Ω 20k 24 D3/R1 B R1 8 R1 21 R2 A 20k 6k 10k R2 9 51.5Ω S3 R2 S2 125Ω 10k 51.5Ω 20 R2 B 20k 17 R3 A 20k 6k 10k R3 10 VIN 13 10k M0 11 M1 12 M2 14 MODE SELECTION LOGIC 51.5Ω S3 R3 S2 125Ω 51.5Ω 16 R3 B 20k 2847 BD sn2847 2847fs 7 LTC2847 TEST CIRCUITS D RL B D VOD A RL B A VOC CL 100pF RL 100Ω CL 100pF 2847 F02 2847 F01 Figure 1. V.11 Driver DC Test Circuit IB Figure 2. V.11 Driver AC Test Circuit B R B IA VCM = ±7V A + – CL A 2(VB – VA) RIN = IB – IA 2847 F03 2847 F04 Figure 3. Input Impedance Test Circuit VOB 125Ω R Figure 4. V.11, V.35 Receiver AC Test Circuit VOB 50Ω RL 125Ω 50Ω 50Ω 50Ω 50Ω 125Ω 125Ω 50Ω VOD 50Ω VOC RL 2847 F05 2847 F06 VOA + – 50Ω VCM VCM = ±2V 2847 F07 VOA Figure 5. V.35 Driver Open-Circuit Test Figure 6. V.35 Driver Test Circuit Figure 7. V.35 Driver Common Mode Impedance Test Circuit 51.5Ω 125Ω 50Ω 50Ω 50Ω 50Ω VTH + – 2847 F08 VCM + – 125Ω 125Ω VCM = ± 2V + – 2847 F10 2847 F09 Figure 8. V.35 Driver AC Test Circuit D Figure 9. V.35 Receiver DC Test Circuit A A CL RL 2847 F11 Figure 11. V.28 Driver Test Circuit 51.5Ω VA Figure 10. Receiver Common Mode Impedance Test Circuit R CL 2847 F12 Figure 12. V.28 Receiver Test Circuit sn2847 2847fs 8 LTC2847 U W ODE SELECTIO Table 1 Not Used (Default V.11) 0 0 0 0 (Note 1) M2 M1 M0 DCE/ D1,2 D3 DTE (Note 1) Mode Name TTL X D1 A D2 B A D3 B V.11 V.11 V.11 V.11 A B Z Z R1 R2 R3 R1 R2,R3 (Note 2) (Note 2) (Note 2) (Note 3) (Note 3) VDD (Note 4) VEE (Note 5) V.11 V.11 V.11 V.11 V.11 V.11 CMOS CMOS 9.3V –6V A B A B A B RS530A 0 0 1 0 TTL X V.11 V.11 V.11 V.11 Z Z V.11 V.11 V.11 V.11 V.11 V.11 CMOS CMOS 9.3V –6V RS530 0 1 0 0 TTL X V.11 V.11 V.11 V.11 Z Z V.11 V.11 V.11 V.11 V.11 V.11 CMOS CMOS 9.3V –6V X.21 0 1 1 0 TTL X V.11 V.11 V.11 V.11 Z Z V.11 V.11 V.11 V.11 V.11 V.11 CMOS CMOS 9.3V –6V V.35 1 0 0 0 TTL X V.35 V.35 V.35 V.35 Z Z V.35 V.35 V.35 V.35 V.35 V.35 CMOS CMOS 8V –6.5V RS449/V.36 1 0 1 0 TTL X V.11 V.11 V.11 V.11 Z Z V.11 V.11 V.11 V.11 V.11 V.11 CMOS CMOS 9.3V –6V V.28/RS232 1 1 0 0 TTL X V.28 Z V.28 Z Z Z V.28 30k V.28 30k V.28 30k CMOS CMOS 8.7V –8.5V No Cable 1 1 1 0 X X Z Z Z Z Z Z 30k 30k 30k 30k Not Used (Default V.11) 0 0 0 1 30k 30k Z Z 4.7V 0.3V TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11 Z CMOS 9.3V –6V RS530A 0 0 1 1 TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11 Z CMOS 9.3V –6V RS530 0 1 0 1 TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11 Z CMOS 9.3V –6V X.21 0 1 1 1 TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11 Z CMOS 9.3V –6V V.35 1 0 0 1 TTL TTL V.35 V.35 V.35 V.35 V.35 V.35 30k 30k V.35 V.35 V.35 V.35 Z CMOS 8V –6.5V RS449/V.36 1 0 1 1 TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11 Z CMOS 9.3V –6V V.28/RS232 1 1 0 1 TTL TTL V.28 30k 30k V.28 30k V.28 30k Z CMOS 8.7V –8.5V No Cable 1 1 1 1 30k 30k 30k 30k Z Z 4.7V 0.3V X X Z Z V.28 Z V.28 Z Z Z Z Z Z Note 1: Driver inputs are TTL level compatible. Note 2: Unused receiver inputs are terminated with 30k to ground. In addition, R2 and R3 are always terminated by a 103Ω differential impedence (see Block Diagram on page 7). Note 3: Receiver Outputs are CMOS level compatible and have a weak pull up to VIN when Z. 30k 30k Note 4: VDD values shown are typical values for VCC = 5V, VIN = 3.3V and TA = 25°C with LTC2847 under full load for each mode. Note 5: VEE values shown are typical values for VCC = 5V, VIN = 3.3V and TA = 25°C with LTC2847 under full load for each mode. U W W SWITCHI G TI E WAVEFOR S 3V f = 1MHz : t r ≤ 10ns : t f ≤ 10ns 1.5V D 0V 1.5V t PHL t PLH VO B–A –VO 90% 90% 50% 10% tr 1/2 VO 50% 10% tf A VO B t SKEW t SKEW 2847 F13 Figure 13. V.11, V.35 Driver Propagation Delays VOD2 B–A –VOD2 VOH R VOL f = 1MHz : t r ≤ 10ns : t f ≤ 10ns 0V INPUT 0V t PHL t PLH 1.65V OUTPUT 1.65V 2847 F14 Figure 14. V.11, V.35 Receiver Propagation Delays sn2847 2847fs 9 LTC2847 U W W SWITCHI G TI E WAVEFOR S 3V 1.5V 1.5V D 0V t PHL VO t PLH 3V 0V A –VO SR = 6V tf –3V 3V SR = 6V tr 0V –3V tf 2847 F15 tr Figure 15. V.28 Driver Propagation Delays VIH 1.5V 1.5V A VIL t PHL VOH R VOL t PLH 1.65V 1.65V 2847 F16 Figure 16. V.28 Receiver Propagation Delays U W U U APPLICATIO S I FOR ATIO Overview The LTC2847 consists of a charge pump and a 3-driver/ 3-receiver transceiver. The 5V VCC input powers the charge pump and transceiver. The charge pump generates the VDD and VEE supplies. The LTC2847’s VDD and VEE supplies can be used to power a companion chip like the LTC2845. The VIN input powers the digital interface including the receiver output drivers. Having a separate pin to power the digital interface allows the flexibility of controlling the receiver output swing to interface with 5V or 3.3V logic. The LTC2847 and LTC2845 form a complete softwareselectable DTE or DCE interface port that supports the RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21 protocols. Cable termination is provided on-chip, eliminating the need for discrete termination designs. A complete DCE-to-DTE interface operating in EIA530 mode is shown in Figure 17. The LTC2847 half of each port is used to generate and appropriately terminate the clock and data signals. The LTC2845 is used to generate the control signals along with LL (local loopback), RL (Remote Loop-Back), TM (Test Mode) and RI (Ring Indicate). Mode Selection The interface protocol is selected using the mode select pins M0, M1 and M2 (see Table 1). For example, if the port is configured as a V.35 interface, the mode selection pins should be M2 = 1, M1 = 0, M0 =␣ 0. For the control signals, the drivers and receivers will operate in V.28 (RS232) electrical mode. For the clock and data signals, the drivers and receivers will operate in V.35 electrical mode. The DCE/DTE pin will configure the port for DCE mode when high, and DTE when low. The interface protocol may be selected simply by plugging the appropriate interface cable into the connector. The mode pins are routed to the connector and are left unconnected (1) or wired to ground (0) in the cable as shown in Figure 18. The internal pull-up current sources will ensure a binary 1 when a pin is left unconnected. The mode selection may also be accomplished by using jumpers to connect the mode pins to ground or VIN. sn2847 2847fs 10 LTC2847 U W U U APPLICATIO S I FOR ATIO SERIAL CONTROLLER DTE DCE LTC2847 LTC2847 TXD D1 TXD 103Ω R3 SERIAL CONTROLLER TXD SCTE D2 SCTE 103Ω R2 SCTE R1 D3 TXC R1 103Ω TXC D3 TXC RXC R2 103Ω RXC D2 RXC RXD R3 103Ω RXD D1 RXD LTC2845 LTC2845 RTS D1 RTS R3 RTS DTR D2 DTR R2 DTR D3 R1 DCD R1 DCD D3 DCD DSR R2 DSR D2 DSR CTS R3 CTS D1 CTS LL TM RI RL LL D4 R4 TM R4 R5 D5 D4 RI D5 RL R5 LL TM RI RL 2847 F17 Figure 17. Complete Multiprotocol Interface in EIA530 Mode When the cable is removed, leaving all mode pins unconnected, the LTC2847/LTC2845 will enter no-cable mode. In this mode the LTC2847/LTC2845 supply current drops to less than 1000µA and the LTC2847/LTC2845 driver outputs are forced into a high impedance state. At the same time, the R2 and R3 receivers of the LTC2847 are differentially terminated with 103Ω and the other receiv- ers on the LTC2847 and LTC2845 are terminated with 30kΩ to ground. Cable Termination Traditional implementations used expensive relays to switch resistors or required the user to change termination modules every time a new interface standard was sn2847 2847fs 11 LTC2847 U W U U APPLICATIO S I FOR ATIO (DATA) CONNECTOR M0 LTC2847 M1 M2 NC DCE/DTE NC CABLE DCE/DTE M2 LTC2845 M1 M0 (DATA) 2847 F18 Figure 18. Single Port DCE V.35 Mode Selection in the Cable selected. Switching the terminations with FETs is difficult because the FETs must remain off when the signal voltage is beyond the supply voltage. Alternatively, custom cables may contain termination in the cable head or route signals to various terminations on the board. BALANCED INTERCONNECTING CABLE GENERATOR LOAD CABLE TERMINATION The LTC2847/LTC2845 chip set solves the cable termination switching problem by automatically providing the appropriate termination and switching on-chip for the V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35 electrical protocols. A A' C C' RECEIVER 2847 F19 Figure 19. Typical V.10 Interface V.10 (RS423) Interface IZ All V.10 drivers and receivers necessary for the RS449, EIA530, EIA530-A, V.36 and X.21 protocols are implemented on the LTC2845. A typical V.10 unbalanced interface is shown in Figure 19. A V.10 single-ended generator with output A and ground C is connected to a differential receiver with input A' connected to A, and ground C' connected via the signal return to ground C. Usually, no cable termination is required for V.10 interfaces, but the receiver inputs must be compliant with the impedance curve shown in Figure 20. The V.10 receiver configuration in the LTC2845 is shown in Figure 21. In V.10 mode, switch S3 inside the LTC2845 is turned off. The noninverting input is disconnected inside the LTC2845 receivers and connected to ground. –10V 3.25mA –3V VZ 3V –3.25mA 10V 2847 F20 Figure 20. V.10 Receiver Input Impedance sn2847 2847fs 12 LTC2847 U W U U APPLICATIO S I FOR ATIO A' A A' LTC2845 R8 6k R5 20k R1 51.5Ω R6 10k S3 LTC2847 R8 6k R6 10k RECEIVER S1 R3 124Ω S2 R4 20k B B' C' R7 10k B' GND Figure 21. V.10 Receiver Configuration GENERATOR A RECEIVER A' B B' C C' R7 10k R4 20k GND 2847 F23 Figure 23. V.11 Receiver Configuration LOAD CABLE TERMINATION RECEIVER S3 R2 51.5Ω C' 2847 F21 BALANCED INTERCONNECTING CABLE R5 20k termination impedance to the cable as shown in Figure 231. The LTC2845 only handles control signals, so no termination other than its V.11 receivers’ 30k input impedance is necessary. V.28 (RS232) Interface 100Ω MIN 2847 F22 Figure 22. Typical V.11 Interface The cable termination is then the 30k input impedance to ground of the LTC2845 V.10 receiver. A typical V.28 unbalanced interface is shown in Figure 24. A V.28 single-ended generator with output A and ground C is connected to a single-ended receiver with input A' connected to A and ground C' connected via the signal return to ground C. BALANCED INTERCONNECTING CABLE GENERATOR V.11 (RS422) Interface A typical V.11 balanced interface is shown in Figure 22. A V.11 differential generator with outputs A and B and ground C is connected to a differential receiver with input A' connected to A, input B' connected to B, and ground C' connected via the signal return to ground C. The V.11 interface has a differential termination at the receiver end that has a minimum value of 100Ω. The termination resistor is optional in the V.11 specification, but for the high speed clock and data lines, the termination is essential to prevent reflections from corrupting the data. The receiver inputs must also be compliant with the impedance curve shown in Figure 20. In V.11 mode, all switches are off except S1 of the LTC2847’s receivers which connects a 103Ω differential LOAD CABLE TERMINATION A A' C C' RECEIVER 2847 F24 Figure 24. Typical V.28 Interface A' LTC2847 R1 51.5Ω S1 S2 B' C' R8 6k R3 124Ω R5 20k R6 10k S3 R2 51.5Ω R4 20k GND RECEIVER R7 10k 2847 F25 1Actually, there is no switch S1 in receivers R2 and R3. However, for simplicity, all termination networks on the LTC2847 can be treated identically if it is assumed that an S1 switch exists and is always closed on the R2 and R3 receivers. Figure 25. V.28 Receiver Configuration sn2847 2847fs 13 LTC2847 U W U U APPLICATIO S I FOR ATIO In V.28 mode, S3 is closed inside the LTC2847/LTC2845 which connects a 6k (R8) impedance to ground in parallel with 20k (R5) plus 10k (R6) for a combined impedance of 5k as shown in Figure 25. Proper termination is only provided when the B input of the receivers is floating, since S1 of the LTC2847’s R2 and R3 receivers remains on in V.28 mode1. The noninverting input is disconnected inside the LTC2847/LTC2845 receiver and connected to a TTL level reference voltage to give a 1.4V receiver trip point. V.35 Interface A typical V.35 balanced interface is shown in Figure 26. A V.35 differential generator with outputs A and B and ground C is connected to a differential receiver with input A' connected to A, input B' connected to B, and ground C' connected via the signal return to ground C. The V.35 interface requires a T or delta network termination at the receiver end and the generator end. The receiver differential impedance measured at the connector must be 100Ω␣ ±10Ω, and the impedance between shorted terminals (A' and B') and ground (C') must be 150Ω ±15Ω. BALANCED INTERCONNECTING CABLE GENERATOR LOAD CABLE TERMINATION A' A 50Ω RECEIVER 125Ω 50Ω 125Ω 50Ω 50Ω B B' C C' 2847 F26 Figure 26. Typical V.35 Interface A' LTC2847 R1 51.5Ω R8 6k S2 B' C' R3 124Ω No-Cable Mode The no-cable mode (M0 = M1 = M2 = 1) is intended for the case when the cable is disconnected from the connector. The charge pump, bias circuitry, drivers and receivers are turned off, the driver outputs are forced into a high impedance state, and the VCC supply current to the transceiver drops to less than 300µA while its VIN supply current drops to less than 10µA. Note that the LTC2847’s R2 and R3 receivers continue to be terminated by a 103Ω differential impedance. Charge Pump The LTC2847 uses an internal capacitive charge pump to generate VDD and VEE as shown in Figure 28. A voltage doubler generates about 8V on VDD and a voltage inverter generates about – 7.5V on VEE. Four 1µF surface mounted tantalum or ceramic capacitors are required for C1, C2, C3 and C5. The VEE capacitor C4 should be a minimum of 3.3µF. All capacitors are 16V and should be placed as close as possible to the LTC2847 to reduce EMI. Receiver Fail-Safe All LTC2847/LTC2845 receivers feature fail-safe operation in all modes. If the receiver inputs are left floating or are shorted together by a termination resistor, the receiver output will always be forced to a logic high. R5 20k R6 10k S1 In V.35 mode, both switches S1 and S2 inside the LTC2847 are on, connecting a T network impedance as shown in Figure 27. The 30k input impedance of the receiver is placed in parallel with the T network termination, but does not affect the overall input impedance significantly. The generator differential impedance must be 50Ω to 150Ω and the impedance between shorted terminals (A and B) and ground (C) must be 150Ω ±15Ω. RECEIVER C3 1µF S3 C1 1µF R2 51.5Ω R4 20k R7 10k C2 + C1+ C2 – C2 1µF LTC2847 C1– VEE + VCC 5V GND VDD 2847 F27 C4 3.3µF GND C5 1µF 2847 F28 Figure 27. V.35 Receiver Configuration Figure 28. Charge Pump sn2847 2847fs 14 LTC2847 U TYPICAL APPLICATIO S DTE vs DCE Operation The DCE/DTE pin acts as an enable for Driver 3/Receiver␣ 1 in the LTC2847, and Driver 3/Receiver 1 in the LTC2845. The LTC2847/LTC2845 can be configured for either DTE or DCE operation in one of two ways: a dedicated DTE or DCE port with a connector of appropriate gender or a port with one connector that can be configured for DTE or DCE operation by rerouting the signals to the LTC2847/LTC2845 using a dedicated DTE cable or dedicated DCE cable. A dedicated DTE port using a DB-25 male connector is shown in Figure 29. The interface mode is selected by logic outputs from the controller or from jumpers to either VIN or GND on the mode select pins. A dedicated DCE port using a DB-25 female connector is shown in Figure 30. A port with one DB-25 connector, that can be configured for either DTE or DCE operation is shown in Figure 31. The configuration requires separate cables for proper signal routing in DTE or DCE operation. For example, in DTE mode, the TXD signal is routed to Pins 2 and 14 via the LTC2847’s Driver 1. In DCE mode, Driver 1 now routes the RXD signal to Pins 2 and 14. Power Dissipation Calculations The LTC2847 takes in 5V VCC. VDD and VEE are in turn produced from VCC with an internal charge pump at approximately 80% and 70% efficiency respectively. Current drawn internally from VDD or VEE translates directly into a higher ICC. The LTC2847 dissipates power according to the equation: PDISS(2847) = VCC • ICC – ND • PRT + NR • PRT (1) PRT refers to the power dissipated by each driver in a receiver termination on the far end of the cable while ND is the number of drivers. Conversely, current from the far end drivers dissipate power NR • PRT in the internal receiver termination where NR is the number of receivers. LTC2847 Power Dissipation Consider an LTC2847 in X.21, DCE mode (three V.11 drivers and two V.11 receivers). From the Electrical Characteristics Table, ICC at no load = 14mA, ICC at full load = 100mA. Each receiver termination is 100Ω (RRT) and current going into each receiver termination = (100mA – 14mA)/3 = 28.7mA (IRT). PRT = (IRT)2 • RRT (2) From Equation (2), PRT = 82.4mW and from Equation (1), DC power dissipation PDISS(2847) = 5V • 100mA – 3 • 82.4mW + 2 • 82.4mW = 418mW. Consider the above example running at a baud rate of 10MBd. From the Typical Characteristic for “V.11 Mode ICC vs Data Rate,” the ICC at 10MBd is 160mA. ICC increases with baud rate due to driver transient dissipation. From Equation (1), AC power dissipation PDISS(2847) = 5V • 160mA –3 • 82.4mW + 2 • 82.4mW = 718mW. LTC2845 Power Dissipation If a LTC2845 is used to form a complete DCE port with the LTC2847, it will be running in the X.21 mode (three V.11 drivers and two V.10 drivers, two V.11 receivers and two V.10 receivers, all with internal 30k termination). In addition to VCC, it uses the VDD and VEE outputs from the LTC2847. Negligible power is dissipated in the large internal receiver termination of the LTC2845 so the NR • PRT term of Equation (1) can be omitted. Thus Equation (1) is modified as follows: PDISS(2845) = (VCC • ICC) + (VDD • IDD) + (VEE • IEE) – ND • PRT (3) Since power is drawn from the supplies of the LTC2847 (VDD and VEE) at less than 100% efficiency, the LTC2847 dissipates extra power to source PDISS(2845) and PRT : PDISS1(2847) = 125% • (VDD • IDD) + 143% • (4) (VEE • IEE) – PDISS(2845) – ND • PRT = 25% • (VDD • IDD) + 43% • (VEE • IEE) From the LTC2845 Electrical Characteristics Table, for VCC = 5V, VDD = 8V and VEE = – 5.5V: ICC at no load 2.7mA ICC at full load with all drivers high 110mA IEE at no load 2mA IEE at full load with both V.10 drivers low 23mA IDD at no load 0.3mA IDD at full load 0.3mA sn2847 2847fs 15 LTC2847 U TYPICAL APPLICATIO S C3 1µF C2 1µF C1 1µF CHARGE PUMP VCC 5V + C5 1µF C4 3.3µF LTC2847 TXD D1 2 T 14 24 SCTE D2 T D3 11 R1 12 17 T R2 RXC 9 3 RXD T R3 16 M0 7 M1 M2 C8 1µF 1 VIN 3.3V C6 1µF DCE/DTE C7 1µF VCC VEE VDD GND D1 19 20 D2 DTR SCTE A (113) SCTE B TXC A (114) TXC B RXC A (115) RXC B RXD A (104) RXD B SG SHIELD DB-25 MALE CONNECTOR C9 1µF 4 RTS TXD B T 15 TXC TXD A (103) 23 RTS A (105) RTS B DTR A (108) DTR B D3 LTC2845 8 R1 DCD 10 6 R2 DSR 22 5 R3 CTS 13 18 R4 LL RI D4 TM R5 RL * 25 21 D5 M0 M0 VIN M1 M1 D4ENB M2 M2 DCE/DTE R4EN VIN 3.3V C10 1µF DCD A (109) DCD B DSR A (107) DSR B CTS A (106) CTS B LL (141) RI (125) TM (142) RL (140) *OPTIONAL 2847 F29 NC Figure 29. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector sn2847 2847fs 16 LTC2847 U TYPICAL APPLICATIO S C3 1µF C2 1µF C1 1µF CHARGE PUMP VCC 5V + C5 1µF C4 3.3µF LTC2847 RXD D1 2 T 14 24 RXC D2 T D3 11 R1 12 24 T R2 SCTE 11 2 TXD T R3 14 M0 7 M1 M2 NC C7 1µF C8 1µF VIN 3.3V C6 1µF DCE/DTE VCC VEE VDD GND 1 D1 13 6 D2 DSR RXC A (115) RXC B TXC A (114) TXC B SCTE A (113) SCTE B TXD A (103) TXD B SGND (102) SHIELD (101) DB-25 FEMALE CONNECTOR C9 1µF 5 CTS RXD B T 15 TXC RXD A (104) 22 CTS A (106) CTS B DSR A (107) DSR B D3 LTC2845 8 R1 DCD 10 20 R2 DTR 23 4 R3 RTS 19 * R4 RI LL D4 RL R5 18 21 25 D5 TM M0 M0 VIN M1 M1 D4ENB M2 M2 NC DCE/DTE R4EN C10 1µF VIN 3.3V DCD A (109) DCD B DTR A (108) DTR B RTS A (105) RTS B RI (125) LL (141) RL (140) TM 9142) *OPTIONAL 2847 F30 NC Figure 30. Controller-Selectable DCE Port with DB-25 Connector sn2847 2847fs 17 LTC2847 U TYPICAL APPLICATIO S C3 1µF C2 1µF C1 1µF CHARGE PUMP VCC 5V + C5 1µF C4 3.3µF LTC2847 DTE_TXD/DCE_RXD D1 2 T 14 24 DTE_SCTE/DCE_RXC D2 T D3 11 R1 12 17 DTE_RXC/DCE_SCTE T R2 9 3 DTE_RXD/DCE_TXD T R3 16 M0 7 M1 M2 VIN 3.3V C6 1µF DCE/DTE C7 1µF C8 1µF DTE_RTS/DCE_CTS VCC VEE VDD GND 1 TXD B RXD B SCTE A RXC A SCTE B RXC B TXC A TXC A TXC B TXC B RXC A SCTE A RXC B SCTE B RXD A TXD A RXD B TXD B SG SHIELD DB-25 CONNECTOR C9 1µF 4 D1 19 20 DTE_DTR/DCE_DSR DCE RXD A T 15 DTE_TXC/DCE_TXC DTE TXD A D2 23 RTS A CTS A RTS B CTS B DTR A DSR A DTR B DSR B DCD A DCD A D3 LTC2845 DTE_DCD/DCE_DCD 8 R1 10 6 R2 DTE_DSR/DCE_DTR 22 5 DTE_CTS/DCE_RTS R3 DTE_LL/DCE_RI 13 18 D4 DTE_RI/DCE_LL R4 DTE_TM/DCE_RL R5 DTE_RL/DCE_TM * 25 21 D5 M0 M0 VIN M1 M1 D4ENB M2 M2 DCE/DTE DCE/DTE R4EN 15 C10 1µF VIN 3.3V DCD B DCD B DSR A DTR A DSR B DTR B CTS A RTS A CTS B RTS B LL LL RI RI TM TM RL RL *OPTIONAL 2847 F31 NC Figure 31. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector sn2847 2847fs 18 LTC2847 U PACKAGE DESCRIPTIO UHF Package 38-Lead Plastic QFN (5mm × 7mm) (Reference LTC DWG # 05-08-1701) 0.70 ± 0.05 5.50 ± 0.05 (2 SIDES) 4.10 ± 0.05 (2 SIDES) 3.20 ± 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 5.20 ± 0.05 (2 SIDES) 6.10 ± 0.05 (2 SIDES) 7.50 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD LAYOUT 5.00 ± 0.10 (2 SIDES) 3.15 ± 0.10 (2 SIDES) 0.75 ± 0.05 0.00 – 0.05 0.435 0.18 0.18 37 38 PIN 1 TOP MARK (SEE NOTE 6) 1 0.23 2 5.15 ± 0.10 (2 SIDES) 7.00 ± 0.10 (2 SIDES) 0.40 ± 0.10 0.200 REF 0.25 ± 0.05 0.200 REF 0.00 – 0.05 0.75 ± 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE M0-220 VARIATION WHKD 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 0.50 BSC R = 0.115 TYP (UH) QFN 0303 BOTTOM VIEW—EXPOSED PAD 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE sn2847 2847fs Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC2847 U TYPICAL APPLICATIO S The V.11 drivers are driven between VCC and GND while the V.10 drivers are driven between VCC and VEE. Assume that the V.11 driver outputs are high and V.10 driver outputs low. Current going into each 100Ω V.11 receiver termination = (110mA – 2.7mA) – 23mA/3 = 28.1mA. Current going into each 450Ω V.10 receiver termination = 23mA – 2mA/2 = 10.5mA. From Equation (2), V.11 PRT = 79mW and V.10 PRT = 49.6mW. From Equation (3), PDISS(2845) = 5V • (110mA – 23mA) + (8V • 0.3mA) + 5.5V • 23mA – 3 • 79mW – 2 • 49.6mW = 228mW. Since the LTC2845 runs slow control signals, the AC power dissipation can be assumed to be equal to the DC power dissipation. The extra power dissipated in the LTC2847 due to LTC2845 is given by Equation(4), PDISS1(2847) = 25% • (8V • 0.3mA) + 43% • (5.5V • 23mA) = 55mW. So for an X.21 DCE port running at 10MBd, the LTC2847 dissipates approximately 718mW + 55mW = 773mW while the LTC2845 dissipates 228mW. RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1321 Dual RS232/RS485 Transceiver Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs LTC1334 Single 5V RS232/RS485 Multiprotocol Transceiver Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs LTC1343 Software-Selectable Multiprotocol Transceiver 4-Driver/4-Receiver for Data and Clock Signals LTC1344A Software-Selectable Cable Terminator Perfect for Terminating the LTC1543 (Not Needed with LTC1546) LTC1345 Single Supply V.35 Transceiver 3-Driver/3-Receiver for Data and Clock Signals LTC1346A Dual Supply V.35 Transceiver 3-Driver/3-Receiver for Data and Clock Signals LTC1543 Software-Selectable Multiprotocol Transceiver Terminated with LTC1344A for Data and Clock Signals, Companion to LTC1544 or LTC1545 for Control Signals LTC1544 Software-Selectable Multiprotocol Transceiver Companion to LTC1546 or LTC1543 for Control Signals Including LL LTC1545 Software-Selectable Multiprotocol Transceiver 5-Driver/5-Receiver Companion to LTC1546 or LTC1543 for Control Signals Including LL, TM and RL LTC1546 Software-Selectable Multiprotocol Transceiver 3-Driver/3-Receiver with Termination for Data and Clock Signals LTC2844 3.3V Software-Selectable Multiprotocol Transceiver Companion to LTC2846 for Control Signals Including LL LTC2845 3.3V Software-Selectable Multiprotocol Transceiver 5-Driver/5-Receiver Companion to LTC2846 or LTC2847 for Control Signals Including LL, TM and RL LTC2846 3.3V Software-Selectable Multiprotocol Transceiver 3.3V Supply, 3-Driver/3-Receiver with Termination for Data and Clock Signals, Generates the Required 5V and ±8V Supplies for LTC2846 Companion Parts sn2847 2847fs 20 Linear Technology Corporation LT/TP 0603 1K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com  LINEAR TECHNOLOGY CORPORATION 2003
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