MAX13047E

19-4149; Rev 1; 8/08 Single- and Dual-Bidirectional Low-Level Translator General Description The MAX13046E/MAX13047E ±15kV ESD-protected bidirectional level translators provide level shifting for data transfer in a multivoltage system. The MAX13046E is a single-channel translator, and the MAX13047E is a dual-channel translator. Externally applied voltages, VCC and VL, set the logic level on either side of the device. The MAX13046E/MAX13047E utilize a transmission-gate-based design to allow data translation in either direction (VL↔VCC) on any single data line. The MAX13046E/MAX13047E accept VL from +1.1V to the minimum of either +3.6V or (VCC + 0.3V), and VCC from +1.65V to +5.5V, making these devices ideal for data transfer between low-voltage ASICs/PLDs and higher voltage systems. The MAX13046E/MAX13047E feature a shutdown mode that reduces supply current to less than 1µA thermal short-circuit protection, and ±15kV ESD protection on the VCC side for enhanced protection in applications that route signals externally. The MAX13046E/MAX13047E operate at a guaranteed data rate of 8Mbps when pushpull driving is used. The MAX13046E is available in a 6-pin µDFN package, and the MAX13047E is available in a 10-pin UTQFN. Both devices are specified over the extended -40°C to +85°C operating temperature range. Features ♦ Bidirectional Level Translation ♦ Operation Down to +1.1V on VL ♦ Ultra-Low Supply Current in Shutdown Mode 1µA (max) ♦ Guaranteed Push-Pull Driving Data Rate 8Mbps (+1.2V ≤ VL ≤ +3.6V, VCC ≤ +5.5V) 16Mbps (+1.8V ≤ VL ≤ VCC ≤ +3.3V) ♦ Extended ESD Protection on the I/O VCC Lines ±15kV Human Body Model ±15kV IEC61000-4-2 Air-Gap Discharge Method ±8kV IEC61000-4-2 Contact Discharge ♦ Low Supply Current ♦ Short-Circuit Protection ♦ Space-Saving µDFN and UTQFN Packages MAX13046E/MAX13047E Pin Configurations TOP VIEW MAX13046E VCC 6 SHDN 5 I/O VCC 4 + 1 2 GND 3 I/O VL VL1 Applications I2C and 1-Wire® Level Translation CMOS Logic-Level Translation Cell Phones Portable Devices I/O VCC1 GND 8 9 µDFN 1mm × 1.5mm MAX13047E N.C. 7 VCC 6 5 4 3 1 I/O VL2 2 VL I/O VCC2 SHDN N.C. 1-Wire is a registered trademark of Maxim Integrated Products, Inc. I/O VL1 10 + Typical Application Circuits appear at end of data sheet. UTQFN 1.4mm × 1.8mm Ordering Information/Selector Guide PART MAX13046EELT+ MAX13047EEVB+ PIN-PACKAGE 6 µDFN (1mm x 1.5mm) 10 UTQFN (1.4mm x 1.8mm) NUMBER OF CHANNELS 1 2 TOP MARK OC AAC Note: All devices are specified over the extended -40°C to +85°C operating temperature range. +Denotes a lead-free/RoHS-compliant package. EP = Exposed pad. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. Single- and Dual-Bidirectional Low-Level Translator MAX13046E/MAX13047E ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) VCC ...........................................................................-0.3V to +6V VL ..............................................................................-0.3V to +4V I/O VCC .......................................................-0.3V to (VCC + 0.3V) I/O VL ............................................................-0.3V to (VL + 0.3V) SHDN........................................................................-0.3V to +6V Short-Circuit Duration I/O VL, I/O VCC to GND...........Continuous Power Dissipation (TA = +70°C) 6-Pin µDFN (derate 2.1mW/°C above +70°C) .............168mW 10-Pin UTQFN (derate 6.9mW/°C above +70°C).........559mW Junction-to-Ambient Thermal Resistance (θJA) (Note 1) 6-Pin µDFN .................................................................477°C/W 10-Pin UTQFN ...........................................................20.1°C/W Junction-to-Ambient Thermal Resistance (θJC) (Note 1) 6-Pin µDFN ................................................................20.1°C/W 10-Pin UTQFN .........................................................143.1°C/W Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +1.65V to +5.5V, VL = +1.1V to minimum of either +3.6V or ((VCC + 0.3V)), I/O VL and I/O VCC are unconnected, TA = -40°C to +85°C, unless otherwise noted. Typical values are VCC = +3.3V, VL = +1.8V at TA = +25°C.) (Notes 2, 3) PARAMETER POWER SUPPLY VL Supply Range VCC Supply Range Supply Current from VCC Supply Current from VL VCC Shutdown-Mode Supply Current VL Shutdown-Mode Supply Current I/O VL and I/O VCC Shutdown-Mode Leakage Current SHDN Input Leakage ESD PROTECTION Human Body Model I/O VCC (Note 4) All Other Pins LOGIC-LEVEL THRESHOLDS I/O VL Input-Voltage High I/O VL Input-Voltage Low VIHL VILL VL 0.2 0.15 V V IEC 61000-4-2 Air-Gap Discharge IEC 61000-4-2 Contact Discharge Human Body Model ±15V ±15V ±8V ±2 kV kV VL VCC IQVCC IQVL ISD-VCC ISD-VL ISD-LKG TA = +25°C, SHDN = GND TA = +25°C, SHDN = GND TA = +25°C, SHDN = GND TA = +25°C 0.03 0.03 0.02 0.02 VCC > 3.3V VCC ≤ 3.3V 1.1 1.1 1.65 3.6V VCC + 0.3V 5.5 10 15 1 1 0.5 0.1 V V µA µA µA µA µA µA SYMBOL CONDITIONS MIN TYP MAX UNITS 2 _______________________________________________________________________________________ Single- and Dual-Bidirectional Low-Level Translator ELECTRICAL CHARACTERISTICS (continued) (VCC = +1.65V to +5.5V, VL = +1.1V to minimum of either +3.6V or ((VCC + 0.3V)), I/O VL and I/O VCC are unconnected, TA = -40°C to +85°C, unless otherwise noted. Typical values are VCC = +3.3V, VL = +1.8V at TA = +25°C.) (Notes 2, 3) PARAMETER I/O VCC Input-Voltage High I/O VCC Input-Voltage Low I/O VL Output-Voltage High I/O VL Output-Voltage Low I/O VCC Output-Voltage High I/O VCC Output-Voltage Low SHDN Input-Voltage High SHDN Input-Voltage Low I/O VL-to-I/O VCC Resistance VCC Shutdown Threshold Low VCC Shutdown Threshold High VL Shutdown Threshold Pullup Resistance RISE/FALL-TIME ACCELERATOR STAGE Accelerator Pulse Duration I/O VL Output-Accelerator Source Impedance I/O VCC Output-Accelerator Source Impedance I/O VL Output-Accelerator Source Impedance I/O VCC Output-Accelerator Source Impedance VL = 1.7V VCC = 2.2V VL = 3.2V VCC = 3.6V 20 13 17 6 10 ns Ω Ω Ω Ω VTH_L_VCC VCC falling, VL = +3.3V 0.5 0.3 0.35 6 VTH_H_VCC VCC rising, VL = +3.3V VTH_VL VCC = VL = +3.3V SYMBOL VIHC VILC VOHL VOLL VOHC VOLC VIH-SHDN VIL-SHDN 80 0.8 0.6 0.75 10 I/O VL source current = 20µA, VI/O VCC > VCC - 0.4V I/O VL sink current = 1mA, VI/O VCC < 0.15V I/O VCC source current = 20µA, VI/O VL > VL - 0.2V I/O VCC sink current = 1mA, VI/O VL < 0.15V VL > 1.2 1.1 ≤ VL < 1.2 VL - 0.2 VL - 0.1 0.15 250 1.1 0.9 1.06 15.5 0.67 x VCC 0.4 0.67 x VL 0.4 CONDITIONS MIN VCC 0.4 0.15 TYP MAX UNITS V V V V V V V V Ω V V V kΩ MAX13046E/MAX13047E _______________________________________________________________________________________ 3 Single- and Dual-Bidirectional Low-Level Translator MAX13046E/MAX13047E TIMING CHARACTERISTICS FOR +1.2V ≤ VL ≤ MINIMUM OF EITHER +3.6V OR (VCC + 0.3V) (VCC ≤ ±5.5V, +1.2V ≤ VL ≤ minimum of either +3.6V or ((VCC + 0.3V)), RS = 50Ω, RL = 1MΩ, CL = 15pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are VCC = +3.3V, VL = +1.8V at TA = +25°C.) (Notes 2, 3, 5) PARAMETER I/O VCC Rise Time I/O VCC Fall Time I/O VL Rise Time I/O VL Fall Time SYMBOL tRVCC tFVCC tRVL tFVL tPD-VL-VCC Propagation Delay tPD-VCC-VL Channel-to-Channel Skew Maximum Data Rate tSKEW Driving I/O VCC Each translator equally loaded Push-pull driving Open-drain driving CONDITIONS Push-pull driving, Figure 1a Open-drain driving, Figure 1c Push-pull driving, Figure 1a Open-drain driving, Figure 1c Push-pull driving, Figure 1b Open-drain driving, Figure 1d Push-pull driving, Figure 1 Open-drain driving, Figure 1d Driving I/O VL Push-pull driving Open-drain driving Push-pull driving Open-drain driving Push-pull driving Open-drain driving 8 500 MIN TYP 7 170 6 20 8 180 3 30 5 210 4 190 MAX 25 400 37 50 30 400 56 60 30 1000 30 1000 20 50 ns Mbps kbps ns UNITS ns ns ns ns TIMING CHARACTERISTICS FOR +1.1V ≤ VL ≤ +1.2V (VCC ≤ ±5.5V, +1.1V ≤ VL ≤ +1.2V, RS = 50Ω, RL = 1MΩ, CL = 15pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are VCC = +3.3V, VL = +1.8V at TA = +25°C.) (Notes 2, 3, 5) PARAMETER I/O VCC Rise Time I/O VCC Fall Time I/O VL Rise Time I/O VL Fall Time SYMBOL tRVCC tFVCC tRVL tFVL tPD-VL-VCC Propagation Delay tPD-VCC-VL Channel-to-Channel Skew Maximum Data Rate tSKEW Driving I/O VCC Each translator equally loaded Push-pull driving Open-drain driving CONDITIONS Push-pull driving, Figure 1a Open-drain driving, Figure 1c Push-pull driving, Figure 1a Open-drain driving, Figure 1c Push-pull driving, Figure 1b Open-drain driving, Figure 1d Push-pull driving, Figure 1 Open-drain driving, Figure 1d Driving I/O VL Push-pull driving Open-drain driving Push-pull driving Open-drain driving Push-pull driving Open-drain driving 1.2 500 MIN TYP 7 170 6 20 8 180 3 30 5 210 4 190 MAX 200 400 37 50 30 400 30 60 200 1000 200 1000 20 50 ns Mbps kbps ns UNITS ns ns ns ns 4 _______________________________________________________________________________________ Single- and Dual-Bidirectional Low-Level Translator TIMING CHARACTERISTICS FOR +1.8V ≤ VL ≤ VCC ≤ +3.3V (+1.8V ≤ VL ≤ VCC ≤ +3.3V, RS = 50Ω, RL = 1MΩ, CL = 15pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are VCC = +3.3V, VL = +1.8V at TA = +25°C.) (Notes 2, 3, 5) PARAMETER I/O VCC Rise Time I/O VCC Fall Time I/O VL Rise Time I/O VL Fall Time Propagation Delay Channel-to-Channel Skew Maximum Data Rate SYMBOL tRVCC tFVCC tRVL tFVL tPD-VL-VCC tPD-VCC-VL tSKEW CONDITIONS Push-pull driving, Figure 1a Push-pull driving, Figure 1a Push-pull driving, Figure 1b Push-pull driving, Figure 1b Push-pull driving, driving I/O VL Push-pull driving, driving I/O VCC Push-pull driving, each translator equally loaded Push-pull driving 16 MIN TYP MAX 15 15 15 15 15 15 10 UNITS ns ns ns ns ns ns Mbps MAX13046E/MAX13047E Note 2: All units are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design and not production tested. Note 3: For normal operation, ensure VL < (VCC + 0.3V). During power-up, VL > (VCC + 0.3V) does not damage the device. Note 4: ESD protection is guaranteed by design. To ensure maximum ESD protection, place a 1µF ceramic capacitor between VCC and GND. See Typical Application Circuits. Note 5: Timing is measured using 10% of input to 90% of output. _______________________________________________________________________________________ 5 Single- and Dual-Bidirectional Low-Level Translator MAX13046E/MAX13047E Typical Operating Characteristics (VCC = +3.3V, VL = +1.8V, RL = 1MΩ, CL = 15pF, push-pull driving data rate = 8Mbps, TA = +25°C, unless otherwise noted.) VL DYNAMIC SUPPLY CURRENT vs. VCC SUPPLY VOLTAGE (PUSH-PULL DRIVING ONE I/O VL) MAX13046E/7E toc01 VL DYNAMIC SUPPLY CURRENT vs. VCC SUPPLY VOLTAGE (PUSH-PULL DRIVING ONE I/O VCC) MAX13046E/7E toc02 VCC DYNAMIC SUPPLY CURRENT vs. VL SUPPLY VOLTAGE (PUSH-PULL DRIVING ONE I/O VL) MAX13046E/7E toc03 350 300 VL SUPPLY CURRENT (μA) 250 200 150 100 50 0 1.65 2.20 2.75 3.30 3.85 4.40 4.95 VCC SUPPLY VOLTAGE (V) 250 600 500 VCC SUPPLY CURRENT (μA) 400 300 200 100 0 200 VL SUPPLY CURRENT (μA) 150 100 50 0 5.50 1.65 2.20 2.75 3.30 3.85 4.40 4.95 VCC SUPPLY VOLTAGE (V) 5.50 1.2 1.9 2.6 VL SUPPLY VOLTAGE (V) 3.3 VCC DYNAMIC SUPPLY CURRENT vs. VL SUPPLY VOLTAGE (PUSH-PULL DRIVING ONE I/O VCC) MAX13046E/7E toc04 VL DYNAMIC SUPPLY CURRENT vs. TEMPERATURE (PUSH-PULL DRIVING ONE I/O VL) MAX13046E/7E toc05 VL DYNAMIC SUPPLY CURRENT vs. TEMPERATURE (PUSH-PULL DRIVING ONE I/O VCC) 300 VL SUPPLY CURRENT (μA) 250 200 150 100 50 0 MAX13046E/7E toc06 80 70 VCC SUPPLY CURRENT (μA) 60 50 40 30 20 10 0 1.2 1.9 2.6 VL SUPPLY VOLTAGE (V) 200 180 160 VL SUPPLY CURRENT (μA) 140 120 100 80 60 40 20 0 350 3.3 -40 -15 10 35 TEMPERATURE (°C) 60 85 -40 -15 10 35 TEMPERATURE (°C) 60 85 VL DYNAMIC SUPPLY CURRENT vs. CAPACITIVE LOAD (PUSH-PULL DRIVING ONE I/O VL) MAX13046E/7E toc07 VCC DYNAMIC SUPPLY CURRENT vs. CAPACITIVE LOAD (PUSH-PULL DRIVING ONE I/O VL) MAX13046E/7E toc08 RISE/FALL TIME vs. CAPACITIVE LOAD (PUSH-PULL DRIVING ONE I/O VL) MAX13046E/7E toc09 120 100 VL SUPPLY CURRENT (μA) 80 60 40 20 0 0 10 20 30 40 CAPACITIVE LOAD (pF) 1200 1000 VCC SUPPLY CURRENT (μA) 800 600 400 200 0 25 20 RISE/FALL TIME (ns) tFVCC 15 10 tRVCC 5 0 0 10 20 30 40 CAPACITIVE LOAD (pF) 50 0 10 20 30 40 CAPACITIVE LOAD (pF) 50 50 6 _______________________________________________________________________________________ Single- and Dual-Bidirectional Low-Level Translator Typical Operating Characteristics (continued) (VCC = +3.3V, VL = +1.8V, RL = 1MΩ, CL = 15pF, push-pull driving data rate = 8Mbps, TA = +25°C, unless otherwise noted.) PROPAGATION DELAY vs. CAPACITIVE LOAD (PUSH-PULL DRIVING ONE I/O VL) MAX13046E/7E toc10 MAX13046E/MAX13047E RISE/FALL TIME vs. CAPACITIVE LOAD (PUSH-PULL DRIVING ONE I/O VCC) MAX13046E/7E toc11 PROPAGATION DELAY vs. CAPACITIVE LOAD (PUSH-PULL DRIVING ONE I/O VCC) MAX13046E/7E toc12 7 6 PROPAGATION DELAY (ns) 5 4 3 2 1 0 0 10 20 30 40 CAPACITIVE LOAD (pF) 12 10 RISE/FALL TIME (ns) 8 6 4 2 0 tRVL 3.5 3.0 PROPAGATION DELAY (ns) 2.5 2.0 1.5 1.0 0.5 0 tFVL 50 0 10 20 30 40 CAPACITIVE LOAD (pF) 50 0 10 20 30 40 CAPACITIVE LOAD (pF) 50 RAIL-TO-RAIL DRIVING (DRIVING ONE I/O VL) EXISTING SHUTDOWN MODE MAX13046E/7E toc14 MAX13046E/7E toc13 1V/div 1V/div I/O VL I/O VCC I/O VL 2V/div 1V/div I/O VCC 25ns/div SHDN 250ns/div 1V/div _______________________________________________________________________________________ 7 Single- and Dual-Bidirectional Low-Level Translator MAX13046E/MAX13047E MAX13046E Pin Description MAX13046E µDFN 1 2 3 4 5 6 NAME VL GND I/O VL I/O VCC SHDN VCC VL Input Supply Voltage. Bypass VL with a 0.1µF ceramic capacitor located as close as possible to the input. Ground Input/Output. Referenced to VL. Input/Output. Referenced to VCC. Shutdown Input. Drive SHDN high to enable the device. Drive SHDN low to put the device in shutdown mode. VCC Input Supply Voltage. Bypass VCC with a 1µF ceramic capacitor located as close as possible to the input for full ESD protection. If full ESD protection is not required, bypass VCC with a 0.1µF ceramic capacitor. FUNCTION MAX13047E Pin Description MAX13047E UTQFN 1 2 3, 7 4 5 6 8 9 10 — NAME I/O VL2 VL N.C. SHDN I/O VCC2 VCC I/O VCC1 GND I/O VL1 EP Input/Output 2. Referenced to VL. VL Input Supply Voltage. Bypass VL with a 0.1µF ceramic capacitor located as close as possible to the input. Not Connected. Internally not connected. Enable Input. Drive SHDN high to enable the device. Drive SHDN low to put the device in shutdown mode. Input/Output 2. Referenced to VCC. VCC Input Supply Voltage. Bypass VCC with a 1µF ceramic capacitor located as close as possible to the input for full ESD protection. If full ESD protection is not required, bypass VCC with a 0.1µF ceramic capacitor. Input/Output 1. Referenced to VCC. Ground Input/Output 1. Referenced to VL. Exposed Pad. Connect EP to GND. FUNCTION Detailed Description The MAX13046E/MAX13047E ±15kV ESD-protected bidirectional level translators provide level shifting for data transfer in a multivoltage system. The MAX13046E is a single-channel translator and the MAX13047E is a dual-channel translator. Externally applied voltages, VCC and VL, set the logic level on either side of the device. The MAX13046E/MAX13047E utilize a transmission-gate-based design to allow data translation in either direction (VL ↔ VCC) on any single data line. The MAX13046E/MAX13047E accept VL from +1.1V to the minimum of either +3.6V or (VCC + 0.3V) and VCC from +1.65V to +5.5V, making these devices ideal for data transfer between low-voltage ASICs/PLDs and higher voltage systems. The MAX13046E/MAX13047E feature a shutdown mode that reduces supply current to less than 1µA thermal short-circuit protection, and ±15kV ESD protection on the VCC side for enhanced protection in applications that route signals externally. The MAX13046E/MAX13047E operate at a guaranteed data rate of 8Mbps when pushpull driving is used. See the Functional Diagram. 8 _______________________________________________________________________________________ Single- and Dual-Bidirectional Low-Level Translator Functional Diagram VL VCC MAX13046E/MAX13047E PU1 ONE-SHOT RISE-TIME ACCELERATOR ONE-SHOT RISE-TIME ACCELERATOR PU2 10kΩ GATE BIAS 10kΩ I/O VL N I/O VCC SHDN GND Level Translation For proper operation, ensure that +1.65V ≤ V CC ≤ +5.5V and +1.1V ≤ VL ≤ the minimum of either +3.6V or (VCC + 0.3V). During power-up sequencing, VL ≥ (VCC + 0.3V) does not damage the device. The speed of the rise time accelerator circuitry limits the maximum data rate for the MAX13046E/MAX13047E to 16Mbps. Rise-Time Accelerators The MAX13046E/MAX13047E have an internal rise-time accelerator, allowing operation up to 16Mbps. The risetime accelerators are present on both sides of the device and act to speed up the rise time of the input and output of the device, regardless of the direction of the data. The triggering mechanism for these accelerators is both level and edge sensitive. To guarantee operation of the rise time accelerators the maximum parasitic capacitance should be less than 200pF on the I/O lines. state, and decreases the supply current to less than 1µA. The high-impedance I/O lines in shutdown mode allow for use in a multidrop network. The MAX13046E/ MAX13047E have a diode from each I/O to the corresponding supply rail and GND. Therefore, when in shutdown mode, do not allow the voltage at I/O VL to exceed (VL + 0.3V), or the voltage at I/O VCC to exceed (VCC + 0.3V). Operation with One Supply Disconnected Certain applications require sections of circuitry to be disconnected to save power. When VL is connected and VCC is disconnected or connected to ground, the device enters shutdown mode. In this mode, I/O VL can still be driven without damage to the device; however, data does not translate from I/O VL to I/O VCC. If VCC falls more than VTH_L_VCC below VL, the device disconnects the pullup resistors at I/O VL and I/O VCC. To achieve the lowest possible supply current from VL when VCC is disconnected, it is recommended that the voltage at the VCC supply input be approximately equal to GND. When VCC is connected and VL is less than VTH_VL, the device enters shutdown mode. In this mode, I/O VCC can still be driven without damage to the device; however, data does not translate from I/O VCC to I/O VL. Shutdown Mode Drive SHDN low to place the MAX13046E/MAX13047E in shutdown mode and drive SHDN high for normal operation. Activating the shutdown mode disconnects the internal 10kΩ pullup resistors on the I/O VCC and I/O VL lines. This forces the I/O lines to a high-impedance _______________________________________________________________________________________ 9 Single- and Dual-Bidirectional Low-Level Translator MAX13046E/MAX13047E VL VCC VL VCC VL SHDN VCC SHDN VL VCC RS 50Ω I/O VL MAX13046E/ MAX13047E DATA I/O VCC GND RL CL CL RL DATA I/O VL MAX13046E/ MAX13047E I/O VCC GND RS 50Ω I/O VL (tRISE, tFALL < 10ns) tPD-VL-VCC tPD-VL-VCC I/O VCC (tRISE, tFALL < 10ns) tPD-VCC-VL tPD-VCC-VL I/O VCC tRVCC tFVCC I/O VL tRVL tFVL Figure 1a. Rail-to-Rail Driving I/O VL Figure 1b. Rail-to-Rail Driving I/O VCC When VCC is disconnected or connected to ground, I/O VCC must not be driven more than VCC + 0.3V. When VL is disconnected or connected to ground, I/O VL must not be driven more than VL + 0.3V. operation, shutdown mode, and powered down. The I/O VCC lines of the MAX13046E/MAX13047E are characterized for protection to the following limit: • ±15kV using the Human Body Model Short-Circuit Protection Thermal-overload detection protects the MAX13046E/ MAX13047E from short-circuit fault conditions. In the event of a short-circuit fault, when the junction temperature (TJ) exceeds +150°C, the device enters shutdown mode. When the device has cooled to below +140°C, normal operation resumes. ESD Test Conditions ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results. Human Body Model Figure 2a shows the Human Body Model, and Figure 2b shows the current waveform it generates when discharged into a low-impedance state. This model consists of a 100pF capacitor charged to the ESD voltage of interest that is then discharged into the test device through a 1.5kΩ resistor. ±15kV ESD Protection ESD protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The ESD structures withstand electrostatic discharge in all states: normal 10 ______________________________________________________________________________________ Single- and Dual-Bidirectional Low-Level Translator MAX13046E/MAX13047E VL VCC VL VCC VL SHDN VCC SHDN VL VCC MAX13046E/ MAX13047E DATA I/O VL GND I/O VCC RL CL CL RL DATA I/O VL MAX13046E/ MAX13047E I/O VCC GND I/O VL tPD-VL-VCC tPD-VL-VCC I/O VCC tPD-VCC-VL tPD-VCC-VL I/O VCC tRVCC tFVCC I/O VL tRVL tFVL Figure 1c. Open-Drain Driving I/O VL Figure 1d. Open-Drain Driving I/O VCC IEC 61000-4-2 The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The MAX13046E/MAX13047E help to design equipment that meets Level 4 of IEC 61000-4-2 without the need for additional ESD-protection components. The major difference between tests done using the Human Body Model and IEC 61000-4-2 is higher peak current in IEC 61000-4-2 because series resistance is lower in the IEC 61000-4-2 model. Hence, the ESD withstand voltage measured to IEC 61000-4-2 can be lower than that measured using the Human Body Model. Figure 3a shows the IEC 61000-4-2 model, and Figure 3b shows the current waveform for the ±8kV, IEC 61000-4-2, Level 4, ESD contact-discharge test. The AirGap test involves approaching the device with a charged probe. The contact-discharge method connects the probe to the device before the probe is energized. Applications Information Power-Supply Decoupling To reduce ripple and the chance of transmitting incorrect data, bypass VL and VCC to ground with a 0.1µF ceramic capacitor. To ensure full ±15kV ESD protection, bypass VCC to ground with a 1µF ceramic capacitor. Place all capacitors as close as possible to the power-supply inputs. I2C Level Translation The MAX13046E/MAX13047E level shifts the data present on the I/O lines between +1.1V and +5.5V, making them ideal for level translation between a low-voltage ASIC and an I2C device. A typical application involves interfacing a low-voltage microprocessor to a +3V or +5V D/A converter, such as the MAX517. 1-Wire Interface Translation The MAX13046E/MAX13047E are ideal for level translation between a low-voltage ASIC and 1-Wire device. A ______________________________________________________________________________________ 11 Single- and Dual-Bidirectional Low-Level Translator MAX13046E/MAX13047E RC 1MΩ CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 1500Ω DISCHARGE RESISTANCE DEVICE UNDER TEST HIGHVOLTAGE DC SOURCE RC 50MΩ TO 100MΩ CHARGE-CURRENTLIMIT RESISTOR RD 330Ω DISCHARGE RESISTANCE DEVICE UNDER TEST Cs 100pF STORAGE CAPACITOR Cs 150pF STORAGE CAPACITOR Figure 2a. Human Body ESD Test Model Figure 3a. IEC 61000-4-2 ESD Test Model IP 100% 90% AMPERES 36.8% 10% 0 0 tRL TIME Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) IPEAK I 100% 90% 10% tr = 0.7ns TO 1ns 30ns 60ns t tDL CURRENT WAVEFORM Figure 2b. Human Body Current Waveform Figure 3b. IEC 61000-4-2 ESD Generator Current Waveform typical application involves interfacing a low-voltage microprocessor to an external memory, such as the DS2502. The maximum data rate depends on the 1-Wire device. For the DS2502, the maximum data rate is 16.3kbps. A 5kΩ pullup resistor is recommended when interfacing with the DS2502. PCB Layout The MAX13046E/MAX13047E require good PCB layout for proper operation and optimal rise/fall time performance. Ensure proper high-frequency PCB layout even when operating at low data rates. Push-Pull vs. Open-Drain Driving The MAX13046E/MAX13047E can be driven in a pushpull or open-drain configurations. For open-drain configuration, internal 10kΩ resistors pull up I/O VL and I/O VCC to their respective power supplies. See the Timing Characteristics t able for maximum data rates when using open-drain drivers. Driving High-Capacitive Load Capacitive loading on the I/O lines impacts the rise time (and fall time) of the MAX13046E/MAX13047E when driving the signal lines. The actual rise time is a function of the load capacitance, parasitic capacitance, the supply voltage, and the drive impedance of the MAX13046E/ MAX13047E. Operating the MAX13046E/MAX13047E at a low data rate does NOT increase capacitive load driving capability. 12 ______________________________________________________________________________________ Single- and Dual-Bidirectional Low-Level Translator Typical Application Circuits +1.8V 0.1μF 1μF +3.3V MAX13046E/MAX13047E VL SHDN +1.8V SYSTEM VCC +3.3V SYSTEM MAX13046E DATA I/O VL I/O VCC DATA +1.8V 0.1μF 1μF +3.3V VL SHDN +1.8V SYSTEM VCC +3.3V SYSTEM MAX13047E I/O VL1 DATA I/O VL2 I/O VCC1 I/O VCC2 DATA ______________________________________________________________________________________ 13 Single- and Dual-Bidirectional Low-Level Translator MAX13046E/MAX13047E Chip Information PROCESS: BiCMOS Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 6 µDFN 10 UTQFN PACKAGE CODE L611-1 V101A1CN-1 DOCUMENT NO. 21-0147 21-0028 14 ______________________________________________________________________________________ Single- and Dual-Bidirectional Low-Level Translator Revision History REVISION NUMBER 0 1 REVISION DATE 5/08 8/08 Initial release Removing future product asterisks from MAX13047, changing Electrical Characteristics Table, packaging changes, changing ESD information DESCRIPTION PAGES CHANGED ⎯ 1–4, 6, 10 MAX13046E/MAX13047E Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 © 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.