19-0474; Rev 1; 7/09
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators
General Description
The MAX9972 four-channel, ultra-low-power, pin-electronics IC includes, for each channel, a three-level pin driver, a window comparator, a passive load, and force-and-sense Kelvin-switched parametric measurement unit (PMU) connections. The driver features a -2.2V to +5.2V voltage range, includes high-impedance and active-termination (3rd-level drive) modes, and is highly linear even at low voltage swings. The window comparator features 500MHz equivalent input bandwidth and programmable output voltage levels. The passive load provides pullup and pulldown voltages to the device-under-test (DUT). Two grade versions are available, A grade and B grade. The A-grade version provides tight gain and offset matching for the driver and comparator, allowing reference levels to be shared across multiple channels. It also provides tighter tolerance of the load resistance values. The B-grade version is for system designs that incorporate independent reference levels for each channel. Low-leakage, high-impedance, and terminate controls are operational configurations that are programmed through a 3-wire, low-voltage, CMOS-compatible serial interface. High-speed PMU switching is realized through dedicated digital control inputs. This device is available in an 80-pin, 12mm x 12mm body, 1.0mm pitch TQFP with an exposed 6mm x 6mm die pad on the bottom of the package for efficient heat removal. The MAX9972 is specified to operate over the 0°C to +70°C commercial temperature range, and features a die temperature monitor output.
Features
♦ Small Footprint—Four Channels in 0.3in2 ♦ Low-Power Dissipation: 325mW/Channel (typ) ♦ High Speed: 300Mbps at 3VP-P ♦ -2.2V to +5.2V Operating Range ♦ Active Termination (3rd-Level Drive) ♦ Integrated PMU Switches ♦ Passive Load ♦ Low-Leak Mode: 20nA (max) ♦ Low Gain and Offset Error ♦ Lead(Pb)-Free Package Available
MAX9972
Applications
NAND Flash Testers DRAM Probe Testers Low-Cost Mixed-Signal/System-on-Chip (SoC) Testers Active Burn-In Systems Structural Testers
Pin Configuration appears at end of data sheet.
Ordering Information and Selector Guide
PART MAX9972ACCS MAX9972BCCS ACCURACY GRADE A B PIN-PACKAGE 80 TQFP-EP* 80 TQFP-EP* HEAT EXTRACTION Bottom Bottom
Note: All devices are specified over the 0°C to +70°C operating temperature range. All versions available in both leaded and lead(Pb)-free packaging. Specify lead(Pb)-free by adding the “+” symbol at the end of the part number when ordering. *EP = Exposed pad.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators MAX9972
ABSOLUTE MAXIMUM RATINGS
VDD to GND ...........................................................-0.3V to +9.4V VSS to GND..........................................................-6.25V to +0.3V VDD to VSS ........................................................................+15.7V VL to GND.................................................................-0.3V to +5V VDD to GND ...........................................................-0.3V to +9.4V DHV_, DTV_, DLV_, DATA_, RCV_, LDV_, DUT_ to GND ...........................................................VSS to VDD CHV_, CLV_, CMPH_, CMPL_, COMPHI, COMPLO to GND.....................................................VSS to VDD FORCE_, SENSE_, PMU_ to GND ..............................VSS to VDD LD, DIN, SCLK, CS to GND......................................-0.3V to +5V DUT_, CMPH_, CMPL_ Short-Circuit Duration ...........Continuous DHV_, DLV_, DTV_ to Each Other ..............................VSS to VDD CHV_, CLV_ to DUT_ ..................................................VSS to VDD DOUT to GND...........................................................-0.3V to +5V TEMP Short-Circuit Duration ......................................Continuous FORCE_ Path Switch Current..............................................50mA SENSE_ Path Switch Current .............................................1.5mA Continuous Power Dissipation (TA = +70°C) 80-Pin TQFP-EP (derate 35.7mW/°C above +70°C) ....2857mW Storage Temperature Range .............................-65°C to +150°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +8V, VSS = -5V, VL = +3V, VCOMPHI = +1V, VCOMPLO = 0V, VLDV_ = 0V, LOAD EN LOW = LOAD EN HIGH = 0, TJ = +75°C. All temperature coefficients measured at TJ = +50°C to +100°C, unless otherwise noted.) (Note 1)
PARAMETER DC CHARACTERISTICS Voltage Range Gain Gain Temperature Coefficient Offset Offset Temperature Coefficient Power-Supply Rejection Ratio Maximum DC Drive Current DC Output Resistance DC Output Resistance Variation PSRR IDUT_ IDUT_ = ± 10mA (Note 2) IDUT_ = -40mA to +40mA DHV to DLV and DTV: VDLV_ = VDTV_ = +1.5V, VDHV_ = -2.2V, +5.2V DC Crosstalk DLV to DHV and DTV: VDHV_ = VDTV_ = +1.5V, VDLV_ = -2.2V, +5.2V DTV to DHV and DLV: VDHV_ = VDLV_ = +1.5V, VDTV_ = -2.2V, +5.2V L inearity Error 0 t o 3V (Note 3) Full range (Note 4) VDD, VSS independently varied over full range ±40 48.5 49.5 VDHV_ = 2V, VDLV_ = 0V, VDTV_ = 1V A grade B grade ±250 18 ±90 50.5 2.5 5 Measured at 0 and 3V A grade B grade -2.2 0.995 0.95 50 ±10 ±100 1 +5.2 1.005 1.05 V V/V ppm/°C mV μV/°C mV/V mA SYMBOL CONDITIONS MIN TYP MAX UNITS
DRIVER (all specifications apply when DUT_ = DHV_, DUT_ = DTV_, or DUT_ = DLV_)
5
mV
5 ±5 ±15 mV mV
2
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Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +8V, VSS = -5V, VL = +3V, VCOMPHI = +1V, VCOMPLO = 0V, VLDV_ = 0V, LOAD EN LOW = LOAD EN HIGH = 0, TJ = +75°C. All temperature coefficients measured at TJ = +50°C to +100°C, unless otherwise noted.) (Note 1)
PARAMETER AC CHARACTERISTICS (Note 5) D ynamic Output Current Drive-Mode Overshoot, Undershoot, and Preshoot Term-Mode Spike High-Impedance-Mode Spike Prop Delay, Data to Output Prop-Delay Temperature Coefficient Prop-Delay Match, tLH v s. tHL Prop-Delay Skew, Drivers Within Package 3VP-P, 40MHz, PW = 4ns to 21ns 1VP-P, 40MHz, PW = 2.5ns to 23.5ns (Note 1) 200mV to 4VP-P swing (Note 6) VDHV_ = VDTV_ = 1V, VDLV_ = 0V VDLV_ = VDTV_ = 0V, VDHV_ = 1V VDLV_ = -1V, VDHV_ = 0V VDLV_ = 0V, VDHV_ = 1V 40 5% +10 25 25 25 25 2 10 30 150 20 ps 90 80 1.8 1.6 25 0.7 0.7 1.5 2.0 2.6 3.4 ±5 1.8 2.4 3.3 ns % 2.5 ns ps ns ns mV mA mV mV mV ns ps/°C ps ps SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX9972
Prop-Delay Change vs. Pulse Width
Relative to 12.5ns pulse
Prop-Delay Change vs. Common-Mode Voltage Prop Delay, Data to High Impedance Prop Delay, Data to Term Minimum Voltage Swing
1VP-P, VDLV_ = 0 t o 3V, relative to delay at VDLV_ = 1V VDHV_ = +1.5V, VDLV_ = -1.5V, both directions VDHV_ = +1.5V, VDLV_ = -1.5V, VDTV_ = 0V, both directions (Note 7) VDHV_ = 0.2V, VDLV_ = 0V, 20% to 80% VDHV_ = 1V, VDLV_ = 0V, 20% to 80% VDHV_ = 3V, VDLV_ = 0V, 10% to 90%
R ise/Fall Time
VDHV_ = 4V, VDLV_ = 0V, RL = 5 00 , 1 0% to 90% VDHV_ = 5V, VDLV_ = 0V, RL = 5 00 , 1 0% to 90%
R ise/Fall-Time Matching Minimum Pulse Width (Note 8)
VDHV_ = 1V to 5V 200mV, VDHV_ = 0.2V, VDLV_ = 0V 1V, VDHV_ = 1V, VDLV_ = 0V 3V, VDHV_ = 3V, VDLV_ = 0V
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3
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators MAX9972
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +8V, VSS = -5V, VL = +3V, VCOMPHI = +1V, VCOMPLO = 0V, VLDV_ = 0V, LOAD EN LOW = LOAD EN HIGH = 0, TJ = +75°C. All temperature coefficients measured at TJ = +50°C to +100°C, unless otherwise noted.) (Note 1)
PARAMETER COMPARATOR (Note 9) DC CHARACTERISTICS (driver in high-impedance mode) Input Voltage Range D ifferential Input Voltage H ysteresis Input Offset Voltage Input Offset Temperature Coefficient Common-Mode Rejection Ratio L inearity Error (Note 10) Power-Supply Rejection Ratio AC CHARACTERISTICS (Note 11) Equivalent Input Bandwidth Propagation Delay Prop-Delay Temperature Coefficient Prop-Delay Match, tLH t o tHL Prop-Delay Skew, Comparators Within Package Prop-Delay Dispersions vs. Common-Mode Voltage (Note 14) Prop-Delay Dispersions vs. Overdrive Prop-Delay Dispersions vs. Pulse Width Prop-Delay Dispersions vs. Slew Rate Same edges (LH and HL) 0 t o 4.9V -1.9V to +4.9V VCHV_ = VCLV_ = 0.1V to 0.9V, VDUT_ = 1VP-P, tR = tF = 5 00ps, 10% to 90% relative to timing at 50% point 2ns to 23ns pulse width, relative to 12.5ns pulse width 0.5V/ns to 2V/ns Terminated (Note 12) High impedance (Note 13) 500 300 3.9 4 120 200 20 ps 30 MHz ns ps/°C ps ps PSRR CMRR VDUT_ = 0 a nd 3V VDUT_ = 1.5V VDUT_ = -2.2V, +5.2V VDUT_ = 1 .5V, supplies independently varied over full range 60 ±5 ±10 5 VDUT_ - VCHV_, VDUT_ - VCLV_ VCHV_ = VCLV_ = 1.5V VDUT_ = 1 .5V (VCOMPHI = 0.8V, VCOMPLO = 0.2V) A grade B grade 25 -2.2 -7.4 8 ±10 ±100 +5.2 +7.4 V V mV mV μV/°C dB mV mV/V SYMBOL CONDITIONS MIN TYP MAX UNITS
220
ps
±60 50
ps ps
4
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Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +8V, VSS = -5V, VL = +3V, VCOMPHI = +1V, VCOMPLO = 0V, VLDV_ = 0V, LOAD EN LOW = LOAD EN HIGH = 0, TJ = +75°C. All temperature coefficients measured at TJ = +50°C to +100°C, unless otherwise noted.) (Note 1)
PARAMETER LOGIC OUTPUTS Reference Voltages COMPHI and COMPLO Output High Voltage Offset Output Low Voltage Offset Output Resistance Current Limit Rise/Fall Time PASSIVE LOAD DC CHARACTERISTICS (RDUT_ ≥ 10MΩ) LDV_ Voltage Range Gain Gain Temperature Coefficient Offset Offset Temperature Coefficient Power-Supply Rejection Ratio Output Resistance Tolerance—High Value Output Resistance Tolerance—Low Value Switch Resistance Variation Maximum Output Current (Note 16) Linearity Error, Full Range AC CHARACTERISTICS Settling Time, LDV_ to Output Output Transient Response VLDV_ = -2V to +5V step, RDUT_ = 100kΩ (Note 17) VLDV_ = +1.5V, VDUT_ = -2V to +5V square wave at 1MHz, RDUT_ = 50Ω 0.5 20 µs ns PSRR IDUT_ = ±0.2mA, VLDV_ = 1.5V IDUT_ = ±0.1mA, VLDV_ = 1.5V Relative to 1.5V VLDV_ = -2V, VDUT_ = +5V VLDV_ = +5V, VDUT_ = -2V Measured at -2.2V, +1.5V, and +5.2V (Note 16) A grade B grade A grade B grade 0 to 3V Full range 7.125 4.200 1.90 1.05 0.02 10 7.5 6.0 2.0 1.5 ±10 ±30 ±4 ±4 ±25 7.875 7.875 2.10 2.10 -2.2 0.99 0.02 ±100 +5.2 1.01 V V/V %/°C mV mV/°C mV/V kΩ kΩ % mA mV 20% to 80%, VCHV_ = 1VP-P, load = T-line, 50Ω, > 1ns (Note 15) IOUT = 0mA, relative to COMPHI at VCOMPHI = 1V IOUT = 0mA, relative to COMPLO at VCOMPLO = 0V ICHV_ = ICLV_ = ±10mA 40 50 25 0.7 0 +3.6 ±50 ±50 60 V mV mV Ω mA ns SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX9972
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5
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators MAX9972
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +8V, VSS = -5V, VL = +3V, VCOMPHI = +1V, VCOMPLO = 0V, VLDV_ = 0V, LOAD EN LOW = LOAD EN HIGH = 0, TJ = +75°C. All temperature coefficients measured at TJ = +50°C to +100°C, unless otherwise noted.) (Note 1)
PARAMETER Voltage Range Force Switch Resistance VFORCE_ = 1.5V, IPMU_ = ±10mA VPMU_ = 6.2V, VFORCE_ set to make IFORCE_ = 30mA VPMU_ = -3.2V, VFORCE_ set to make IFORCE_ = -30mA Force Switch Resistance Variation (Note 18) Sense Switch Resistance Sense Switch Resistance Variation PMU_ Capacitance FORCE_ Capacitance SENSE_ Capacitance FORCE_ External Capacitance SENSE_ External Capacitance FORCE_ and SENSE_ Switching Speed PMU_ Leakage TOTAL FUNCTION DUT_ Load switches open, VDUT_ = +5.2V, VCLV_ = VCHV_ = -2.2V, VDUT_ = -2.2V, VCLV_ = VCHV_ = +5.2V, full range Full range (Note 19) Term mode High-impedance mode (Note 20) (Note 20) ±1 10 2 5 1 12 Allowable external capacitance Allowable external capacitance Connect or disconnect FORCE EN_ = SENSE EN_ = 0, VFORCE_ = VSENSE_ = -2.2V to +5.2V Relative to 1.3V, full range Force-and-sense switches open 0 to 3V Full range 700 25 mA 25 ±10 ±30 1000 ±30 5 5 0.2 2 1 10 ±0.5 ±5 1300 % Ω % pF pF pF nF nF µs nA SYMBOL CONDITIONS MIN -2.2 TYP MAX +5.2 40 UNITS V Ω
PMU SWITCHES (FORCE_, SENSE_, PMU_)
Force Switch Compliance
Leakage, High-Impedance Mode
2
µA
Leakage, Low-Leakage Mode Low-Leakage Recovery Time Combined Capacitance Load Resistance Load Capacitance
±20
nA µs pF GΩ nF
6
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Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +8V, VSS = -5V, VL = +3V, VCOMPHI = +1V, VCOMPLO = 0V, VLDV_ = 0V, LOAD EN LOW = LOAD EN HIGH = 0, TJ = +75°C. All temperature coefficients measured at TJ = +50°C to +100°C, unless otherwise noted.) (Note 1)
PARAMETER Input Bias Current Input Bias Current Temperature Coefficient Settling to Output 0.1% of full-scale step VL / 2 + 0.2 -0.3 DIGITAL INPUTS (DATA_, RCV_, LD, DIN, SCLK, CS) Input High Voltage Input Low Voltage Input Bias Current SERIAL DATA OUTPUT (DOUT) Output High Voltage Output Low Voltage Output Rise and Fall Time SCLK to DOUT Delay SERIAL-INTERFACE TIMING (Note 22) SCLK Frequency SCLK Pulse-Width High SCLK Pulse-Width Low CS Low to SCLK High Setup SCLK High to CS Low Hold CS High to SCLK High Setup SCLK High to CS High Hold DIN to SCLK High Setup DIN to SCLK High Hold CS High to LOAD Low Setup LD Low Hold Time LD High to Any Activity VL Rising to CS Low TEMP SENSOR Nominal Voltage Temperature Coefficient Output Resistance TJ = +27°C 3.00 +10 500 V mV/°C Ω Power-on delay tCH tCL tCSS0 tCSH0 tCSS1 tCSH1 tDS tDH tCLL tLDW 10 10 3.5 0 3.5 15 3.5 1 6 5 0 2 50 MHz ns ns ns ns ns ns ns ns ns ns ns µs IOH = -1mA IOL = 1mA CL = 10pF CL = 10pF tDH VL - 0.4 0 1.1 tSCLK tDS - 2ns VL +0.4 V V ns ns (Note 21) (Note 21) +3.6 VL / 2 0.2 100 V V µA ±200 10 SYMBOL CONDITIONS MIN TYP MAX ±100 UNITS µA nA/°C µs
MAX9972
VOLTAGE REFERENCE INPUTS (DHV_, DTV_, DLV_, DATA_, RCV_, CHV_, CLV_, LDV_, COMPHI, COMPLO)
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7
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators MAX9972
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +8V, VSS = -5V, VL = +3V, VCOMPHI = +1V, VCOMPLO = 0V, VLDV_ = 0V, LOAD EN LOW = LOAD EN HIGH = 0, TJ = +75°C. All temperature coefficients measured at TJ = +50°C to +100°C, unless otherwise noted.) (Note 1)
PARAMETER POWER SUPPLIES Positive Supply Voltage Negative Supply Voltage Logic Supply Voltage Positive Supply Current Negative Supply Current Logic Supply Current Static Power Dissipation Operating Power Dissipation VDD VSS VL IDD ISS IL fOUT = 0MHz fOUT = 100Mbps (Note 24) fOUT = 0MHz fOUT = 0MHz (Note 23) (Note 23) 7.6 -5.25 2.3 97 99 0.15 1.3 1.4 8 -5 8.4 -4.75 3.6 120 120 0.30 1.5 V V V mA mA mA W W SYMBOL CONDITIONS MIN TYP MAX UNITS
Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9: Note 10: Note 11:
Note 12: Note 13: Note 14: Note 15:
Note 16: Note 17: Note 18: Note 19: Note 20: Note 21: Note 22: Note 23: Note 24:
All minimum and maximum specifications are 100% production tested except driver dynamic output current, which is guaranteed by design. All specifications are with DUT_ and PMU_ electrically isolated, unless otherwise noted. Nominal target value is 49.5Ω. Contact factory for alternate trim selections within the 45Ω to 55Ω range. Measured at 1.5V, relative to a straight line through 0 and 3V. Measured at end points, relative to a straight line through 0 and 3V. DUT_ is terminated with 50Ω to ground, VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V, unless otherwise specified. DATA_ and RCV_ logic levels are VHIGH = 2V, VLOW = 1V. Undershoot is any reflection of the signal back towards its starting voltage after it has reached 90% of its swing. Preshoot is any aberration in the signal before it reaches 10% of its swing. At the minimum voltage swing, undershoot is less than 20%. DHV_ and DLV_ references are adjusted to result in the specified swing. At this pulse width, the output reaches at least 90% of its nominal (DC) amplitude. The pulse width is measured at DATA_. With the exception of offset and gain/CMRR tests, reference input values are calibrated for offset and gain. Relative to a straight line through 0 and 3V. Unless otherwise noted, all propagation delays are measured at 40MHz, VDUT_ = 0 to 1V, VCHV_ = VCLV_ = +0.5V, tR = tF = 500ps, ZS = 50Ω, driver in term mode with VDTV_ = +0.5V. Comparator outputs are terminated with 50Ω to GND. Measured from VDUT_ crossing calibrated CHV_/CLV_ threshold to midpoint of nominal comparator output swing. Terminated is defined as driver in drive mode and set to zero volts. High impedance is defined as driver in high-impedance mode. VDUT_ = 200mVP-P. Propagation delay is compared to a reference time at 1.5V. The comparator meets all its timing specifications with the specified output conditions when the output current is less than 15mA, VCOMPHI > VCOMPLO, and VCOMPHI - VCOMPLO ≤ 1V. Higher voltage swings are valid but AC performance may degrade. LOAD EN LOW = LOAD EN HIGH = 1. Waveform settles to within 5% of final value into load 100kΩ. IPMU_ = ±2mA at VFORCE_ = -2.2V, +1.5V, and +5.2V. Percent variation relative to value calculated at VFORCE_ = +1.5V. Time to return to the specified maximum leakage after a 3V, 4V/ns step at DUT_. Load at end of 2ns transmission line; for stability only, AC performance may be degraded. The driver meets all of its timing specifications over the specified digital input voltage range. Timing characteristics with VLOGIC = 3V. Specifications are simulated and characterized over the full power-supply range. Production tests are performed with power supplies at typical values. All channels driven at 3VP-P, load = 2ns, 50Ω transmission line terminated with 3pF.
8
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Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
MAX9972
DRIVER SMALLSIGNAL RESPONSE
MAX9971 toc01
DRIVER LARGESIGNAL RESPONSE
MAX9971 toc02
DRIVER LARGESIGNAL RESPONSE INTO 500Ω
VDLV_ = 0 RL = 500Ω CL = 0.1pF VDUT_ = 500mV/div
MAX9971 toc03
VDLV_ = 0 RL = 50Ω
VDHV_ = 500mV
VDLV_ = 0 RL = 50Ω VDHV_ = 3V VDUT_ = 300mV/div
VDHV_ = 3V
VDUT_ = 50mV/div
VDHV_ = 200mV VDHV_ = 100mV
VDHV_ = 1V
VDHV_ = 1V
0 t = 2.0ns/div
0 t = 2.0ns/div
0 4.5ns CABLE t = 2.0ns/div
DRIVER 1VP-P, 150Mbps SIGNAL RESPONSE
MAX9971 toc04
DRIVER 1VP-P, 400Mbps SIGNAL RESPONSE
MAX9971 toc05
DRIVER 3VP-P, 100Mbps SIGNAL RESPONSE
MAX9971 toc06
VDUT_ = 100mV/div
0 t = 2ns/div
VDLV_ = 0 VDHV_ = 1V RL = 50Ω
VDUT_ = 100mV/div
VDUT_ = 250mV/div VDLV_ = 0 VDHV_ = 1V RL = 50Ω t = 1ns/div 0 VDLV_ = 0 VDHV_ = 3V RL = 50Ω t = 2.5ns/div
0
DRIVER 3VP-P, 250Mbps SIGNAL RESPONSE
MAX9971 toc07
DRIVER DC CURRENT-LIMIT AND OVERVOLTAGE RESPONSE
MAX9971 toc08
DRIVER 3V TRAILING-EDGE TIMING ERROR vs. PULSE WIDTH
POSITIVE PULSE 0 TIMING ERROR (ps) -50 -100 -150 -200 -250 -300 NEGATIVE PULSE NORMALIZED AT PW = 12.5ns, PERIOD = 25ns, VDHV_ = 3V, VDLV_ = 0 3 4 5 6 7 8 9 10 11 12 13
MAX9971 toc09
100 80 60 40 IDUT_ (mA) 20 0 -20 -40 VDHV_ = 1.5V
50
VDUT_ = 250mV/div
0
VDLV_ = 0 VDHV_ = 3V RL = 50Ω t = 1.25ns/div
-60 -80 -100 -6 -3 0 3 6 9 VDUT_ (V)
PULSE WIDTH (ns)
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9
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators MAX9972
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
DRIVER TIME DELAY vs. COMMON-MODE VOLTAGE
MAX9971 toc10
DRIVE-TO-TERM TRANSITION
MAX9971 toc11
DRIVE-TO-HIGH-IMPEDANCE TRANSITION
MAX9971 toc12
80 60 40 20 0 -20 -40 NORMALIZED AT VCM = 1.5V -60 0 0.5 1.0 1.5 2.0 2.5 COMMON-MODE VOLTAGE (V) FALLING EDGE RISING EDGE
DHV_ TO DTV_ VDUT_ = 200mV/div
DHV_ TO HIGH IMPEDANCE VDUT_ = 200mV/div DLV_ TO DTV_ 0 3.0 t = 2ns/div RL = 50Ω t = 2ns/div
TIME DELAY (ps)
0
DLV_ TO HIGH IMPEDANCE RL = 50Ω
DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE
MAX9971 toc13
DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE
2.0 1.5 LINEARITY ERROR (mV) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 DUT_ = DLV_ VDHV_ = 1.5V VDTV_ = 1.5V
MAX9971 toc14
DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE
2.0 1.5 LINEARITY ERROR (mV) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 DUT_ = DHV_ VDLV_ = 1.5V VDHV_ = 1.5V
MAX9971 toc15 MAX9971 toc18
2.5 2.0 1.5 LINEARITY ERROR (mV) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 DUT_ = DHV_ VDLV_ = 1.5V VDTV_ = 1.5V
2.5
2.5
5.5
-2.5 -1.5 -0.5
0.5
1.5
2.5
3.5
4.5
5.5
-2.5 -1.5 -0.5
0.5
1.5
2.5
3.5
4.5
5.5
VDUT_ (V)
VDUT_ (V)
VDUT_ (V)
CROSSTALK, DUT_ DRIVEN BY DHV_ WITH DLV_ VARIED
MAX9971 toc16
CROSSTALK, DUT_ DRIVEN BY DHV_ WITH DTV_ VARIED
80 60 VDUT_ ERROR (μV) 40 20 0 -20 -40 -60 VDHV_ = 3V VDLV_ = 0
MAX9971 toc17
CROSSTALK, DUT_ DRIVEN BY DLV_ WITH DHV_ VARIED
100 80 60 VDUT_ ERROR (μV) 40 20 0 -20 -40 -60 VDTV_ = 1.5V VDLV_ = 0
100 80 60 VDUT_ ERROR (μV) 40 20 0 -20 -40 -60 -80 -100 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 NORMALIZED AT VDLV_ = 0 VDHV_ = 3V VDTV_ = 1.5V
100
-80 -100 5.5
NORMALIZED AT VDTV_ = 1.5V -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5
-80 -100
NORMALIZED AT VDHV_ = 3V -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5
VDLV_ (V)
VDTV_ (V)
VDHV_ (V)
10
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Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX9972
CROSSTALK, DUT_ DRIVEN BY DLV_ WITH DTV_ VARIED
MAX9971 toc19
CROSSTALK, DUT_ DRIVEN BY DTV_ WITH DHV_ VARIED
MAX9971 toc20
CROSSTALK, DUT_ DRIVEN BY DTV_ WITH DLV_ VARIED
80 60 VDUT_ ERROR (μV) 40 20 0 -20 -40 -60 VDHV_ = 3V VDTV_ = 1.5V
MAX9971 toc21
100 80 60 VDUT_ ERROR (μV) 40 20 0 -20 -40 -60 -80 -100 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 NORMALIZED AT VDTV_ = 1.5V VDHV_ = 3V VDLV_ = 0
100 80 60 VDUT_ ERROR (μV) 40 20 0 -20 -40 -60 -80 -100 NORMALIZED AT VDHV_ = 3V -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 VDTV_ = +1.5V VDLV_ = -1.5V
100
-80 -100 5.5
NORMALIZED AT VDLV_ = 0 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5
5.5
VDTV_ (V)
VDHV_ (V)
VDLV_ (V)
DRIVER GAIN vs. TEMPERATURE
MAX9971 toc22
DRIVER OFFSET vs. TEMPERATURE
MAX9971 toc23
COMPARATOR RESPONSE TO 0 TO 3V SIGNAL
VCHV_ = VCLV_ = 1.5V, RL = 50Ω VCOMPHI = 1V, VCOMPLO = 0 VCMP_ _ = 100mV/div
MAX9971 toc24
1.0008 1.0006 1.0004 GAIN (V/V) 1.0002 1.0000 0.9998 0.9996 50 NORMALIZED AT TJ = +85°C 60 70 80 90
5 4 3 OFFSET (mV) 2 1 0 -1 -2 -3 NORMALIZED AT TJ = +85°C 50 60 70 80 90
100
100
t = 2.0ns/div
TEMPERATURE (°C)
TEMPERATURE (°C)
COMPARATOR OFFSET vs. COMMON-MODE VOLTAGE
MAX9971 toc25
COMPARATOR WAVEFORM TRACKING
MAX9971 toc26
COMPARATOR TIMING VARIATION vs. PULSE WIDTH
30 TRAILING-EDGE ERROR (ps) 10 -10 -30 -50 -70 -90 -110
MAX9971 toc27
0.20 0.15 0.10 0.05 OFFSET (mV) 0 -0.05 -0.10 -0.15 -0.20 -0.25 -0.30 -0.35 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 NORMALIZED AT VCM = 1.5V OTHER COMPARATOR REFERENCE = -2.5V
400 300 TIMING VARIATION (ps) 200 100 0 -100 -200 -300 -400 0 NORMALIZED AT 50% REFERENCE VDUT_ = 0 TO 1V PULSE 20 40 60 80 VDUT_ FALLING VDUT_ RISING
50
-130 -150 100 1
NORMALIZED AT PW = 10ns 2 3 4 5 6 7 8 9 10
5.5
COMMON-MODE VOLTAGE (V)
REFERENCE LEVEL (%)
PULSE WIDTH (ns)
______________________________________________________________________________________
11
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators MAX9972
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
COMPARATOR TIMING VARIATION vs. INPUT SLEW RATE
MAX9971 toc28
COMPARATOR RESPONSE vs. HIGH SLEW-RATE OVERDRIVE
INPUT SLEW RATE = 6V/ns TERM MODE, VDTV_ = 0 TO 1V VCOMP_ _ = 200mV/div
MAX9971 toc29
COMPARATOR OFFSET vs. TEMPERATURE
100 50 0 OFFSET (μV) -50 -100 -150 -200 -250 -300 -350 -400 50 60
MAX9971 toc30
60 50 40 30 20 10 0 -10 -20 -30 -40 -50 -60 NORMALIZED AT SR = 2V/ns VCOMPHI = 1V, VCOMPLO = 0, RL = 50Ω 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
150
TIMING VARIATION (ps)
VDUT_ FALLING
VDUT_ RISING
VCOMPHI = 1V, VCOMPLO = 0, RCOMP_ = 50Ω 5.0 t = 2ns/div
NORMALIZED AT TJ = +75°C 70 80 90 100
SLEW RATE (V/ns)
TEMPERATURE (°C)
DRIVE 1V TO LOW-LEAKAGE TRANSITION
MAX9971 toc31
LOW LEAKAGE TO DRIVE 1V TRANSITION
MAX9971 toc32
HIGH-IMPEDANCE LEAKAGE AT DUT_ vs. DUT_ VOLTAGE
0.1 0 -0.1 IDUT_ (μA) -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8
MAX9971 toc33
0.2
10μA
IDUT_ = 2μA/div
IDUT_ = 2μA/div
10μA
0μA
0μA
t = 2.5μs/div
t = 100ns/div
-2.5 -1.5 -0.5 0.5
1.5
2.5
3.5
4.5
5.5
VDUT_ (V)
LOW-LEAKAGE CURRENT vs. DUT_VOLTAGE
MAX9971 toc34
ICC SUPPLY CURRENT vs.TEMPERATURE
107 106 ICC (mA) 105 104 103 102 101 100 -109 -110 50 60 70 80 90 100 50 IEE (mA) -106 -107 -108
MAX9971 toc35
IEE SUPPLY CURRENT vs.TEMPERATURE
MAX9971 toc36
1.8 1.7 1.6 1.5 IDUT_ (nA) 1.4 1.3 1.2 1.1 1.0 0.9 0.8 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5
108
-104 -105
5.5
60
70
80
90
100
VDUT_ (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
12
______________________________________________________________________________________
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX9972
PASSIVE LOAD OFFSET vs. TEMPERATURE
MAX9971 toc37
PASSIVE LOAD HIGH RESISTOR vs. VOLTAGE
MAX9971 toc38
PASSIVE LOAD LOW RESISTOR vs. VOLTAGE
DUT_ = DLV_ 2150 2100 RESISTANCE (Ω) VDLV_ = -2.2V
MAX9971 toc39
160 140 120 OFFSET (μV) 100 80 60 40 20 0 -20 50 60 70 80 90
8000 7900 7800 RESISTANCE (Ω) 7700 7600 7500 7400 7300 7200 7100 7000 VDLV_ = +1.5V DUT_ = DLV_ VDLV_ = -2.2V VDLV_ = +5.2V
2200
2050 2000 1950 1900 1850 1800 VDLV_ = +1.5V
VDLV_ = +5.2V
100
-2.5 -1.5 -0.5
0.5
1.5
2.5
3.5
4.5
5.5
-2.5 -1.5 -0.5
0.5
1.5
2.5
3.5
4.5
5.5
TEMPERATURE (°C)
VOLTAGE (V)
VOLTAGE (V)
PMU_ FORCE_ SWITCH RESISTANCE vs. FORCE_ CURRENT
MAX9971 toc40
PMU_ FORCE_ SWITCH RESISTANCE vs. FORCE_ CURRENT
MAX9971 toc41
PMU_ FORCE_ SWITCH RESISTANCE vs. FORCE_ CURRENT
42 SWITCH RESISTANCE (Ω) 39 36 33 30 27 24 21 18 15 VPMU_ = -2.2V
MAX9971 toc42
45 42 SWITCH RESISTANCE (Ω) 39 36 33 30 27 24 21 18 15 -50 -40 -30 -20 -10 0 VPMU_ = 5.2V
45 42 SWITCH RESISTANCE (Ω) 39 36 33 30 27 24 21 18 15 VPMU_ = 1.5V
45
10 20 30 40 50
-50 -40 -30 -20 -10 0
10 20 30 40 50
-50 -40 -30 -20 -10 0
10 20 30 40 50
FORCE_ CURRENT (mA)
FORCE_ CURRENT (mA)
FORCE_ CURRENT (mA)
______________________________________________________________________________________
13
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators MAX9972
Pin Description
PIN 1 2 3, 8, 13, 18, 51 4 5 6 7 9 10 11 12 14 15 16 17 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 NAME D ATA1 RCV1 GND CMPH1 CMPL1 D ATA2 RCV2 CMPH2 CMPL2 CMPL3 CMPH3 RCV3 DATA3 CMPL4 CMPH4 RCV4 DATA4 DHV4 DLV4 DTV4 CHV4 CLV4 DHV3 DLV3 DTV3 CHV3 CLV3 DGND DOUT LD DIN SCLK CS SENSE4 FORCE4 FUNCTION Channel 1 Multiplexer Control Input. Selects driver 1 input from DHV1 or DLV1 in drive mode. See Table 1 and Figure 2. Channel 1 Multiplexer Control Input. Sets channel 1 mode to drive or receive. See Table 1 and Figure 2. Analog Ground Channel 1 High-Side Comparator Output Channel 1 Low-Side Comparator Output Channel 2 Multiplexer Control Input. Selects driver 2 input from DHV2 or DLV2 in drive mode. See Table 1 and Figure 2. Channel 2 Multiplexer Control Input. Sets channel 2 mode to drive or receive. See Table 1 and Figure 2. Channel 2 High-Side Comparator Output Channel 2 Low-Side Comparator Output Channel 3 Low-Side Comparator Output Channel 3 High-Side Comparator Output Channel 3 Multiplexer Control Input. Sets channel 3 mode to drive or receive. See Table 1 and Figure 2. Channel 3 Multiplexer Control Input. Selects driver 3 input from DHV3 or DLV3 in drive mode. See Table 1 and Figure 2. Channel 4 Low-Side Comparator Output Channel 4 High-Side Comparator Output Channel 4 Multiplexer Control Input. Sets channel 4 mode to drive or receive. See Table 1 and Figure 2. Channel 4 Multiplexer Control Input. Selects driver 4 input from DHV4 or DLV4 in drive mode. See Table 1 and Figure 2. Channel 4 Driver High Voltage Input Channel 4 Driver Low Voltage Input Channel 4 Driver Termination Voltage Input Channel 4 Threshold Voltage Input for High-Side Comparator Channel 4 Threshold Voltage Input for Low-Side Comparator Channel 3 Driver High Voltage Input Channel 3 Driver Low Voltage Input Channel 3 Driver Termination Voltage Input Channel 3 Threshold Voltage Input for High-Side Comparator Channel 3 Threshold Voltage Input for Low-Side Comparator Digital Ground Connection Serial-Interface Data Output Load Input. Latches data from the serial input register to the control register on rising edge. Transparent when low. Serial-Interface Data Input Serial Clock Chip Select Channel 4 PMU Sense Connection Channel 4 PMU Force Connection
14
______________________________________________________________________________________
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators
Pin Description (continued)
PIN 39 40 41 42, 47, 52, 56, 60 43 44 45, 50, 53, 57 46 48 49 54 55 58 59 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 — NAME SENSE3 FORCE3 TEMP VDD DUT4 PMU4 VSS VL DUT3 PMU3 PMU2 DUT2 PMU1 DUT1 FORCE2 SENSE2 FORCE1 SENSE1 COMPLO COMPHI LDV4 LDV3 LDV2 LDV1 CLV2 CHV2 DTV2 DLV2 DHV2 CLV1 CHV1 DTV1 DLV1 DHV1 EP Channel 3 PMU Sense Connection Channel 3 PMU Force Connection Temperature Sensor Output Positive Power-Supply Input Channel 4 Device-Under-Test Connection. Driver, comparator, and load I/O node for channel 4. Channel 4 Parametric Measurement Connection. PMU switch I/O node for channel 4. Negative Power-Supply Input Logic Power-Supply Input Channel 3 Device-Under-Test Connection. Driver, comparator, and load I/O node for channel 3. Channel 3 Parametric Measurement Connection. PMU switch I/O node for channel 3. Channel 2 Parametric Measurement Connection. PMU switch I/O node for channel 2. Channel 2 Device-Under-Test Connection. Driver, comparator, and load I/O node for channel 2. Channel 1 Parametric Measurement Connection. PMU switch I/O node for channel 1. Channel 1 Device-Under-Test Connection. Driver, comparator, and load I/O node for channel 1. Channel 2 PMU Force Connection Channel 2 PMU Sense Connection Channel 1 PMU Force Connection Channel 1 PMU Sense Connection Comparator Output-Low Voltage Reference Input Comparator Output-High Voltage Reference Input Channel 4 Load Voltage Input Channel 3 Load Voltage Input Channel 2 Load Voltage Input Channel 1 Load Voltage Input Channel 2 Threshold Voltage Input for Low-Side Comparator Channel 2 Threshold Voltage Input for High-Side Comparator Channel 2 Driver Termination Voltage Input Channel 2 Driver Low Voltage Input Channel 2 Driver High Voltage Input Channel 1 Threshold Voltage Input for Low-Side Comparator Channel 1 Threshold Voltage Input for High-Side Comparator Channel 1 Driver Termination Voltage Input Channel 1 Driver Low Voltage Input Channel 1 Driver High Voltage Input Exposed Pad. Leave unconnected or connect to VSS. FUNCTION
MAX9972
______________________________________________________________________________________
15
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators MAX9972
ONE OF FOUR IDENTICAL CHANNELS SHOWN DHV_ 50Ω DTV_ MULTIPLEXER BUFFER 0 LLEAK HIGH IMPEDANCE DATA_ RCV_ HIGH-IMPEDANCE LOGIC TERM CHV_ DUT_
MAX9972
DLV_
CMPH_
CMPL_ SEE TABLE 3 CLV_ 7.5kΩ 2.0kΩ LOAD EN HIGH LOAD EN LOW 0
LDV_
0
30Ω FORCE_ 1kΩ SENSE_
FORCE EN
0
PMU_
SENSE EN COMPHI COMPLO CS SCLK DIN LD DOUT SERIAL INTERFACE COMMON TO ALL FOUR CHANNELS
0
TEMP VDD VL VSS GND DGND
TERM LLEAK SENSE EN FORCE EN LOAD EN LOW LOAD EN HIGH
Figure 1. Block Diagram
16
______________________________________________________________________________________
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators
Detailed Description
The MAX9972 is a four-channel, pin-electronics ICs for automated test equipment that includes, for each channel, a three-level pin driver, a window comparator, a passive load, and a Kelvin instrument connection (Figure 1). All functions feature a -2.2V to +5.2V operating range and the drivers include both high-impedance and active-termination (3rd-level drive) modes. The comparators feature programmable output voltages, allowing optimization for different CMOS interface standards. The loads have selectable output resistance for optimizing DUT current loading. The Kelvin paths allow accurate connection of an instrument with ±25mA source/sink capability. Additionally, the MAX9972 offers a low-leakage mode that reduces DUT_ leakage current to less than 20nA. The MAX9972 is available in two grades. The A-grade devices provide tighter tolerances for driver gains and offsets, comparator offsets, and load resistor values. This allows reference levels to be shared across multiple channels in cost-sensitive systems. The B-grade devices are intended for system designs that incorporate independent reference levels for each channel. Each of the four channels feature single-ended CMOScompatible inputs, DATA_ and RCV_, for control of the driver signal path (Figure 2). The MAX9972 modal operation is programmed through a 3-wire, low-voltage CMOS-compatible serial interface. control these modes. In high-impedance mode, the bias current at DUT_ is less than 2µA over the -2.2V to +5.2V range, while the node maintains its ability to track high-speed signals. In low-leakage mode, the bias current at DUT_ is further reduced to less than 20nA, and signal tracking slows. The nominal driver output resistance is 50Ω. Custom resistance values from 45Ω to 51Ω are possible; consult factory for further information.
MAX9972
Table 1. Driver Channel Control Signals
EXTERNAL CONNECTIONS RCV_ DATA_ 0 0 1 1 X 0 1 X X X INTERNAL CONTROL BITS TERM X X 0 1 X LLEAK 0 0 0 0 1 DUT_ = DLV_ DUT_ = DHV_ High Impedance DUT_ = DTV_ Low Leak Drive Drive Receive Receive Low Leakage DRIVER OUTPUT DRIVER MODE
DLV_ DHV_ DTV_ DATA_ RCV_
0 0 BUFFER 1 1 LLEAK COMPARATORS AND LOAD 0 50Ω DUT_
Output Driver
The driver input is a high-speed multiplexer that selects one of three voltage inputs; DHV_, DLV_, or DTV_. This switching is controlled by high-speed inputs DATA_ and RCV_, and mode-control bit TERM (Table 1). DATA_ and RCV_ are single-ended inputs with threshold levels equal to VL / 2. Each channel’s threshold levels are independently generated to minimize crosstalk. DUT_ can be toggled at high speed between the buffer output and high-impedance mode, or it can be placed into low-leakage mode (Figure 2, Table 1). High-speed input RCV_ and mode-control bits TERM and LLEAK
TERM_
HIGH IMPEDANCE
MAX9972
Figure 2. Multiplexer and Driver Channel
______________________________________________________________________________________
17
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators MAX9972
Comparators
The MAX9972 provides two independent high-speed comparators for each channel. Each comparator has one input connected internally to DUT_ and the other input connected to either CHV_ or CLV_ (see Figure 1). Comparator outputs are a logical result of the input conditions, as indicated in Table 2. The comparator output voltages are easily interfaced to a wide variety of logic standards. Use buffered inputs COMPHI and COMPLO to set the high and low output voltages. For correct operation, COMPHI should be greater than or equal to COMPLO. The comparator 50Ω output impedance provides source termination (Figure 3).
Table 2. Comparator Logic
DUT_ > CHV_ 0 0 1 1 DUT_ > CLV_ 0 1 0 1 CMPH_ 0 0 1 1 CMPL_ 0 1 0 1
MAX9972
COMPHI
Passive Load
The MAX9972 channels each feature a passive load consisting of a buffered input voltage, LDV_, connected to DUT_ through two resistive paths (Figure 1). Each path connects to DUT_ individually by a switch controlled through the serial interface. Programming options include none (load disconnected), either, or both paths connected. The resistor values vary depending on the accuracy grade of the device, as shown in Table 3. The loads facilitate fast open/short testing in conjunction with the comparator, and pullup of open-drain DUT_ outputs.
CHV_
50Ω CMPH_
DUT_
Parametric Switches
Each of the four MAX9972 channels provides forceand-sense paths for connection of a PMU or other DC resource to the device-under-test (Figure 1). Each force-and-sense switch is independently controlled though the serial interface providing maximum application flexibility. PMU_ and DUT_ are provided on separate pins allowing designs that do not require the parametric switch feature to avoid the added capacitance of PMU_. It also allows PMU_ to connect to DUT_ either directly or with an impedance-matching network.
CLV_
50Ω CMPL_
COMPLO
Figure 3. Complementary 50Ω Comparator Outputs
Low-Leakage Mode, LLEAK
Asserting LLEAK through the serial port places the MAX9972 into a very-low-leakage state (see the Electrical Characteristics table). This mode is convenient for making IDDQ and PMU measurements without the need for an output disconnect relay. LLEAK control is independent for each channel. When DUT_ is driven with a high-speed signal while LLEAK is asserted, the leakage current momentarily increases beyond the limits specified for normal operation. The low-leakage recovery specification in the Electrical Characteristics table indicates device behavior under this condition.
Table 3. Passive Load Resistance Values
ACCURACY GRADE A B HIGH RESISTOR (k ) 7.5 6 LOW RESISTOR (k ) 2 1.5
Temperature Monitor
Each device supplies a single temperature output signal, TEMP, that asserts a nominal 3.43V output voltage at a +70°C (343K) die temperature. The output voltage increases proportionately with temperature at a rate of 10mV/°C. The temperature sensor output impedance is 500Ω, typical.
18
______________________________________________________________________________________
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators
Serial Interface and Device Control
A CMOS-compatible serial interface controls the MAX9972 modes (Figure 4). Control data flow into a 12bit shift register (LSB first) and are latched when CS is taken high. Data from the shift register are then loaded to the per-channel control latches as determined by bits D8–D11, and indicated in Figure 4 and Table 4. The latches contain the six mode bits for each channel of the device. The mode bits, in conjunction with external inputs DATA_ and RCV_, manage the features of each channel. Transfer data asynchronously from the input registers to the channel registers by forcing LD low. With LD always low, data transfer on the rising edge of CS.
MAX9972
I IG H DE NL OW FO RC EE N SE NS EE N LL EA K LO A
4 3 2 1 Q 0–5 11 6 D
US
US
DE NH
ED
ED
SCLK DIN CS LD ENABLE
11
10
9
8
7
6
LO A
5
MAX9972
QUAD F/F 0–5 8 D ENABLE LOAD Q 6 0–5 9 D ENABLE LOAD QUAD F/F Q 6 0–5 10 D ENABLE LOAD QUAD F/F QUAD F/F Q ENABLE LOAD 6
MODE BITS CHANNEL 1
MODE BITS CHANNEL 2
MODE BITS CHANNEL 3
TE RM
0 MODE BITS CHANNEL 4
4
3
2
1 CH
CH
CH
CH
UN
Figure 4. Serial Interface
Table 4. Control Register Bit Functions
BIT 0 1 2 3 4 5 6 7 8 9 10 11 NAME TERM LLEAK SENSE EN FORCE EN LOAD EN LOW LOAD EN HIGH — — CH1 CH2 CH3 CH4 FUNCTION Term Mode Control Assert Low-Leakage Mode Enable Sense Switch Enable Force Switch Enable Low Load Resistor Enable High Load Resistor Unused Unused Update Channel 1 Control Register Update Channel 2 Control Register Update Channel 3 Control Register Update Channel 4 Control Register BIT STATE 0 High Impedance Term Mode Disabled Disabled Disabled Disabled X X Disabled Disabled Disabled Disabled 1 Term Mode Low Leakage Enabled Enabled Enabled Enabled X X Enabled Enabled Enabled Enabled POWER-UP STATE 0 0 0 0 0 0 0 0 1 1 1 1
______________________________________________________________________________________
UN
19
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators MAX9972
MAX9972
tCH SCLK
tCSSO tCSHO
tCL tCSH1
tCSS1
CS
tDH
tDS
DIN
D0
D1
D2
D3
D4
D9
D10
D11 tCLL
LD *FIRST BIT SHIFTED IN DURING WORD WRITE. tLDW
Figure 5. Serial-Interface Timing
Heat Removal
With adequate airflow, no external heat sinking is needed under most operating conditions. If excess heat must be dissipated through the exposed pad, solder it to circuit board copper. The exposed pad must be either left unconnected, isolated, or connected to VSS.
Power Minimization
To minimize power consumption, activate only the needed channels. Each channel placed in low-leakage mode saves approximately 240mW.
Chip Information
PROCESS: BiCMOS
20
______________________________________________________________________________________
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators
Pin Configuration
COMPHI COMPLO FORCE1 SENSE1 SENSE2 DHV1 CHV1 DHV2 CHV2 DLV1 DTV1 CLV1 DLV2 DTV2 CLV2 LDV1 LDV2 LDV3 LDV4 FORCE2
MAX9972
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
DATA1 RCV1 GND CMPH1 CMPL1 DATA2 RCV2 GND CMPH2 CMPL2 CMPL3 CMPH3 GND RCV3 DATA3 CMPL4 CMPH4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
60 59 58 57 56 55 54 53 52
VDD DUT1 PMU1 VSS VDD DUT2 PMU2 VSS VDD GND VSS PMU3 DUT3 VDD VL VSS PMU4 DUT4 VDD TEMP
MAX9972
51 50 49 48 47 46 45 44 43 42 41
GND 18 RCV4 DATA4 19 20 21 DHV4 22 DLV4 23 DTV4 24 CHV4 25 CLV4 26 DHV3 27 DLV3 28 DTV3 29 CHV3 30 CLV3 31 DGND 32 DOUT 33 LD 34 DIN 35 SCLK 36 CS 37 SENSE4 38 FORCE4 39 SENSE3 40 FORCE3
TQFP
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 80 TQFP-EP PACKAGE CODE C80E-4 DOCUMENT NO. 21-0115
______________________________________________________________________________________
21
Quad, Ultra-Low-Power, 300Mbps ATE Drivers/Comparators MAX9972
Revision History
REVISION NUMBER 0 1 REVISION DATE 6/06 6/09 Initial release Changed driver offset max value in Electrical Characteristics t able and removed all references to MAX9971 DESCRIPTION PAGES CHANGED — 1–22
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
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