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MP3435GL-P

MP3435GL-P

  • 厂商:

    MPS(美国芯源)

  • 封装:

    PowerVFQFN20

  • 描述:

    升压 开关稳压器 IC 正 可调式 3V 1 输出 19A(开关) 20-PowerVFQFN

  • 数据手册
  • 价格&库存
MP3435GL-P 数据手册
MP3435 19A, 600kHz, 22V Output Range, Synchronous Boost Converter with Input Disconnect Function DESCRIPTION FEATURES The MP3435 is a 600kHz, fixed frequency, high-efficiency, highly integrated boost converter that operates across a wide input voltage (VIN) range, with optional input disconnect and an input average current limit function. The input disconnect feature provides additional protection by isolating the input from the output during an output short or shutdown. For battery-operated applications, this feature also helps prevent battery depletion. With a configurable input average current limit, the MP3435 supports a wide range of applications. • • • • 3V to 20V Wide Input Voltage (VIN) Range Up to 22V Output Voltage (VOUT) Integrated 10mΩ and 15mΩ MOSFET 19A Internal Switch Current Limit or External Configurable Input Current Limit Input Disconnect and Output Short-Circuit Protection (SCP) Configurable Under-Voltage Lockout (UVLO) and Hysteresis 5.5V) for automatic start-up. This pin can also configure VIN UVLO. Do not leave EN floating. Driver for the input disconnect MOSFET. If this pin is floating or connected to the input MOSFET gate, an external current-sense resistor is required. Connect GATE to ground GATE to use the internal current-sense circuit. Do not pull GATE down to ground through a resistor. Voltage sense. The voltage sensed between SENSE and IN determines the external SENSE current-sense signal. Connect SENSE to IN if the internal current-sense function is selected. Power switch. Connect SW to the internal low-side MOSFET (LS-FET)’s drain and the SW internal, synchronous HS-FET source. Connect the power inductor to SW. OUT TM BST PGND IN Power ground. Input supply. IN must be locally bypassed. 12 VDD Internal bias supply. Decouple the VDD pin with a 2.2μF ceramic capacitor, placed as close to VDD as possible. 13 COMP Compensation. Connect a capacitor and resistor in series to the analog ground for loop stability. 14 FB Feedback input. The reference voltage (VREF) is 1.225V. Connect a resistor divider from output to FB. 15 SS Soft-start control. Connect a soft-start capacitor (CSS) to SS. CSS is charged with a constant current. Leave SS disconnected if soft start is not used. 16 AGND MP3435 Rev. 1.0 11/30/2021 Analog ground. MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 3 MP3435 – 19A, 600kHz, 22V SYNCHRONOUS BOOST WITH INPUT DISCONNECT θJA θJC ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance SW............................. -0.3V (-3.5V for VIN Note: 9) After start-up, the VGATE ≥ VIN + 1.6V condition is registered if VGATE exceeds VIN + 1.6V one time. This means the MP3435 treats the condition as VGATE ≥ VIN + 1.6V, even if VGATE falls below VIN + 1.6V again in protection mode (unless the device turns off due to hiccup mode or if the power is cycled. MP3435 Rev. 1.0 11/30/2021 MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 16 MP3435 – 19A, 600kHz, 22V SYNCHRONOUS BOOST WITH INPUT DISCONNECT If IL quickly ramps and IL(MAX) exceeds 100(mV) / RSENSE (mΩ), the MP3435 immediately shuts down, entering SCP hiccup mode. This fast protection allows the MP3435 to survive all SCP events. When the MP3435 is shut down by EN or VIN, GATE is pulled down to GND, so input and output are well isolated by the input MOSFET. This is the VIN to VOUT disconnect function. Light-Load Operation To optimize efficiency at light loads, the MP3435 employs frequency foldback and pulse-skipping mechanisms. When the load becomes lighter, VCOMP decreases, causing the MP3435 to enter fold-back operation (the lighter the load, the lower the frequency). However, if the load becomes exceedingly low, the MP3435 enters pulse-skip mode (PSM). PSM operation is optimized so that only one switching pulse is launched in every burst cycle. Enable (EN) and Configurable UVLO EN enables and disables the MP3435. When a voltage exceeding VEN_H (about 1V) is applied, the MP3435 starts up some of the internal circuits (micro-power mode). If the EN voltage continues to rise above VEN_ON (about 1.33V), the MP3435 enables all functions and begins boost operation. Boost operation is disabled if the EN voltage is below VEN_ON. To shut down the MP3435 completely, a voltage below VEN_L MP3435 Rev. 1.0 11/30/2021 (about 0.4V) is required on EN. After shutdown, the MP3435 sinks a current below 1µA from the input power. The maximum recommended voltage on EN is 5.5V. If the EN control signal comes from a voltage above 5.5V, a resistor should be added between EN and the control source. An internal Zener diode on EN clamps the EN voltage to prevent runaway. Ensure the Zener-clamped current flowing into EN is below 0.3mA. EN configures the VIN UVLO threshold (see the Under-Voltage Lockout (UVLO) Hysteresis section on page 18 for additional details). Output Over-Voltage Protection (OVP) Except for controlling the COMP signal to regulate VOUT, the MP3435 also provides OVP. If the FB voltage exceeds 108% of VREF, boost switching stops. When the FB voltage drops below 104% of VREF, the device resumes switching automatically. Thermal Shutdown The device has an internal temperature monitor. If the die temperature exceeds 150°C, the converter shuts down. Once the temperature drops below 125°C, the converter turns on again. MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 17 MP3435 – 19A, 600kHz, 22V SYNCHRONOUS BOOST WITH INPUT DISCONNECT APPLICATION INFORMATION Selecting the Current Limit Resistor The MP3435 features an average current limit when the external sensing resistor is used. RSENSE is the resistor connected between IN and SENSE, and it sets the current limit (ICL). ICL can be calculated using Equation (1): ICL = VCL /RSENSE (1) Where VCL is typically 54mV, ICL is in A, and RSENSE is in mΩ. Considering the parasitic inductance on the sense resistor, a small package resistor (e.g., 0805 package) is recommended. Add several parallel resistors if the power rating is lower than requested. To reduce parasitic resistance and noise, a minimum 4mΩ current-sense resistor is recommended. Under-Voltage Lockout (UVLO) Hysteresis The MP3435 features a configurable UVLO hysteresis. During start-up, EN sinks a 4.5μA current from the upper resistor, RTOP (see Figure 2). VIN MP3435 RTOP 4.5μA Figure 2: Configurable VIN UVLO VIN must increase to overcome the current sink. The VIN start-up threshold (VIN-ON) can be estimated with Equation (2): VIN−ON = VEN−ON  (1 + RTOP ) + 4.5A  RTOP RBOT (2) Where VEN-ON is the EN turn-on threshold (typically 1.33V). Once the EN voltage reaches VEN-ON, the 4.5µA sink current turns off to create a reverse hysteresis for the VIN falling threshold (VIN-UVLOVIN-UVLO-HYS can be calculated with HYS). Equation (3): VIN−UVLO−HYS = 4.5A  RTOP MP3435 Rev. 1.0 11/30/2021 Setting the Output Voltage (VOUT) VOUT is fed back through two sense resistors placed in series. The FB reference voltage (VFB) is typically 1.225V. VOUT can be estimated with Equation (4): VOUT = VREF  (1 + R1 ) R2 (4) Where R1 is the top FB resistor, R2 is the bottom FB resistor, and VREF is the reference voltage (typically 1.225V). Choose the FB resistors in the 10kΩ range (or higher) for good efficiency. EN RBOT Selecting the Soft-Start Capacitor (CSS) The MP3435 includes a SS circuit that limits VCOMP during start-up to prevent excessive IIN. This prevents premature termination of the source voltage at start-up due to IIN overshoot. When power is applied to the MP3435 and EN asserts, a 7μA internal current source charges the external CSS. VSS clamps VCOMP (as well as IL(MAX)) until the output is close to regulation, or until VCOMP reaches 2V. For most applications, a 10nF CSS is sufficient. If the output capacitance is large or the front power supply cannot withstand the huge inrush current, use a largervalue capacitor. Selecting the Input Capacitor An input capacitor is required to supply the AC ripple current to the inductor while limiting noise at the input source. A low-ESR capacitor is required to minimize noise. Ceramic capacitors are recommended, but tantalum or low ESR electrolytic capacitors are sufficient. For loop stability, at least two 22µF capacitors are recommended for high-power applications,. The capacitor can be electrolytic, tantalum, or ceramic. Since the capacitor absorbs the input switching current, it requires an adequate ripple current rating. Use a capacitor with an RMS current rating exceeding the inductor ripple current (see the Selecting the Inductor section on page 19 to determine the inductor ripple current). (3) MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 18 MP3435 – 19A, 600kHz, 22V SYNCHRONOUS BOOST WITH INPUT DISCONNECT To ensure stable operation, place the input capacitor as close to the IC as possible. Alternately, a smaller, high-quality, 0.1μF ceramic capacitor can be placed close to the IC, while a larger-value capacitor is placed further away. If using this technique, an electrolytic or tantalum capacitor is recommended for the larger-value capacitor. All ceramic capacitors should be placed close to the MP3435’s input. Selecting the Output Capacitor The output capacitor is required to maintain the DC VOUT. Low-ESR capacitors are recommended to minimize the output voltage ripple (VRIPPLE). The characteristics of the output capacitor affect regulation and control system stability. Ceramic, tantalum, or low-ESR electrolytic capacitors are recommended. If using ceramic capacitors, the impedance of the capacitor at fSW is dominated by the capacitance, so VRIPPLE is independent of the ESR. VRIPPLE can be calculated with Equation (5): VRIPPLE V (1 − IN )  ILOAD VOUT = COUT  fSW (5) If using tantalum or low-ESR electrolytic capacitors, the ESR dominates the impedance at fSW, so VRIPPLE can be estimated using Equation (6): (1 − VRIPPLE = (6) Where RESR is the equivalent series resistance of the output capacitors. Choose an output capacitor to satisfy the VRIPPLE and load transient design requirements. Capacitance de-rating should be taken into consideration when designing high VOUT applications. Three 22μF ceramic capacitors are suitable for most applications. MP3435 Rev. 1.0 11/30/2021 Optimized Performance with MPS Inductor MPL-AY1050 Series The inductor is required to force a higher VOUT while being driven by VIN. A larger-value inductor has less ripple current, resulting in a lower IL(MAX). This reduces stress on the internal N-channel switch and enhances efficiency. However, a larger-value inductor has a larger physical size, a higher series resistance, and a lower saturation current. A good rule of thumb is to allow the peak-topeak ripple current to be approximately 30% to 40% of the maximum input current (IIN(MAX)). Make sure that IL(MAX) is below 75% of ICL at the operating duty cycle to prevent regulation loss due to ICL. Additionally, make sure that the inductor does not saturate under the worst-case load transient and start-up conditions. The required inductance value (L) can be estimated with Equation (7): L= Where VIN and VOUT are the DC input and output voltages, respectively, ILOAD is the load current, fSW is the fixed 600kHz switching frequency, and COUT is the output capacitor’s capacitance. VIN )  ILOAD VOUT I  RESR  VOUT + LOAD COUT  fSW VIN Selecting the Inductor VIN  (VOUT − VIN ) VOUT  fSW  I (7) IIN(MAX) can be calculated with Equation (8): IIN(MAX) = VOUT  ILOAD(MAX) (8) VIN   Where ILOAD(MAX) is the maximum load current, ΔI is the peak-to-peak inductor ripple current, ΔI = (30% to 40%) x IIN(MAX), and ŋ is the efficiency. MPS inductors are optimized and tested for use with our complete line of integrated circuits. Table 2 lists the MPS power inductor recommendations, where the part numbers can be selected based on the design requirements. Table 2: Power Inductor Selection Part Number Inductor Value Manufacturer MPL-AY 0.47µH to 10µH MPL-AY1050-1R5 1.5μH MPL-AY1050-1R0 1μH MPL-AY1050-2R2 2.2μH MPS MPS MPS MPS For more information, visit the Inductors page on the MPS website. MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 19 MP3435 – 19A, 600kHz, 22V SYNCHRONOUS BOOST WITH INPUT DISCONNECT R4 L1 MPL-AY1050-1R5 D1 BST Q1 GATE SENSE IN U1 MP3435 CBST L Figure 4: Gate Protection Diode for High Output Voltage Condition BST SW 1N5819 MP3435 OUT COUT SOUT Figure 3: BST Charger for Low Output Applications Selecting the Input MOSFET The MP3435 integrates one GATE pin to drive an external N-channel MOSFET, which disconnects the input power or limits IIN. The parameters to select the input disconnect MOSFET are described in greater detail below. 1. Drain-to-source voltage rating: This value should exceed VIN. 2. Drain-to-source current rating: IIN(MAX) is the maximum current through the input disconnect MOSFET. This occurs when VIN is at a minimum, and the load power is at a maximum. 3. Safe operating area (SOA): When conduction a current, the MOSFET should be able to support a current pulse that has a high level of VCL (mV) / RSENSE (mΩ) and lasts for CSS (nF) x 0.7V / 7µA + 0.5ms. 4. Gate-to-source voltage rating: The positive gate-to-source voltage rating should exceed 5.5V, while the negative voltage rating should exceed VOUT. If VOUT is too high and the MOSFET gate-to-source rating cannot meet the requirement, placing a diode between the source and disconnecting MOSFET gate is recommended (see Figure 4). MP3435 Rev. 1.0 11/30/2021 VIN SW BST Charger for Low Output Applications In some low output applications (e.g. a 5V output), the voltage across CBST may be insufficient. In this case, a Schottky diode should be connected from the output port to BST, conducting the current into CBST when SW goes low (see Figure 3). 5. Gate-to-source threshold voltage: The threshold should be below 1.5V. A 1V to 1.2V range across the overall temperature range is recommended. 6. On resistance (RDS_ON): This value should be small for high conversion efficiency. 7. Low leakage current: This value should be low for better isolation. In addition to the parameters listed above, consider the size and thermal temperature. Compensation The output of COMP compensates the regulation control system. The system uses two poles (FP1 and FP2) and one zero to stabilize the control loop. FP1 is set by the output capacitor (COUT) and the load resistance (RLOAD), and FP2 starts from the origin. The zero (FZ1) is set by the compensation capacitor (CCOMP) and the compensation resistor (RCOMP). FP1 and FZ1 can be calculated with Equation (9) and Equation (10), respectively: FP1 = FZ1 = 1 (Hz) 2    RLOAD  COUT 1 (Hz) 2    RCOMP  CCOMP (9) (10) The DC loop gain can be calculated using Equation (11): A VDC = A VEA  VIN  RLOAD  VFB  GCS x RCOMP (V / V) (11) 2 2  VOUT Where GCS is the compensation voltage to the IL gain, AVEA is the error amplifier voltage gain, and VFB is the feedback regulation threshold. MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 20 MP3435 – 19A, 600kHz, 22V SYNCHRONOUS BOOST WITH INPUT DISCONNECT There is also a right half-plane zero (FRHPZ) that exists in continuous conduction mode (CCM), where IL does not drop to zero in each cycle. FRHPZ can be calculated using Equation (12): FRHPZ = RLOAD V  ( IN )2 (Hz) 2    L VOUT (12) FRHPZ increases the gain and reduces the phase simultaneously, resulting in a smaller phase and gain margin. The worst-case condition occurs when VIN is at its minimum and the output power is at its maximum. See the Typical Application Circuits section on page 23 for compensation recommendations. MP3435 Rev. 1.0 11/30/2021 Design Example Table 3 shows a design example following the application guidelines for the specifications below. Table 3: Design Example VIN VOUT IOUT 3V to 10V 12V 0A to 2A The maximum output current is determined by the allowable temperature rise, ICL, and VIN. Figure 6 and Figure 7 on page 23 show the detailed application schematics. The typical performance and circuit waveforms are shown in the Typical Performance Characteristics section on page 9. For more device applications, refer to the related evaluation board datasheet. MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 21 MP3435 – 19A, 600kHz, 22V SYNCHRONOUS BOOST WITH INPUT DISCONNECT PCB Layout Guidelines Efficient PCB layout is critical for high-frequency switching power supplies. A poor layout can result in reduced performance, excessive EMI, resistive loss, and system instability. Use a 4layer PCB for high-power applications. For the best results, refer to Figure 5 and follow the guidelines below: Via 1. Keep the output loop (OUT, PGND, and C2) as small as possible. 2. Place a 0.1μF capacitor (C2D) close to the IC to reduce the PCB parasitical inductance. Top Layer 3. Connect SW to Mid-Layer 1 through two vias on the right side of SW to enhance the current capability (shown as the red connections in the Top Layer and Mid-Layer 1 on Figure 5). 4. Place the FB dividers (R1 and R2) as close as possible to FB. 5. Route the sensing traces (SENSE and IN) closely in parallel with a small, closed area. 6. Use a 0805 package for the sensing resistor (R4) to reduce parasitic inductance. Mid-Layer 1 7. Connect the VOUT feedback wire close to the output capacitor (C2C). 8. Connect the compensation components, CSS, and VDD capacitor to AGND with a short loop. 9. Keep the input loop (C1, R4, Q1, L1, SW, and PGND) as small as possible. 10. Make the BST path as short as possible. 11. Float the TM pin in application. Mid-Layer 2 12. Place enough GND vias close to the MP3435 for good thermal dissipation. 13. Place wide copper or vias associated with the input MOSFET’s drain pin for thermal dissipation. Bottom Layer Figure 5: Recommended PCB Layout MP3435 Rev. 1.0 11/30/2021 MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 22 MP3435 – 19A, 600kHz, 22V SYNCHRONOUS BOOST WITH INPUT DISCONNECT TYPICAL APPLICATION CIRCUITS C1C 22µF 9, 20 R7 NS 7 GND GND GND 8 GND 11 C3 GATE EN GND SENSE SOUT 5 MP3435 VDD GND FB 10, 17, 18, 19 GND GND AGND C5 SS C4 10nF R6 NS C2C 22µF COMP GND R2 34k 13 3.3nF R3 24.9k 16 GND GND GND R1 300k 14 EN PGND 15 C2B 22µF GND 2.2µF 6 C2A 22µF U1 IN 12 R5 100k C2D 0.1µF 1, 2 4 OUT C1B 22µF SW C1A VO UT = 12V at 2A L1 MPL-AY1050-1R5 SiR800 22µF C6 0.1µF 1.5µH Q1 R4 4mx18m BST VIN = 3V to 10V GND GND Figure 6: 12V Output Solution with Input Disconnect Function VIN = 3V to 10V C6 0.1µF 1.5µH VOUT = 12V at 2A L1 MPL-AY1050-1R5 9, 20 SW C1C 7 GND 8 GND 11 C3 GND SENSE SOUT IN VDD MP3435 GND 15 C4 10nF R6 NS GND GND FB C2B C2C 22µF 22µF C5 10, 17, 18, 19 COMP GND R2 34k 13 3.3nF 16 R3 24.9k GND GND GND R1 300k 14 EN SS C2A 22µF GND 2.2µF 6 5 U1 AGND EN R5 100k 12 GATE PGND GND C2D 0.1µF 1, 2 4 OUT C1B 22µF 22µF BST C1A 22µF GND GND Figure 7: 12V Output Solution without Input Disconnect Function MP3435 Rev. 1.0 11/30/2021 MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 23 MP3435 – 19A, 600kHz, 22V SYNCHRONOUS BOOST WITH INPUT DISCONNECT PACKAGE INFORMATION QFN-20 (3mmx4mm) PIN 1 ID 0.15x45°TYP. PIN 1 ID MARKING PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW SIDE VIEW 0.15x45° NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) LEAD COPLANARITY SHALL BE 0.08 MILLIMETERS MAX. 3) JEDEC REFERENCE IS MO-220. 4) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN MP3435 Rev. 1.0 11/30/2021 MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 24 MP3435 – 19A, 600kHz, 22V SYNCHRONOUS BOOST WITH INPUT DISCONNECT CARRIER INFORMATION Part Number MP3435GL-Z MP3435 Rev. 1.0 11/30/2021 Package Description QFN-20 (3mmx4mm) Quantity/ Reel Quantity/ Tube Quantity/ Tray Reel Diameter Carrier Tape Width Carrier Tape Pitch 5000 N/A N/A 13in 12mm 8mm MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 25 MP3435 – 19A, 600kHz, 22V SYNCHRONOUS BOOST WITH INPUT DISCONNECT REVISION HISTORY Revision # Revision Date 1.0 11/30/2021 Description Pages Updated Initial Release - Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP3435 Rev. 1.0 11/30/2021 MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 26
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