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MP8862GQ-0000-Z

MP8862GQ-0000-Z

  • 厂商:

    MPS(美国芯源)

  • 封装:

    VFQFN16

  • 描述:

    2.8V-22V VIN, 2A IOUT, 4-SWITCH,

  • 数据手册
  • 价格&库存
MP8862GQ-0000-Z 数据手册
MP8862 2.8V-22V VIN, 2A IOUT, 4-Switch, Integrated Buck-Boost Converter with I2C Interface DESCRIPTION FEATURES The MP8862 is a synchronous, 4-switch, integrated buck-boost converter capable of regulating the output voltage across a 2.8V to 22V wide input voltage range with high efficiency.  The MP8862 uses constant-on-time (COT) control in buck mode and constant-off-time control in boost mode, providing fast load transient response and smooth buck-boost mode transient. The MP8862 provides auto PFM/PWM or forced PWM switching modes, and programmable output constant current (CC) current limit, which support flexible design for different applications. Full protection features include over-current protection (OCP), over-voltage protection (OVP), under-voltage protection (UVP), programmable soft start, and thermal shutdown. The MP8862 is available in a 16-pin QFN (3mmx3mm) package.               Wide 2.8V to 22V Operating Input Voltage Range 1V (1) to 20.47V Output Voltage Range (5V Default) with 10mV Resolution through I2C 2A Output Current or 4A Input Current Four Low RDS(ON) Internal Buck Power MOSFETs Adjustable Accurate CC Output Current Limit with Internal Sensing MOSFET via I2C 500kHz (1) Switching Frequency Output Over-Voltage Protection (OVP) Hiccup Output Short-Circuit Protection (SCP) with Hiccup Mode Over-Temperature Warning and Shutdown I2C Interface with ALT Pin Four Programmable I2C Addresses One-Time Programmable (OTP) NonVolatile Memory I2C Programmable Line Drop Compensation, PFM/PWM Mode, Soft Start, and OCP, etc. EN Shutdown Discharge Programmable Available in a QFN-16 (3mmx3mm) Package APPLICATIONS     Buck-Boost Bus Supplies Industrial Systems Personal Medical Products DSLR Cameras All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS,” the MPS logo, and “Simple, Easy Solutions” are registered trademarks of Monolithic Power Systems, Inc. or its subsidiaries. Note: 1) MP8862 Rev 1.0 5/30/2019 For VOUT < 3V applications, the switching frequency decreases. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 1 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE TYPICAL APPLICATION C4 Efficiency 100nF L1 VIN 12V BST1 SW1 IN C1A 22µF C1 100µF BST2 95 VOUT OUT C2A 10µFx2 MP8862 C7 22nF R4 499kΩ ADD R5 301kΩ 100nF SW2 R3 499kΩ EN VCC 100 C5 ALT SCL I C slave SDA VCC 2 C3 1µF AGND GND R1 21.5kΩ + C2 100µF EFFICIENCY (%) + VIN = 12V, VOUT = 5V to 20V, L = 4.7µH, RDC = 19.5mΩ, forced PWM mode 4.7µH 90 85 80 75 Vo=12V Vo=20V Vo=9V Vo=5V 70 65 OC C6 22nF 60 0.01 0.1 1 10 OUTPUT CURRENT (A) MP8862 Rev 1.0 5/30/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 2 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE ORDERING INFORMATION Part Number* MP8862GQ-xxxx** MP8862GQ-0000 EVKT-MP8862 Package QFN-16 (3mmx3mm) QFN-16 (3mmx3mm) Evaluation kit Top Marking See Below See Below * For Tape & Reel, add suffix –Z (e.g. MP8862GQ-XXXX–Z). ** “xxxx” is the configuration code identifier for the register setting stored in the OTP. The default number is “0000”. Each “x” can be a hexadecimal value between 0 and F. Please work with an MPS FAE to create this unique number, even if ordering the “0000” code. MP8862GQ-0000 is the default version. TOP MARKING BJT: Product code of MP8862GQ Y: Year code LLL: Lot number EVALUATION KIT EVKT-MP8862 EVKT-MP8862 kit contents (items below can be ordered separately): # Part Number Item Quantity 1 EV8862-Q-00A MP8862GQ-0000 evaluation board 1 2 EVKT-USBI2C-02 Includes one USB to I2C communication interface, one USB cable, and one ribbon cable 1 Order directly from MonolithicPower.com or our distributors. Input Power Supply Input GUI USB Cable USB to I2C Communication Interface Ribbon Cable EV8862-Q-00A Output Load Figure 1: EVKT-MP8862 Evaluation Kit Set-Up MP8862 Rev 1.0 5/30/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 3 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE PACKAGE REFERENCE TOP VIEW BST1 SW1 16 IN SW2 BST2 OUT 1 GND GND AGND EN VCC ADD SCL SDA OC ALT QFN-16 (3mmx3mm) PIN FUNCTIONS Pin # Name 1 IN 2, 11 GND 3 EN 4 ADD 5 6 7 8 9 10 12 SCL SDA OC ALT VCC AGND OUT 13 BST2 14 SW2 15 SW1 16 BST1 MP8862 Rev 1.0 5/30/2019 Description Supply voltage. IN is the drain of the internal power device and provides power to the entire chip. The MP8862 operates from a 2.8V to 22V input voltage. A capacitor (CIN) is required to prevent large voltage spikes from appearing at the input. Place CIN as close to the IC as possible. Power ground. GND is the reference ground of the regulated output voltage. GND requires extra care during PCB layout. Connect GND with copper traces and vias. On/off control for entire chip. Drive EN high to turn on the chip. Drive EN low or float EN to turn off the device. EN has an internal 2MΩ pull-down resistor to ground. I2C slave addresses program pin. Connect a resistor divider from VCC to ADD to set four different I2C slave addresses. Clock pin of the I2C interface. SCL can support an I2C clock up to 3.4MHz. Data pin of the I2C interface. Output constant current limit set pin. Alert output. ALT pulling to logic low indicates that a fault or warning has occurred. Internal 3.65V LDO regulator output. Decouple VCC with a 1µF capacitor. Analog ground. Connect AGND to GND. Output power pin. Place the output capacitor close to OUT and GND. Bootstrap. Connect a 0.1µF capacitor between SW2 and BST2 to form a floating supply across the high-side switch driver. Switching node of the second half-bridge. Connect one end of the inductor to SW2 for the current to run through the bridge. Switching node of the first half-bridge. Connect one end of the inductor to SW1 for the current to run through the bridge. Bootstrap. Connect a 0.1µF capacitor between SW1 and BST1 to form a floating supply across the high-side switch driver. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 4 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE θJA θJC ABSOLUTE MAXIMUM RATINGS (2) Thermal Resistance Supply voltage (VIN, VOUT) ........................... 24V VSW1, SW2 ............................ -0.3V (-7V for VOUT) When the input voltage is significantly higher than the output voltage, the MP8862 works in buck mode. In buck mode, SWA and SWB switch for buck regulation. SWC is off, and SWD remains on to conduct the inductor current. SWA works with COT control logic, and SWB turns on as a complement to SWA. In each cycle, SWB turns on to conduct the inductor current. When the inductor current drops to the COMP voltage (VCOMP), SWB turns off, and MP8862 Rev 1.0 5/30/2019 Figure 6: Boost Waveform Buck-Boost Mode (VIN ≈ VOUT) When VIN is close to VOUT, the converter may be unable to provide enough energy to operate in buck mode due to SWA’s minimum off time, or the converter may supply too much power to www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 19 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE VOUT in boost mode due to SWC’s minimum on time. The MP8862 uses buck-boost control to regulate the output in these conditions. In buck mode, if VIN falls and the SWA off period is close to the buck minimum off time, buck-boost mode is engaged. When the next cycle starts after the SWA and SWD on period (buck high-side MOSFET (HS-FET) on period), boost starts with SWA and SWC on (boost lowside MOSFET (LS-FET) on). SWA and SWD turn on again for the rest of the boost period (boost HS-FET on). After the boost period elapses, the buck period starts, and SWB and SWD remain on until the inductor current drops to VCOMP. Then SWA and SWD turn on until the next boost period begins. Buck and boost switching work with a one-interval period. This is called buck-boost mode. In boost mode, if VIN rises and the SWC on period is close to the boost minimum on time, buck-boost mode is engaged. After the boost constant-off-time period (SWA and SWD on), SWB and SWD remain on until the inductor current signal drops to VCOMP, just like a buck off period control. After the inductor current signal triggers VCOMP, SWA and SWD turn on for the buck on time, which is followed by a boost switching (SWA and SWC on). Buck and boost switching work with a one-interval period. Figure 7 shows the buck-boost waveform for both VIN > VOUT and VIN < VOUT. SW1 tBoo st-Min SW2 Buck Min Off Time IL COMP Buck Buck-Boo st tBuck-Boo st Buck to Buck-Boost Transient SW1 tBuck-Min SW2 Boo st Min On Time COMP IL Boo st Buck-Boo st tBuck-Boo st Boost to Buck-Boost Transient Figure 7: Buck-Boost Waveform In buck-boost mode, if VIN exceeds 130% of VOUT, the MP8862 switches from buck-boost mode to buck mode. If VIN is below 20% of VIN, it switches from buck-boost mode to boost mode. Working Mode Selection The MP8862 works with a fixed frequency in heavy-load condition. When the load current decreases, the MP8862 can work in forced continuous conduction mode (FCCM) or pulseskip mode (PSM) based on the MODE register setting. FCCM (or Forced PWM) In FCCM condition, the buck on time and boost off time are determined by the internal circuit to achieve a fixed frequency based on the VIN/VOUT ratio. When the load decreases, the average input current drops, and the inductor current may go negative from VOUT to VIN during the off time (SWD on). This forces the inductor current to work in continuous mode with a fixed frequency, producing a lower VOUT ripple than in PSM mode. PSM (Auto PFM/PWM Mode) In PSM condition, once the inductor current drops to 0A, SWD turns off to prevent the current from flowing from VOUT to VIN, forcing the inductor current to work in discontinuous conduction mode (DCM). Simultaneously, the internal off-time clock stretches once the MP8862 enters DCM mode. The frequency drops when the inductor current conduction period decreases, helping to save power loss and reduce the VOUT ripple. If VCOMP drops to the PSM threshold, even if the IC stretches the frequency, the MP8862 stops switching to decrease switching power loss. MP8862 Rev 1.0 5/30/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 20 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE The MP8862 recovers switching once VCOMP rises above the PSM threshold. The switching pulse skips based on VCOMP in very light-load condition. PSM has a much higher efficiency than FCCM mode in light load, but the VOUT ripple may be higher due to the group switching pulse. Internal VCC Regulator The 3.65V internal regulator powers most of the internal circuitries. This regulator takes VIN and operates in the full VIN range. When VIN exceeds 3.65V, the output of the regulator is in full regulation. If VIN is less than 3.65V, the output decreases with VIN. VCC requires an external 1µF ceramic capacitor for decoupling. Enable Control (EN) The MP8862 has an enable control pin (EN). Pull EN high to enable the IC. Pull EN low or float EN to disable the IC. If EN is pulled down when the output discharge function is enabled, the MP8862 completely shuts down after 55ms. The MP8862’s I2C register value is reset to default only after the MP8862 completely shuts down. If EN is pulled high within 55ms, the I2C register is not reset, and the MP8862 enables the output with previous register setting. If the output discharge function is disabled, the MP8862 completely shuts down once EN is pulled down for more than 100µs, and the MP8862 I2C register is reset after a 100µs delay. VOUT = 12V (I2C Setting) VOUT = 12V (I2C Setting) VOUT = 5V (I2C Reset) EN EN Off < 55ms EN Off > 55ms Figure 8: EN On/Off Logic for I2C Register Reset Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) protects the chip from operating at an insufficient supply voltage. The UVLO comparator monitors the input voltage and enables or disables the entire IC. MP8862 Rev 1.0 5/30/2019 Internal Soft Start (SS) Soft start (SS) prevents the converter output voltage from overshooting during start-up. When the chip starts up, the internal circuitry generates a SS voltage that ramps up from 0V to 3.6V. When SS is lower than VREF, the error amplifier uses SS as the reference. When SS is higher than VREF, the error amplifier uses VREF as the reference. If the output of the MP8862 is pre-biased to a certain voltage during start-up, the IC disables the switching of both the high-side and low-side switches until the voltage on the internal SS capacitor exceeds the internal feedback voltage (see Figure 9). EN 90% VOUT tDELA Y Figure 9: EN On to VOUT > 90% Delay Output Constant Current Limit (OCP) The MP8862 has a constant-current limit control loop to limit the output average current. The current information is sensed from switches A, B, C, and D. Then an average algorithm is used to calculate the output current. When the output current exceeds the currentlimit threshold, the output voltage starts to drop. If VOUT drops below the under-voltage (UV) threshold (typically 50% below the reference), the MP8862 enters hiccup mode or latch-off mode, according to the I2C setting. In hiccup mode, the MP8862 stops switching and recovers automatically with 12.5% duty cycles. In latch-off mode, the MP8862 stops switching until the IC restarts (VIN, EN, or EN bit toggle). Over-Voltage Protection (OVP) The MP8862 monitors a resistor-divided feedback voltage to detect output over-voltage. When the feedback voltage exceeds 160% of the target voltage, the over-voltage protection (OVP) comparator output goes high, and the output-to-ground discharge resistor turns on. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 21 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE The OUT pin has an absolute OVP function. Once VOUT is higher than the absolute OVP threshold (23V), the MP8862 stops switching and turns on the OUT-to-ground discharge resistor. Start-Up and Shutdown If both VIN and EN exceed their respective thresholds, the chip is enabled. The reference block starts first, generating a stable reference voltage and current, and then the internal regulator is enabled. The regulator provides a stable supply for the remaining circuitries. Three events can shut down the chip: EN low, VIN low, and thermal shutdown. During shutdown, the signaling path is blocked to avoid any fault triggering. Then VCOMP and the internal supply rail are pulled down. The floating driver is not subject to this shutdown command. Output Discharge The MP8862 has an output discharge function that provides a resistive discharge path for the external output capacitor. The function is active when the part is disabled (input voltage is under UVLO or EN is off), and the discharge path is turned off when VOUT < 50mV or the 50ms maximum timer passes. This function can also be disabled via the I2C. Over-Temperature Warning (OTW) and Thermal Shutdown (TSD) Thermal warning and thermal shutdown prevent the part from operating at exceedingly high temperatures. When the silicon die temperature exceeds 120°C, the MP8862 sets the OTW bit[D5] to 1. When the temperature falls below its lower threshold (typically 100°C), the OTW bit[D5] is 0. When the silicon die temperature exceeds 150°C, the entire chip shuts down. When the temperature falls below its lower threshold (typically 130°C), the chip is enabled. This is a non-latch protection. I2C INTERFACE I2C Serial Interface Description The I2C is a 2-wire, bidirectional, serial interface consisting of a data line (SDA) and a clock line (SCL). The lines are pulled to a bus voltage externally when they are idle. When connecting to the line, a master device generates the SCL signal and device address, and arranges the communication sequence. The MP8862 interface is an I2C slave that supports fast mode (400kHz) and high-speed mode (3.4MHz). The I2C interface adds flexibility to the power supply solution. The output voltage, transition slew rate, and other parameters can be controlled via the I2C interface. When the master sends the address as an 8-bit value, the 7-bit address should be followed by a 0 or 1 to indicate a write or read operation. Start and Stop Conditions The start and stop conditions are signaled by the master device, which signifies the beginning and end of an I2C transfer. The start condition is defined as the SDA signal transitioning from high to low while the SCL is high. The stop condition is defined as the SDA signal transitioning from low to high while the SCL is high (see Figure 10). The master then generates the SCL clocks and transmits the device address and read/write direction bit (R/W) on the SDA line. Transfer Data Data is transferred in 8-bit bytes by an SDA line. Each byte is followed by an acknowledge bit. I2C Update Sequence The MP8862 requires a start condition, a valid I2C address, a register address byte, and a data byte for a single data update. The MP8862 acknowledges the receipt of each byte by pulling the SDA line low during the high period of a single clock pulse. A valid I2C address selects the part. It performs an update on the falling edge of the LSB byte. Page 23 shows examples of an I2C write and read sequence. I2C Start-Up Timing The I2C function is enabled when VIN > UVLO and EN is active. The function continues to work during OCP, OVP, and thermal shutdown. MP8862 Rev 1.0 5/30/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 22 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE Figure 10: Start and Stop Condition 8 bits 8 bits S Slave Address 8 bits WR A Register Address K A Write Data A P Master to Slave A = Acknowledge (SDA = LOW) S = Start Condition WR Write = 0 Slave to Master NA = NOT Acknowledge (SDA = HIGH) P = Stop Condition RD Read = 1 I2C Write Example – Write Single Register 8 bits 8 bits 8 bits S Slave Address WR A Register Address K A Write Data K A Write Data K+1 A Write Data K+N A P Multi-byte write executed from current register location (the read-only register will be skipped) Master to Slave A = Acknowledge (SDA = LOW) S = Start Condition WR Write = 0 Slave to Master NA = NOT Acknowledge (SDA = HIGH) P = Stop Condition RD Read = 1 I2C Write Example – Write Multi Register 8 bits S Slave Address 8 bits WR A Register Address K A Sr Register address to read specified 8 bits 8 bits Slave Address RD A Read Data K NA P Read register data from current register location Master to Slave A = Acknowledge (SDA = LOW) S = Start Condition Slave to Master NA = NOT Acknowledge (SDA = HIGH) P = Stop Condition Sr = Repeat Start Condition WR Write = 0 RD Read = 1 I2C Read Example – Read Single Register MP8862 Rev 1.0 5/30/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 23 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE I2C REGISTER MAP ADD (HEX) NAME R/W 00 VOUT_L R/W 01 VOUT_H R/W 02 VOUT_GO R/W 03 IOUT_LIM R/W 04 CTL1 R/W 05 06 07 08 09 CTL2 RESERVED RESERVED RESERVED Status R/W R R R R 0A Interrupt W1C 0B Mask R/W 0C 27 28 29 ID1 MFR_ID DEV_ID IC_REV R R R R D7 D6 D5 D4 D3 Reserved D2 D1 D0 VOUT DATA BIT LOW [2:0]* VOUT DATA BIT HIGH [10:3]* PG_ GO_ DELAY_ BIT EN* OUTPUT CURRENT LIMIT THRESHOLD (0A-4A/50mA STEP FOR 21.5K OC Reserved RESISTOR)* HICCUP DISCHG EN* MODE* FREQ Reserved OCP_OVP* _EN* LINE DROP COMP* SS* Reserved Reserved, ALL “0” Reserved Reserved Reserved PG OTP OTW CC_CV Reserved OT OT PG_ OTEMPP_ OC_ OC_ UVP_ OTEMP WARNING_ WARNING RISING ENTER ENTER RECOVER FALLING P_EXIT ENTER _EXIT RESERVED OTWMSK* OC_ UVP_ PG_ OTPMSK* MSK* MSK* MSK* OTP configure code. "0x00" means standard MP8862, “0x01” means MP8862-0001 part number* MANUFACTURER ID: b ‘0000 1001’ DEVICE ID: b ‘0101 1000’ IC REVISION: b ‘0000 0001’ RESERVED Note: * These items have one-time programmable (OTP) non-volatile memory. The OTP is reloaded to the I2C register during VIN > UVLO or EN shutdown. MP8862 Rev 1.0 5/30/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 24 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE REGISTER DESCRIPTION I2C Bus Slave Address A resistor-divider from VCC to GND can achieve an accurate reference voltage. Connect ADD to this reference voltage to set different I2C addresses. The internal circuit changes the I2C address accordingly. Table 1 shows the four voltage thresholds for the four I2C addresses, and recommended resistor settings. Table 1: I2C Address Setting via ADD Voltage ADD Voltage ADD Upper Resistor R4 (kΩ) ADD Lower Resistor R5 (kΩ) Binary Hex 75% VCC 100 No connection 1101 111 6FH I2C Address VOUT Setting The registers VOUT_L and VOUT_H set the output voltage and follow the 11-bit direct format below. Name Format Register Name Bit Access Function Default Value (5V) VOUT Direct, unsigned binary integer VOUT_H D[7:0] N/A 15 14 13 N/A N/A 12 11 VOUT_L D[2:0] 10 9 8 7 6 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Data bit high N/A Data bit low 500 integer The output voltage can be calculated with Equation (1): VOUT (V) = V / 100 (1) Where V is an 11-bit unsigned binary integer of VOUT[10:0], and V ranges from 0 to 2047. The VOUT resolution is 10mV/LSB. Inside the MP8862, there is a feedback resistor network from OUT to the internal FB reference voltage. The feedback resistor ratio is VOUT / VFB = 12.5. The output voltage change slew rate is fixed at 1mV/µs. Refer to the GO_BIT bit when implementing the output voltage change. VOUT_GO Register GO_BIT D[0] The MP8862 can be controlled when to VOUT begins to change. Set GO_BIT to 1 to start the output change based on the VOUT register. When the VOUT change is complete (internal VREF steps to the goal of VREF), GO_BIT auto-resets to 0. This prevents a false operation of the VOUT scaling. Write the output voltage (0x00 and 0x01 registers) first, and then write GO_BIT = 1. VOUT changes based on the new register setting. GO_BIT resets to 0 when VOUT reaches a new value. The host can read GO_BIT to determine if the VOUT scaling is finished or not. The VOUT-to-ground discharge function is enabled when GO_BIT is 1. This can help ramp VOUT from high to low in light-load condition. When GO_BIT is 0, VOUT will not change. When GO_BIT is 1, VOUT changes based on the VOUT register setting. After VOUT scaling finishes, GO_BIT is reset to 0 automatically. MP8862 Rev 1.0 5/30/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 25 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE PG_DELAY_EN D[1] When PG_DELAY_EN D[1] is 0, there is no delay on PG. When PG_DELAY_EN D[1] is 1, PG experiences a 100µs rising delay. The default value is 0. IOUT_LIM Register Set the output current limit threshold. Name IOUT_LIM Format Direct, unsigned binary integer Bit 7 6 5 4 3 2 1 0 Access N/A R/W R/W R/W R/W R/W R/W R/W Default Value (3A) N/A 60 integer IOUT_OC can be calculated with Equation (2): IOUT_OC (A) = IOUT_LIM * 0.05 (2) Where IOUT_LIM is a 7-bit unsigned binary integer of IOUT_LIM D[6:0]. The IOUT_OC resolution is 50mA/LSB (maximum value is 4A or 0x50). The OC pin-to-ground resistor should be 21.5kΩ when using the above IOUT_LIM register. A 22nF (C6) filter capacitor should be added on OC to keep the CC loop stable. The MP8862 directly supports the I2C setting IOUT_LIM. If the CC threshold needs to be changed dynamically after the MP8862 has already entered the CC limit operation state, it is recommended to change the CC threshold step-bystep (e.g. 50mA per step) instead of changing the current value directly to the final value. CTL1 Register NAME BITS DEFAULT DESCRIPTION I2C-controlled, turns the part on or off. When the external EN pin is low, the converter is off, and the I2C shuts down. When EN is high, the EN bit takes over. EN D[7] 1 HICCUP OCP_OVP D[6] 1 1: Hiccup mode 0: Latch-off mode Output discharge enable bit. DISCHG_EN D[5] 1 1: Output discharge function during EN or VIN shutdown 0: No discharge output during shutdown Default is PWM mode for light load. MODE D[4] 1 0: Enables auto PFM/PWM mode 1: Sets forced PWM mode Sets the switching frequency. FREQ D[3:2] 00 MP8862 Rev 1.0 5/30/2019 1: Part is turned on. Default 0: Part is turned off. I2C register does not reset Over-current and over-voltage protection mode selection. 00: 500kHz 01, 10, 11: Reserved www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 26 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE CTL2 Register NAME BITS DEFAULT DESCRIPTION Sets the output voltage compensation vs. the load feature. LINE DROP COMP D[7:6] 00 00: No compensation 01: VOUT compensates 100mV @ 2A IOUT 10: VOUT compensates 200mV @ 2A IOUT 11: VOUT compensates 400mV @ 2A IOUT The above compensation amplitude is fixed for any output voltage. Line drop compensation is only enabled for VOUT ≥ 5V. Sets the output start-up soft-start timer (from 0 to 100%). For 5V output voltage: SS D[5:4] 11 00: 300µs 01: 500µs 10: 700µs 11: 900µs The SS slew rate is constant, but changes for different VOUT values. Status Register NAME BITS DEFAULT DESCRIPTION PG D[7] X 0: Output power is not good 1: Output power is good Over-temperature protection indication. OTP D[6] X 0: Normal state 1: Chip is in over-temperature protection state Over-temperature warning indication. Output power good indication. OTW D[5] X CC_ CV D[4] X 0: Normal state 1: Chip is in-over temperature warning state The chip works in constant-current output mode or constantvoltage output mode. These status bits indicate instantaneous value. 0: CV mode 1: CC mode Interrupt Register NAME BITS OTEMPP_ ENTER D[7] OTWARNING_ ENTER D[6] OC_ENTER D[5] OC_RECOVER D[4] UVP_FALLING D[3] OTEMPP_EXIT D[2] OTWARNING_ EXIT D[1] PG_RISING D[0] MP8862 Rev 1.0 5/30/2019 DESCRIPTION Over-temperature protection entry indication. When this bit is high, the IC enters thermal shutdown. This bit is not masked, even if OTPMSK = 1. OTPMSK = 1 only masks the interrupt pin’s output (ALT). Die temperature early warning entry bit. When this bit is high, the die temperature is above 120˚C. This bit is not masked, even if OTWMSK = 1. OTWMSK = 1 only masks the interrupt pin’s output (ALT). Entry of OC or CC current-limit mode. The OC_MSK bit can enable or disable OC_ENTER and OC_RECOVER alert output. Recovery from CC current-limit mode. Recovering from a hiccup will not trigger this interrupt signal. Output voltage is in under-voltage protection. Over-temperature protection exit. OTPMSK can mask off the ALT of this bit. Die temperature early warning exit bit. When the die temperature is lower than 100°C, this bit is set to 1. This bit is not masked, even if OTWMSK = 1. OTWMSK = 1 only masks the interrupt pin’s output (ALT). Output power good rising edge. This bit is latched once triggered. Write 0xFF to this register to reset the interrupt (ALT) pin’s state. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 27 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE MSK Register NAME BITS DEFAULT OTPMSK D[4] 0 OTWMSK OC_MSK UVP_MSK D[3] D[2] D[1] 0 0 0 PG_MSK D[0] 0 DESCRIPTION SET OTPMSK = 1 to mask off the OTP alert. OTPMSK = 1 only masks the interrupt pin’s output (ALT). This is not the interrupt register, but is similar for other mask bits. Masks off the over-temperature warning. Masks off both OC/CC entry and recovery. Masks off the output UVP interrupt. Masks off the PG indication function on ALT. 1: ALT pin does not indicate a PG event 0: ALT indicates a PG rising event OTEMPP_ENTER OTWARNING_ENTER OC_ENTER Event ALT Pin Active Low Write 0xFF to 0A Reg Can OTEMPP_EXIT Reset ALT Pin OTWARNING_EXIT OC_RECOVER Event Figure 11: ALT Behavior of OTP, OT Warning, and OC Recovery MP8862 Rev 1.0 5/30/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 28 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE APPLICATION INFORMATION Component Selection Selecting the Inductor In a buck-boost topology circuit, the inductor must support buck applications with the maximum input voltage, and boost applications with the minimum input voltage. Two critical inductance values can be determined according to the buck mode and boost mode current ripple using Equation (2) and Equation (3): LMINBUCK  LMINBOOST  VOUT  (VIN(MAX)  VOUT ) VIN(MAX)  fREQ  IL VIN(MIN)  (VOUT  VIN(MIN) ) VOUT  fREQ  IL (2) (3) Where fREQ is the switching frequency, and ∆IL is the peak-to-peak inductor current ripple. As a rule of thumb, the peak-to-peak ripple can be set as 0.5A to 1.5A of the inductor current. The minimum inductor value for the application must be higher than both the Equation (2) and Equation (3) results. Input and Output Capacitor Selection It is recommended to use ceramic capacitors plus an electrolytic capacitor for input and output capacitors, to filter the input and output ripple current and achieve stable operation. Since the input capacitor absorbs the input switching current, it requires sufficient capacitance. For most applications, a 100µF electrolytic capacitor plus a 22µF ceramic capacitor are sufficient. The output capacitor stabilizes the DC output voltage. Low-ESR capacitors and a sufficient capacitor value are recommended to limit the output voltage ripple. Considering the ceramic DC voltage derating, if the output voltage is less than 12V, the minimum COUT should be 22µFx5 ceramic. If the output voltage is greater than 12V, use a 100µF low-ESR (≤80mΩ) aluminum electrolytic or polymer capacitor and two 10µF ceramic capacitors. The input and output ceramic capacitors must be placed as close as possible to the device. In addition to the inductance value, to avoid saturation, the inductor must support the peak current based on Equation (4) and Equation (5): IPEAK BUCK  IOUT  IPEAK BOOST  VOUT  (VIN(MAX)  VOUT ) 2  VIN(MAX)  fREQ  L (4) VOUT  IOUT VIN(MIN)  (VOUT  VIN(MIN) ) (5)   VIN(MIN) 2  VOUT  fREQ  L Where η is the estimated efficiency of the MP8862. MP8862 Rev 1.0 5/30/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 29 1. Place the ceramic CIN and COUT capacitors close to the IC’s VIN-to-GND and OUT-toGND pins, respectively. L1 SW2 PCB Layout Guidelines (9) Efficient PCB layout is critical for stable operation and thermal dissipation. For best results, refer to Figure 12 and follow the guidelines below: SW1 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE OUT VIN 2. Use a large copper plane for PGND. GND 3. Add multiple vias to improve thermal dissipation. 4. Connect AGND to PGND. 5. Use short, direct, and wide traces to connect OUT. Top Layer 6. Add vias under the IC and routing the OUT trace on both PCB layers (highly recommended). SW1 8. Place the VCC decoupling capacitor as close to VCC as possible. Notes: 9) The recommended layout is Application Circuits on page 31. based on the Typical VIN SW2 L1 7. Use a large copper plane for SW1 and SW2. OUT GND Close-Up of Layout Figure 12: Recommended Layout MP8862 Rev 1.0 5/30/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 30 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE TYPICAL APPLICATION CIRCUITS 0 R6 C4 100nF 16 VIN 2.8V-22V 1 C1 100µF + C1B 22µF IN BST2 C1A 0.1µF SW2 OUT R3 499kΩ 3 4.7µH 0 R7 13 VOUT 1V-20V C5 100nF 14 12 EN C2A 0.1µF MP8862 C7 22nF VCC L1 15 SW1 BST1 C2B 10µF C2C 10µF + C2 100µF EMZJ350ARA101MHA 1.8V R4 499kΩ 4 ADD 9 R5 301kΩ VCC C3 1µF AGND 10 R1 100kΩ 8 5 6 ALT I2C Slave SCL SDA OC GND 2, 11 7 C6 22nF R2 21.5kΩ Figure 13: Typical Application Circuit for 1V-20VOUT Note: Refer to the recommended maximum IOUT vs. VIN and VOUT with 120μF low-ESR COUT capacitor curve on page 9. 0 R6 C1 100µF 100nF 16 VIN 2.8V-22V + C4 1 C1B 22µF BST1 SW1 IN BST2 C1A 0.1µF SW2 OUT R3 499kΩ 3 13 4.7µH 0 R7 VOUT 1-12V C5 100nF 14 12 EN C2A 0.1µF MP8862 C7 22nF VCC L1 15 C2B 22µF C2C 22µF C2D 22µF C2E 22µF C2F 22µF 1.8V R4 499kΩ R5 301kΩ 4 9 ADD ALT I2C Slave SCL SDA VCC C3 1µF AGND 10 GND 2, 11 R2 21.5kΩ 8 5 6 R1 100kΩ OC 7 C6 22nF Figure 14: Typical Application Circuit for 1V-12VOUT Note: Refer to the recommended maximum IOUT vs. VIN and VOUT with 22μFx5 ceramic COUT capacitor curve on page 9. MP8862 Rev 1.0 5/30/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 31 MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE PACKAGE INFORMATION QFN-16 (3mmx3mm) NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP8862 Rev. 1.0 5/30/2019 MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 32
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