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MPQ2483ADQ-LF-P

MPQ2483ADQ-LF-P

  • 厂商:

    MPS(美国芯源)

  • 封装:

    VFDFN10

  • 描述:

    INDUSTRIAL GRADE, 2.5A/55V PROG

  • 数据手册
  • 价格&库存
MPQ2483ADQ-LF-P 数据手册
MPQ2483A Industrial/Automotive-Grade 55V, 2.5A Programmable Frequency LED Driver Available in AEC-Q100 The Future of Analog IC Technology DESCRIPTION FEATURES The MPQ2483A is a 55V LED driver suitable for either step-down or inverting step-up and stepdown applications. It achieves a 2.5A peak current with excellent load and line regulation over a wide input supply range.          The MPQ2483A incorporates both DC and PWM dimming into a single control pin. The separate input reference ground allows for direct enable and dimming control for positiveto-negative power conversion. Current-mode operation provides fast transient response and eases loop stabilization. Full protection features include cycle-by-cycle peak current limiting, output over-voltage protection (OVP), open-string protection, output short-circuit protection (SCP), and thermal shutdown. The MPQ2483A requires a minimal number of readily available, standard, external components and is available in 10-pin QFN (3mmx3mm) and 14-pin SOIC14 packages.   2.5A Maximum Peak Current Buck or Buck-Boost Modes Wide 4.5V to 55V Operating Input Range 0.28Ω Internal Power MOSFET Switch Analog and PWM Dimming 0.198V Reference Voltage 5μA Shutdown Mode Stable with Low ESR Capacitors Cycle-by-Cycle Over-Current Protection (OCP) Thermal Shutdown, Over-Voltage (OVP), Short–Circuit (SCP), and Open-String Protection AEC-Q100 Qualified APPLICATIONS    General LED Illumination LCD Backlight Panels Automotive Lighting All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION MPQ2483A Rev. 1.01 www.MonolithicPower.com 8/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 1 MPQ2483A –INDUSTRIAL GRADE, 2.5A, 55V, PROGRAMABLE FREQUENCY ORDERING INFORMATION Part Number Package Top Marking MPQ2483ADQ* MPQ2483ADQ-AEC1 MPQ2483ADS** MPQ2483ADS-AEC1 QFN-10 (3mmx3mm) QFN-10 (3mmx3mm) SOIC-14 SOIC-14 See Below See Below See Below See Below * For Tape & Reel, add suffix –Z (e.g. MPQ2483ADQ–Z) For RoHS compliant packaging, add suffix –LF (e.g. MPQ2483ADQ–LF–Z) ** For Tape & Reel, add suffix –Z (e.g. MPQ2483ADS–Z) For RoHS compliant packaging, add suffix –LF (e.g. MPQ2483ADS–LF–Z) TOP MARKING (MPQ2483ADQ) ATK: Product code of MPQ2483ADQ Y: Year code LLL: Lot number TOP MARKING (MPQ2483ADS) MPS: MPS prefix YY: Year code WW: Week code MP2483A: Part number LLLLLLLLL: Lot number MPQ2483A Rev. 1.01 www.MonolithicPower.com 8/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 2 MPQ2483A –INDUSTRIAL GRADE, 2.5A, 55V, PROGRAMABLE FREQUENCY PACKAGE REFERENCE TOP VIEW VDD VSS OVP FB COMP 1 2 3 4 5 TOP VIEW 10 9 8 7 6 1 14 NC 2 13 SW 3 12 BST OVP 4 11 INGND FB 5 10 EN/DIM COMP 6 9 REST NC 7 8 NC NC SW VDD BST INGND EN/DIM RSET QFN-10 (3mmx3mm) VSS SOIC-14 ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VDD - VSS (0°C  TJ  125°C) ........................ 60V VDD - VSS (-40°C  TJ < 0°C) ......................... 58V VSW - VSS .............................. -0.3V to VDD + 0.3V VBST ...................................................... VSW + 6V VOVP - VSS ........................................-0.3V to +6V VEN - VINGND .....................................-0.3V to +6V VDIM - VINGND ....................................-0.3V to +6V VINGND - VSS ..................................... -0.3V to 60V Other pins - VSS ................................ -0.3V to 6V (2) Continuous power dissipation (TA = +25°C) QFN-10 (3mmx3mm)………………….…....2.5W SOIC-14 ................................................... 1.54W Junction temperature ................................150C Lead temperature .....................................260C Storage temperature ................ -65C to +150C QFN-10 (3mmx3mm) .............. 50 ...... 12 ... C/W SOIC-14 .................................. 86 ...... 38 ... C/W Recommended Operating Conditions (4) θJA θJC NOTES: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its recommended operating conditions. 4) Measured on JESD51-7, 4-layer PCB. (3) Supply voltage (VDD - VSS) 0C ≤ TJ ≤ 125°C……………...……...4.5V to 55V -40C ≤ TJ < 0°C…………….………..4.5V to 50V Operating junction temp. (TJ). .. -40°C to +125°C MPQ2483A Rev. 1.01 www.MonolithicPower.com 8/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 3 MPQ2483A –INDUSTRIAL GRADE, 2.5A, 55V, PROGRAMABLE FREQUENCY ELECTRICAL CHARACTERISTICS VIN = 12V, TJ = -40C to +125C, all voltages with respect to VSS. Typical values are based on the average value when TJ = 25°C, unless otherwise noted. Parameters Symbol Condition Feedback voltage Feedback current Switch-on resistance Switch leakage Current limit (5) VFB IFB RDS(ON) ILIM Oscillator frequency fSW Oscillator frequency(6) fSW Default oscillator frequency fSW_default Foldback frequency Maximum duty cycle Minimum on time(5) Under-voltage lockout threshold rising Under-voltage lockout threshold hysteresis EN input current EN off threshold (with respect to INGND) EN on threshold (with respect to INGND) Minimum EN dimming threshold Maximum EN dimming threshold Supply current (quiescent) Shutdown current Thermal shutdown(5) Open LED OV threshold Open LED OV hysteresis 4.5V  VIN  12V 12V  VIN  55V VFB = 0.22V Min 0.180 0.170 VEN = 0V, VSW = 0V -40°C ≤ TJ ≤ 125°C, duty cycle ≤ 61% VFB = 0.19V, RSET = 200kΩ VFB = 0.19V, RSET = 124kΩ VFB = 0.19V, RSET open VFB = 0V, VOVP = 0V, RSET open VFB = 0.19V 2 2.7 VEN = 2V VEN falling VEN rising VFB = 0V VFB = 0.2V VEN = 2V, VFB = 1V VEN = 0V th hys Units V µA mΩ μA 3.0 A 0.25 MHz 0.31 0.41 0.51 MHz 1.0 1.35 1.7 MHz 2.9 VOVP VOVP Max 0.215 0.220 1.0 280 tON IQ Ioff Typ 0.198 0.198 250 kHz 90 100 3.3 200 1.4 % ns V mV μA V V V V mA μA °C V mV 3.7 0.4 0.55 1.2 1.1 0.7 1.4 0.8 3.4 150 1.2 60 0.6 0.85 1.55 1.5 20 1.3 NOTE: 5) Derived from part characterization. Not tested in production. 6) Only tested on QFN package. MPQ2483A Rev. 1.01 www.MonolithicPower.com 8/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 4 MPQ2483A –INDUSTRIAL GRADE, 2.5A, 55V, PROGRAMABLE FREQUENCY TYPICAL PERFORMANCE CHARACTERISTICS VIN = 20V, ILED = 0.7A, two 3W LED in series, step-down application, unless otherwise noted. LED Current vs. VEN 800 800 700 700 600 600 500 400 300 200 100 5 4.5 500 400 300 200 100 0.2 0.4 0.6 0.8 1 -100 0 400 DIMMING DUTY 3.5 3 800 1200 2 1600 0 10 20 30 40 50 60 70 80 90 DUTY CYCLE(%) VEN(mV) IQ vs. Temperature Efficiency vs. Input Voltage 100 95 4 2.5 0 0 0 2LED 3LED VFB vs. Temperature 1000 250 900 230 800 210 90 VFB (mV) EFFICIENCY ( % ) Ipeak vs. Duty IPEAK (A) LED CURRENT(mA) LED CURRENT(mA) LED Current vs. Dimming Duty 85 1LED 700 80 170 600 75 70 0 10 20 30 40 50 VIN Voltage(V) 190 500 -40 -10 20 50 80 110 o AMBIENT TEMPERATURE ( C) 140 150 -40 -10 20 50 80 110 140 AMBIENT TEMPERATURE (oC) FSW vs. Temperature SWITCH FREQUENCY (kHz) 650 610 570 530 490 450 -40 -10 20 50 80 110 140 AMBIENT TEMPERATURE (oC) MPQ2483A Rev. 1.01 www.MonolithicPower.com 8/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 5 MPQ2483A –INDUSTRIAL GRADE, 2.5A, 55V, PROGRAMABLE FREQUENCY TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 20V, ILED = 0.7A, two 3W LED in series, step-down application, unless otherwise noted. PWM 5V/div. VIN 10V/div. SW 10V/div. SW 10V/div. IINDUCTOR 500mA/div. IINDUCTOR 500mA/div. IWLED 500mA/div. EN 5V/div. SW 10V/div. IINDUCTOR 500mA/div. IWLED 500mA/div. EN 5V/div. SW 10V/div. IINDUCTOR 500mA/div. IWLED 500mA/div. OVP 500mV/div. SW 10V/div. SW 10V/div. OVP 1V/div. VOUT 5V/div. IINDUCTOR 1A/div. IINDUCTOR 2A/div. ISHORT 2A/div. MPQ2483A Rev. 1.01 www.MonolithicPower.com 8/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 6 MPQ2483A –INDUSTRIAL GRADE, 2.5A, 55V, PROGRAMABLE FREQUENCY TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 20V, ILED = 0.7A, seven 3W LED in series, buck-boost application, referred to VSS, unless otherwise noted. 800 800 100 700 700 95 600 600 90 500 500 400 100 100 0 IINDUCTOR 2A/div IWLED 500mA/div VIN 20V/div 75 200 200 VIN 2V/div SW 20V/div 80 300 300 0 85 400 0 0.2 0.4 0.6 0.8 1 -100 70 65 60 0 EN 20V/div IWLED 500mA/div 0 10 20 30 40 50 EN 20V/div SW 20V/div SW 20V/div IL 2A/div IWLED 500mA/div IL 2A/div IWLED 500mA/div OVP 500mV/div SW 20V/div SW 20V/div IINDUCTOR 2A/div 200 400 600 800 1000 1200 1400 1600 VLED+ 10V/div IINDUCTOR 1A/div SW 10V/div EN 5V/div ISHORT 2A/div MPQ2483A Rev. 1.01 www.MonolithicPower.com 8/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 7 MPQ2483A –INDUSTRIAL GRADE, 2.5A, 55V, PROGRAMABLE FREQUENCY PIN FUNCTIONS QFN-10 Pin # SOIC-14 Pin # 1 2 2 3 3 4 4 5 5 6 6 9 7 10 8 11 9 12 10 13 1, 7, 8, 14 Name Description Supply voltage. The MPQ2483A operates from a +4.5V to +55V unregulated input with respect to VSS. C1 and C2 are needed to prevent large voltage spikes from occurring at input. Power return. Connect VSS to the lowest potential in the circuit, typically the Schottky rectifier anode. VSS is the voltage reference for the regulated output VSS voltage. Place VSS outside of the D1 to C1 and C2 ground paths to prevent switching current spikes from inducing voltage noise in the part. The exposed pad is also connected to VSS. Over-voltage protection. Use a voltage divider to program the OVP threshold. When the OVP voltage reaches the shutdown threshold of 1.2V, the switch turns off and recovers when the OVP voltage decreases sufficiently. When the OVP OVP voltage (with respect to VSS) is lower than 0.4V, and the FB voltage is lower than 0.1V, the chip recognizes this as a short-circuit condition, and the operating frequency folds back. Program the OVP voltage from 0.4V to 1.2V for normal operation. LED current feedback input. The MPQ2483A regulates the voltage across the current-sensing resistor between FB and VSS. Connect the current-sensing FB resistor from the bottom of the LED strings to VSS. FB is connected to the bottom of the LED strings. The regulation voltage is 0.198V. Error amplifier output. Connect a capacitor 1nF or larger to COMP to improve COMP stability, provide PWM dimming, and provide a soft-on at start-up. Frequency set. Connect a resistor to VSS to set the switching frequency. RSET Connect a 1nF capacitor to VSS to bypass the noise. When RSET is left open, the default operating frequency is 1.35MHz. On/Off control input and dimming command input. A voltage greater than 0.6V turns the chip on. Both DC and PWM dimming are implemented on EN/DIM. When the EN/DIM voltage (with respect to INGND) rises from 0.7V to EN/DIM 1.4V, the LED current changes from 0% to 100% of the maximum LED current. To use PWM dimming, apply a 100Hz to 2kHz square wave signal with an amplitude greater than 1.4V to EN/DIM. INGND Input ground reference. INGND is the reference for the EN/DIM signal. Bootstrap. A capacitor is connected between SW and BST to form a floating supply across the power switch driver. A ceramic capacitor of 100nF or larger is BST recommended to provide sufficient energy to drive the power switch’s gate above the supply voltage. Switch output. SW is the source of the internal MOSFET switch. Connect SW SW to the power inductor and the cathode of the Schottky rectifier. VDD NC No connection. Exposed Connect exposed pad to VSS in step-up/down mode. Pad MPQ2483A Rev. 1.01 www.MonolithicPower.com 8/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 8 MPQ2483A –INDUSTRIAL GRADE, 2.5A, 55V, PROGRAMABLE FREQUENCY FUNCTIONAL BLOCK DIAGRAM M COMP Figure 1: Functional Block Diagram MPQ2483A Rev. 1.01 www.MonolithicPower.com 8/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 9 MPQ2483A –INDUSTRIAL GRADE, 2.5A, 55V, PROGRAMABLE FREQUENCY OPERATION The MPQ2483A is a current-mode regulator. The error amplifier (EA) output voltage is proportional to the peak inductor current. At the beginning of a cycle, M1 is off. The EA output voltage is higher than the current sense amplifier output, and the current comparator’s output is low. The rising edge of the 1.35MHz CLK signal sets the RS flip-flop. Its output turns M1 on and connects SW and the inductor to the input supply. The increasing inductor current is sensed and amplified by the current sense amplifier. Ramp compensation is summed to the current sense amplifier output and is compared to the error amplifier output by the PWM comparator. When the sum of the current sense amplifier output and the slope compensation signal exceeds the EA output voltage, the RS flip-flop is reset, and M1 is turned off. The external Schottky rectifier diode (D1) conducts the inductor current. If the sum of the current sense amplifier output and the slope compensation signal does not exceed the EA output for the entire cycle, then the falling edge of the CLK resets the flip-flop. The output of the error amplifier integrates the voltage difference between the feedback and the 0.198V reference. The polarity is a FB voltage lower than 0.198V, which increases the EA output voltage. Since the EA output voltage is proportional to the peak inductor current, an increase in its voltage also increases the current delivered to the output. Open LED Protection If the LED is open, there is no voltage on FB. The duty cycle increases until OVP-VSS reaches the shutdown threshold set by the external resistor divider. The top switch turns off and remains off until the voltage on OVP-VSS decreases sufficiently. Dimming Control The MPQ2483A allows for both DC and PWM dimming. When the voltage on EN is less than 0.6V, the chip turns off. For analog dimming, the LED current changes from 0% to 100% of the maximum LED current when the voltage on EN is between 0.7V and 1.4V. If the voltage on EN is higher than 1.4V, a maximum LED current is generated. For PWM dimming, the VDIM-VINGND amplitude must exceed 1.4V. The PWM frequency is recommended to be in the range of 100Hz to 2kHz for optimal dimming linearity. Output Short-Circuit Protection The MPQ2483A has output short-circuit protection. When the output is shorted to VSS, the voltage on OVP (which detects the output voltage) drops to under 0.4V. FB cannot sense any voltage (0.3V positive spike, which may cause false actions or damage. (2) Where ∆IL is the inductor ripple current. MPQ2483A Rev. 1.01 11/28/2009 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 11 MPQ2483A –INDUSTRIAL GRADE, 2.5A, 55V, PROGRAMABLE FREQUENCY To clamp the VSS-INGND positive spike, it is recommended to add a 100Ω resistor from INGND to input GND to clamp the current from VSS to INGND. Add a low forward voltage Schottky diode (e.g. B160) from VSS to INGND to clamp the negative oscillation voltage (see Figure 3). The voltage rating of the Schottky diode should be higher than the OVP voltage set by R3 and R4. For extremely high VSS-INGND spike conditions, a bigger R2 and a higher current rating for D2 are needed to clamp the current. INGND R2 100 VSS D2 B160 Figure 4: FB Positive Spike-Protection Circuit PCB Layout Guidelines Efficient PCB layout is critical for stable operation. For best results, follow the guidelines below. 1. Place the high-current paths (VSS, VDD, and SW) as close to the device as possible with short, direct, and wide traces. 2. Place the input capacitor as close to VDD and VSS as possible. 3. Place the external feedback resistors next to FB. 4. Keep the switch node traces short and away from the feedback network. Figure 3: VSS-INGND Positive Spike-Protection Circuit Selecting the FB Positive Spike-Protection Circuit In applications where there is a possibility that FB can have an abnormally high positive spike, such as load transients from high to low, or LED+ short circuit from LED+ to LED- in buck, boost, and buck-boost applications, an abnormally high positive spike on FB can create false actions or damage. To protect FB from positive spikes that are too high, it is recommended to add a 10kΩ resistor between LED- and FB to clamp the current from LED- to FB, and to add a
MPQ2483ADQ-LF-P 价格&库存

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