UPA1523

DATA SHEET COMPOUND FIELD EFFECT POWER TRANSISTOR µPA1523B P-CHANNEL POWER MOS FET ARRAY SWITCHING INDUSTRIAL USE DESCRIPTION The µPA1523B is P-channel Power MOS FET Array that built in 4 circuits designed for solenoid, motor and lamp driver. PACKAGE DIMENSIONS in millimeters 26.8 MAX. 10 FEATURES • Full Mold Package with 4 Circuits • –4 V driving is possible • Low On-state Resistance RDS(on)1 = 0.8 Ω MAX. (@VGS = –10 V, ID = –1 A) RDS(on)2 = 1.3 Ω MAX. (@VGS = –4 V, ID = –1 A) • Low Input Capacitance Ciss = 190 pF TYP. 2.5 4.0 2.54 1.4 0.6 ± 0.1 1.4 0.5 ± 0.1 ORDERING INFORMATION Type Number Package 10 Pin SIP 1 2 3 4 5 6 7 8 910 CONNECTION DIAGRAM µPA1523BH 3 5 7 9 ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C) Drain to Source Voltage (VGS = 0) Gate to Source Voltage (VDS = 0) Drain Current (DC) Drain Current (pulse) Total Power Dissipation Total Power Dissipation Channel Temperature Storage Temperature Single Avalanche Current Single Avalanche Energy *1 *3 PW ≤ 10 µs, Duty Cycle ≤ 1% 4 Circuits, TA = 25 ˚C VDSS VGSS(AC) ID(DC) ID(pulse) *1 PT1 *2 PT2 *3 TCH Tstg IAS *4 EAS *4 *2 *4 –60 ± 20 ± 2.0 8.0 28 3.5 150 –2.0 0.4 V V A/unit A/unit W W ˚C A mJ 2 1 4 6 8 10 ELECTRODE CONNECTION 2, 4, 6, 8 : Gate 3, 5, 7, 9 : Drain 1, 10 : Source –55 to + 150 ˚C 4 Circuits, TC = 25 ˚C Starting TCH = 25 ˚C, VDD = –30 V, VGS = –20 V → 0, RG = 25 Ω, L = 100 µH Build-in Gate Diodes are for protection from static electricity in handing. In case high voltage over VGSS is applied, please append gate protection circuits. The information in this document is subject to change without notice. Document No. G11331EJ1V0DS00 Date Published May 1996 P Printed in Japan © 10 MIN. ± 1996 µ PA1523B ELECTRICAL CHARACTERISTICS (TA = 25 ˚C) CHARACTERISTIC Drain Leakage Current Gate Leakage Current Gate Cutoff Voltage Forward Transfer Admittance Drain to Source ON-Resistance Drain to Source ON-Resistance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge SYMBOL IDSS IGSS VGS(off) | Yfs | RDS(on)1 RDS(on)2 Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr IF = 2.0 A, VGS = 0 IF = 2.0 A, VGS = 0, di/dt = 50 A/µs VGS = –10 V, ID = –2.0 A, VDD = –48 V ID = –1.0 A, VGS(on) = –10 V, . VDD = –30 V, RL = 30 Ω . TEST CONDITIONS VDS = –60 V, VGS = 0 VGS = 20 V, VDS = 0 VDS = –10 V, ID = –1.0 mA VDS = –10 V, ID = –1.0 A VGS = –10 V, ID = –1.0 A VGS = –4.0 V, ID = –1.0 A VDS = –10 V, VGS = 0, f = 1.0 MHz ± MIN. TYP. MAX. –10 ± 10 UNIT µA µA V S –1.0 0.8 0.5 0.8 190 115 43 8 53 400 230 10 1.1 3.5 1.0 180 250 –2.0 0.8 1.3 Ω Ω pF pF pF ns ns ns ns nC nC nC V ns nC 2 µPA1523B Test Circuit 1 Avalanche Capability D.U.T. RG = 25 Ω PG. VGS = –20 V → 0 50 Ω L VDD BVDSS IAS ID VDD VDS Starting TCH Test Circuit 2 Switching Time D.U.T. RL RG RG = 10 Ω VGS Wave Form VGS 0 ID (—) ID Wave Form t t = 1 µs Duty cycle ≤ 1 % 10 % td(on) ton tr 10 % 90 % 90 % ID td(off) toff VGS 0 10 % tf VGS(on) 90 % PG. VDD 0 Test Circuit 3 Gate Charge D.U.T. IG = 2 mA PG. RL 50 Ω VDD 3 µ PA1523B TYPICAL CHARACTERISTICS (TA = 25 ˚C) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 3.5 PT - Total Power Dissipation - W TOTAL POWER DISSIPATION vs. CASE TEMPERATURE Tc is grease Under Same Temperature dissipation in on back surface each circuit 4 Circuits operation 20 3 Circuits operation 2 Circuits operation 1 Circuit operation 10 3.0 2.5 PT - Total Power Dissipation - W Under Same dissipation in each circuit 4 Circuits operation 30 2.0 1.5 3 Circuits operation 2 Circuits operation 1 Circuit operation 1.0 0.5 0 ,, –10 RD NEC µPA1523BH Lead Print Circuit Boad 50 100 150 0 50 100 150 TA - Ambient Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA –100 dT - Percentage of Rated Power - % TC - Case Temperature - ˚C DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 60 40 20 ID - Drain Current - A –1.0 0 –1 = S ID(DC) VG d( Po ite we im rD )L iss on S( V) ID(Pulse) 10 Pw 50 0 m 1 = 10 0 m s s µs µ s –0.1 –0.1 TC = 25 ˚C Single Pulse –1.0 D ipa C tio nL im ite d –10 –100 0 20 40 60 80 100 120 140 160 VDS - Drain to Source Voltage - V FORWARD TRANSFER CHARACTERISTICS –10 –8 TC - Case Temperature - ˚C DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE Pulsed ID - Drain Current - A ID - Drain Current - A –1 –6 VGS = – 10 V –4 –0.1 TA=125 ˚C 75 ˚C 25 ˚C –25 ˚C –0.01 –2 VGS = –4 V Pulsed VDS = –10 V 0 –2 –4 –6 –8 –10 0 –2 –4 –6 VDS - Drain to Source Voltage - V VGS - Gate to Source Voltage - V 4 µPA1523B TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1 000 rth(t) - Transient Thermal Resistance - ˚C/W Rth(CH-A) 4ircuits 3ircuits 2ircuits 1ircuit 100 10 Rth(CH-C) 1.0 Single Pulse 0.1 100 µ 1m 10 m 100 m 1 10 100 1 000 PW - Pulse Width - s | yfs | - Forward Transfer Admittance - S 100 VDS = –10 V Pulsed RDS(on) - Drain to Source On-State Resistance - Ω FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 1.5 Pulsed 10 TA = –25 ˚C 25 ˚C 75 ˚C 125 ˚C 1.0 1.0 ID = –2 A –1 A –0.4 A 0.5 0.1 –0.01 –0.1 –1.0 –10 0 –10 VGS - Gate to Source Voltage - V –20 ID - Drain Current - A RDS(on) - Drain to Source On-State Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 1 500 Pulsed VGS(off) - Gate to Source Cutoff Voltage - V –2 GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE VDS = –10 V ID = –1 mA 1 000 VGS = –4 V 500 VGS = –10 V –1 0 0 –50 0 50 100 150 TCH - Channel Temperature - ˚C –0.1 –1.0 –10 ID - Drain Current - A 5 µ PA1523B RDS(on) - Drain to Source On-State Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 1600 SOURCE TO DRAIN DIODE FORWARD VOLTAGE 10 1200 VGS = –4 V ISD - Diode Forward Current - A 1.0 VGS = –2 V 800 VGS = –10 V VGS=0 0.1 Pulsed 0 1.0 VSD - Source to Drain Voltage - V 2.0 400 ID = –1 A 0 50 100 150 0 –50 TCH - Channel Temperature - ˚C CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10 000 SWITCHING CHARACTERISTICS 1 000 td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF VGS = 0 f = 1 MHz td(off) tf 100 tr 10 1 000 Ciss 100 Coss Crss 10 –0.1 –1 –10 –100 td(on) VDD = –30 V VGS = –10 V RG = 10 Ω –0.1 –1.0 –10 ID - Drain Current - A 1.0 –0.01 VDS - Drain to Source Voltage - V REVERSE RECOVERY TIME vs. DRAIN CURRENT 1 000 DYNAMIC INPUT/OUTPUT CHARACTERISTICS –80 –16 ID = –2 A –60 VDD = –12 V –30 V –48 V VGS VDS - Drain to Source Voltage - V –12 –10 –8 –6 100 –40 –20 VDS –4 –2 0 10 –0.1 –1.0 ID - Drain Current - A –10 0 2 4 6 8 10 12 QG - Gate Charge - nC 6 VGS - Gate to Source Voltage - V trr - Reverse Recovery time - ns di/dt = 50A/ µ s VGS = 0 –14 µPA1523B SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD –10 IAS - Single Avalanche Current - A SINGLE AVALANCHE ENERGY DERATING FACTOR 100 IAS = –2 A –1.0 EAS =0 .4 m Energy Derating Factor - % 80 60 VDD = –30 V RG = 25 Ω VGS = –20 V → 0 IAS ≤ 1.0 A J 40 –0.1 VDD = –30 V VGS = –20 V → 0 RG = 25 Ω Starting TCH = 25 ˚C 10 µ 100 µ 1m 10 m L - Inductive Load - H 20 0 25 –0.1 50 75 100 125 150 Starting TCH - Starting Channel Temperature - ˚C REFERENCE Document Name NEC semiconductor for device reliability/quality control system Quality grade on NEC semiconductor devices Semiconductor device mounting technology manual Semiconductor device package manual Guide to quality assurance for semiconductor devices Semiconductor selection guide Power MOS FET features and application switching power supply Application circuits using Power MOS FET Safe operating area of Power MOS FET Document No. TEI-1202 IEI-1209 C10535E C10943X MEI-1202 X10679E TEA-1034 TEA-1035 TEA-1037 7 µ PA1523B [MEMO] No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: “Standard“, “Special“, and “Specific“. The Specific quality grade applies only to devices developed based on a customer designated “quality assurance program“ for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices in “Standard“ unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact NEC Sales Representative in advance. Anti-radioactive design is not implemented in this product. M4 94.11