UPC1876GT

DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC1876 US MTS DECODER DESCRIPTION The µPC1876 is an integrated circuit for US MTS (Multi Channel Television Sound) system. All functions for US MTS system are provided on one chip. The µPC1876 has built-in SAP (Sub Audio Program) discrimination error protection circuit. FEATURES • BTSC (USA) standard demodulator (Stereo demodulation and TV-dbx noise reduction) • Only four adjustments (2 separation, 1 stereo VCO, 1 filter) • Supply voltage: 8 V to 10 V • Circuit current: 27 mA TYP. (Supply voltage: 9 V) • Input and output level (L+R, 100% modulation) Input level: 0.42 Vp-p Output level: 1.41 Vp-p APPLICATION • TV sets and VCRs for North America ORDERING INFORMATION Part Number Package 42-pin plastic SSOP (9.53 mm (375)) µPC1876GT The µPC1876 is available only to licensees of THAT Corporation. Please contact: (03) 5790-5391 (Japan) (508) 229-2500 (USA) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Document No. S11666EJ4V0DS00 (4th edition) Date Published June 2000 N CP(K) Printed in Japan The mark shows major revised points. © 1996 µPC1876 SYSTEM BLOCK DIAGRAM (TV) Tuner PIF & SIF Color, intensity and deflecting signal processor Color output CRT Vertical output DTS interface µ PC1876 Dual attenuator/ Matrix surround processor Sound output Degital tuning controller Remote control reception amplifier PIN photo-diode 2 Data Sheet S11666EJ4V0DS00 µPC1876 BLOCK DIAGRAM VCC 1 kΩ STL SAP1/2 ST/SAP MUTE FMONO 22 23 24 25 26 27 Mode Selector LED Driver WideBand VCA 21 20 19 WideBand RMS Filter 18 17 16 15 Spectral RMS 14 13 12 ST/SAP SW 408 Hz LPF Variable Emphasis 2.19 kHz LPF 11 10 SAPL DCO 1 kΩ VCC VCC 20 kΩ LGND WTI STI 10 µ F∗∗ + 3.3 µ F∗∗ + 100 kΩ 50 kΩ Offset Absorption WideBand RMS Note 1 IC SPA 51 kΩ WBA 51 kΩ ITI 10 µ F ROT 28 + 10 µ F LOT 29 + 1 µF + VOA GND MOA1 0.1 µ F MOA2 VRE + 1.5 V 33 kΩ∗ SAPVA FLTA STVA PD1 0.1 µ F PD2 30 31 32 33 34 35 1/2 36 37 38 39 40 41 42 1/4 Stereo VCO Pilot Discrimination Phase Comparator Stereo Phase Comparator 1/2 VCC Matrix fH Trap LPF Spectral RMS Filter 56 k Ω∗ 56 k Ω∗ WRB 5.1 kΩ + SRB 3 kΩ + VCC WBVI VEO fHSW SI SOT NDT SDT SDI SBO COM + 2.2 µF + 0.47 µ F 0.047 µ F 0.01 µ F 0.1 µ F 68 kΩ 0.1 µF 1 µF VCC 1 µ F 22 µ F 9 Deemphasis SAP VCO SAP LPF L+R LPF Loop Filter Noise Detector Noise BPF Pilot Canceller Phase Detector SAP Detector 8 7 6 5 4 3 SAP BPF Stereo LPF + – Note 2 L-R AM Demodulator 10 kΩ 33 kΩ∗ 20 kΩ 47 kΩ∗ 1 kΩ 4.7 µ F + φ D1 + 1 µF φ D2 2 1 Notes 1. Do not leave the Internally Connected (IC) pin open because it is a base-open pin. Connect this pin to VCC or GND. 2. Am: Amplitude modulation (Carrier frequency is 31.5 kHz (2fH)) Remark Use the following for external parts. Resistor (∗) : Metal film resistor (± 1%). Unless otherwise specified; ± 5% Capacitors (∗∗) : Tantalum capacitor (± 10%). Unless otherwise specified; ± 20% Variable resistors: ± 10% Data Sheet S11666EJ4V0DS00 3 µPC1876 PIN CONFIGURATION (Top View) 42-pin plastic SSOP (9.53 mm (375)) COMPOSITE SIGNAL INPUT SAP BPF OUTPUT SAP DISCRIMINATION FILTER INPUT SAP DISCRIMINATION FILTER NOISE DETECTION FILTER SAP SINGLE OUTPUT SAP SINGLE INPUT STEREO VCO FREE-RUN MONITOR SWITCH VARIABLE EMPHASIS OUTPUT WIDE-BAND VCA INPUT POWER SUPPLY (9 V) SPECTRAL RMS OFFSET ABSORPTION WIDE-BAND RMS OFFSET ABSORPTION TIMING CURRENT SETTING WIDE-BAND RMS SETTING SPECTRAL RMS SETTING SPECTRAL RMS TIMING WIDE-BAND RMS TIMING LED GND DC OUTPUT SAP LED DRIVER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 COM SBO SDI SDT NDT SOT SI fHSW VEO WBVI VCC SRB WRB ITI WBA SPA STI WTI LGND DCO SAPL φ D2 42 φ D1 41 PD2 PD1 STVA FLTA SAPVA 1.5 V VRE MOA2 MOA1 GND VOA LOT ROT IC FMONO MUTE ST/SAP SAP1/2 STL 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 PHASE COMPARATOR FILTER 2 PHASE COMPARATOR FILTER 1 PILOT DISCRIMINATION FILTER 2 PILOT DISCRIMINATION FILTER 1 STEREO VCO SETTING FILTER ADJUSTMENT SAP VCO SETTING BIAS (1.5 V) 1/2 VCC FILTER MONAURAL OFFSET ABSORPTION 2 MONAURAL OFFSET ABSORPTION 1 SIGNAL GND VCA OFFSET ABSORPTION L CHANNEL OUTPUT R CHANNEL OUTPUT INTERNAL CONNECTION F-MONAURAL SELECTION MATRIX MUTE STEREO/SAP SWITCH SAP 1/2 SWITCH STEREO LED DRIVER/ STEREO VCO FREE-RUN MONITOR 4 Data Sheet S11666EJ4V0DS00 µPC1876 CONTENTS 1. INTERNAL EQUIVALENT CIRCUITS ............................................................................................ 2. FUNCTION OF EACH BLOCK ..................................................................................................... 2.1 Stereo Demodulation Block ................................................................................................... 2.2 SAP Demodulation Block ....................................................................................................... 2.3 dbx Noise Reduction Block ................................................................................................... 2.4 Matrix Block ............................................................................................................................ 3. EXPLANATION OF EACH FUNCTION ........................................................................................ 3.1 Mode Matrix Table ................................................................................................................... 3.2 MATRIX MUTE Pin .................................................................................................................. 3.3 F-MONAURAL SELECTION Pin ............................................................................................. 3.4 STEREO/SAP SWITCH Pin ..................................................................................................... 3.5 SAP 1/2 SWITCH Pin ............................................................................................................... 4. PRECAUTIONS ............................................................................................................................... 4.1 Impedance of Input Pins and Output Pins ........................................................................... 4.2 Output Load Impedance ........................................................................................................ 4.3 Cautions on External Components ....................................................................................... 4.4 Change of Electrical Characteristics Depending on External Components ..................... 4.5 BIAS (1.5 V) Pin ....................................................................................................................... 5. ADJUSTMENT PROCEDURE ........................................................................................................ 5.1 Stereo VCO Adjustment ......................................................................................................... 5.2 Filter Adjustment .................................................................................................................... 5.3 Separation Adjustment .......................................................................................................... 5.4 SAP VCO Adjustment ............................................................................................................. 5.5 List of Pin Settings in Adjustment ........................................................................................ 6 13 14 15 15 17 18 18 18 19 19 19 20 20 20 21 21 21 22 22 22 22 23 23 6. ELECTRICAL SPECIFICATIONS ................................................................................................... 24 7. MEASURING CIRCUIT ................................................................................................................... 35 8. DIFFERENCES BETWEEN THE µPC1876GT AND µPC1872GT ............................................. 36 9. PACKAGE DRAWING ..................................................................................................................... 37 10. RECOMMENDED SOLDERING CONDITIONS ............................................................................. 38 Data Sheet S11666EJ4V0DS00 5 µPC1876 1. INTERNAL EQUIVALENT CIRCUITS (1/7) Pin Number 1 Pin Name COMPOSITE SIGNAL INPUT Symbol COM Internal Equivalent Circuit VCC VCC 80 kΩ 1 5 kΩ 5 pF 10 kΩ 10 kΩ 1 2 5 kΩ 5 kΩ GND 2 SAP BPF OUTPUT SBO VCC 2 kΩ 10 kΩ 2 5 kΩ 2 kΩ GND 3 SAP DISCRIMINATION FILTER INPUT SDI VCC VCC 10 kΩ 40 kΩ 10 kΩ 1 2 5 kΩ 3 10 pF 10 kΩ GND 6 Data Sheet S11666EJ4V0DS00 µPC1876 (2/7) Pin Number 4 Pin Name SAP DISCRIMINATION FILTER Symbol SDT Internal Equivalent Circuit VCC 10 kΩ 10 kΩ 10 kΩ 4 20 kΩ 3 pF 5 kΩ 39 kΩ 13 kΩ 20 kΩ 20 kΩ 10 kΩ 10 kΩ 10 kΩ 5 kΩ 10 kΩ GND 5 NOISE DETECTION FILTER NDT 20 kΩ 20 kΩ 5 20 kΩ VCC 20 kΩ 20 kΩ 20 kΩ 20 kΩ GND 6 7 8 SAP SINGLE OUTPUT SAP SINGLE INPUT STEREO VCO FREE-RUN MONITOR SWITCH SOT SI fHSW Same as SBO pin Same as COM pin 2 VCC VCC 1 5 kΩ 20 kΩ 20 kΩ 60 kΩ 10 kΩ 8 GND 9 VARIABLE EMPHASIS OUTPUT WIDE-BAND VCA INPUT POWER SUPPLY (9 V) VEO Same as SBO pin 10 11 WBVI VCC Same as COM pin Data Sheet S11666EJ4V0DS00 7 µPC1876 (3/7) Pin Number 12 Pin Name SPECTRAL RMS OFFSET ABSORPTION WIDE-BAND RMS OFFSET ABSORPTION Symbol SRB Internal Equivalent Circuit Pin 13 is the same as pin 12. VCC 5 kΩ 13 WRB 5 kΩ 5 kΩ 5 kΩ 12 5 kΩ GND 14 15 16 TIMING CURRENT SETTING WIDE-BAND RMS SETTING SPECTRAL RMS SETTING ITI WBA SPA Pin 16 is the same as pin 15. VCC 10 kΩ 10 kΩ 5 kΩ 5 kΩ 10 kΩ 14 30 kΩ GND 17 SPECTRAL RMS TIMING STI VCC 5 kΩ 600Ω 10 kΩ 10 10 kΩ kΩ 10 kΩ 10 kΩ 15 5 kΩ 5 kΩ 5 kΩ 17 5 kΩ GND 18 WIDE-BAND RMS TIMING WTI Same as STI pin 8 Data Sheet S11666EJ4V0DS00 µPC1876 (4/7) Pin Number 19 20 21 22 Pin Name LED GND DC OUTPUT SAP LED DRIVER STEREO LED DRIVER/ STEREO VCO FREE-RUN MONITOR Symbol LGND DCO SAPL STL Internal Equivalent Circuit VCC 30 kΩ 5 kΩ 5 kΩ 20 10 kΩ 1 kΩ 1 kΩ 22 21 10 kΩ 5 kΩ 5 kΩ LGND 23 SAP1/2 SWITCH SAP1/2 20 kΩ VCC 23 10 kΩ LGND 24 25 STEREO/SAP SWITCH MATRIX MUTE ST/SAP MUTE Same as SAP1/2 pin VCC 20 kΩ 20 kΩ 25 10 kΩ GND 26 27 F-MONAURAL SELECTION INTERNAL CONNECTION FMONO IC Same as MUTE pin Same as MUTE pinNote Note Do not leave the Internally Connected (IC) pin open because it is a base-open pin. Connect this pin to VCC or GND. Data Sheet S11666EJ4V0DS00 9 µPC1876 (5/7) Pin Number 28 Pin Name R CHANNEL OUTPUT Symbol ROT 1 kΩ 10 kΩ 200Ω 28 200Ω 5 kΩ Internal Equivalent Circuit VCC 5 kΩ 5 kΩ 1 kΩ GND 29 30 L CHANNEL OUTPUT VCA OFFSET ABSORPTION LOT VOA Same as ROT pin VCC 1 2 VCC 10 kΩ 10 kΩ 10 kΩ VCC 40 kΩ 30 40 kΩ 5 pF 5 kΩ 10 kΩ 10 kΩ GND 31 32 SIGNAL GND MONAURAL OFFSET ABSORPTION 1 MONAURAL OFFSET ABSORPTION 2 1/2 VCC FILTER GND MOA1 Same as COM pin 33 MOA2 Same as SBO pin 34 VRE VCC 10 kΩ 10 kΩ 5 kΩ 20 kΩ 34 20 kΩ 20 kΩ 10 kΩ 10 kΩ 20 kΩ GND 10 Data Sheet S11666EJ4V0DS00 µPC1876 (6/7) Pin Number 35 Pin Name BIAS (1.5 V) Symbol 1.5 V 20 kΩ 20 kΩ Internal Equivalent Circuit VCC 5 kΩ 5 pF 35 2.5 kΩ 5 kΩ 12.5 kΩ GND 36 37 SAP VCO SETTING FILTER ADJUSTMENT SAPVA FLTA 20 kΩ 20 kΩ VCC 20 kΩ 20 kΩ 25 kΩ 36 37 1 kΩ 5 kΩ 1 kΩ GND 38 STEREO VCO SETTING STVA VCC 10 kΩ 10 kΩ 20 pF 10 kΩ 38 30 kΩ GND 10 kΩ 1 kΩ Data Sheet S11666EJ4V0DS00 11 µPC1876 (7/7) Pin Number 39 40 Pin Name Symbol Internal Equivalent Circuit PILOT DISCRIMINATION FILTER 1 PD1 PILOT DISCRIMINATION FILTER 2 PD2 VCC 39 15 kΩ 15 kΩ 5 kΩ 1 2 VCC VCC 40 15 kΩ 15 kΩ 5 kΩ 41 42 PHASE COMPARATOR FILTER 1 PHASE COMPARATOR FILTER 2 φ D1 φ D2 41 VCC 15 kΩ 5 kΩ 5 kΩ 1 2 VCC VCC 42 15 kΩ 5 kΩ 5 kΩ 12 Data Sheet S11666EJ4V0DS00 µPC1876 2. FUNCTION OF EACH BLOCK In the US, TV audio signals are broadcast in FM modulation. The stereo (L–R), Sub Audio Program (SAP) and telemetry signals are multiplexed in a higher frequency band than the monaural (L+R) signal (50 Hz to 15 kHz). The US MTS system base-band spectrum is described before: Figure 2-1. US MTS System Base-Band Spectrum 50 Stereo signal (L–R) Audio carrier deviation (kHz) Stereo pilot signal Monaural signal (L+R) 25 15 Sub Audio Program (SAP) signal 5 3 0 fH (15.734 kHz) 2 fH 3 fH 4 fH 5 fH 6 fH Telemetry signal 6.5 fH Modulation frequency (Hz) Table 2-1. US MTS System Base-Band Spectrum Maximum audio carrier deviation (kHz) 25 Only stereo broadcasting AM modulation (carrier frequency 2 fH), dbx noise reduction processing FM modulation (carrier frequency 5 fH, maximum frequency deviation 10 kHz) dbx noise reduction processing FM modulation (carrier frequency 6.5 fH, maximum frequency deviation 3 kHz) 5 50 Signal frequency band Monaural signal (L+R) Stereo pilot signal Stereo signal (L–R) 50 Hz to 15 kHz 15.734 kHz 50 Hz to 15 kHz Signal processing system Sub Audio Program (SAP) signal 50 Hz to 10 kHz 15 Telemetry signal Audio Data 0 to 3.4 kHz 0 to 1.5 kHz 3 Data Sheet S11666EJ4V0DS00 13 µPC1876 2.1 Stereo Demodulation Block (1) Stereo LPF Filter eliminates the Sub Audio Program (SAP) signal (5 fH) and telemetry signal (6.5 fH) residing anywhere around 5 to 6 fH. The internal L–R demodulator, which uses the double-balanced circuit, demodulates L–R signal by multiplication of L–R signal with the signal at L–R carrier frequency (2 fH). The L–R signal tends to be interfered by the 6 fH signal because a square waveform is used as the switching carrier in this method. To eliminate the interference, the µPC1876 incorporates 5 fH and 6 fH traps. Adjust the current value output from the FLTA pin for the filter response. (2) Stereo phase comparator The 8 fH signal generated at the stereo VCO is divided by 8 (4 × 2) and then multiplies it with the pilot signal passed through the stereo LPF. The two signals differ from each other by 90 degrees in terms of phase. The resistor and capacitor connected to the φ D1 and φ D2 pins form a filter which smoothes the phase error signal output from the phase comparator, converting the error signal to the DC voltage. When the voltage difference between the φ D1 and φ D2 pins becomes 0 V (strictly speaking, not 0 V by the internal offset voltage), the stereo VCO runs at 8 fH. The lag/lead filter externally connected to the φ D1, φ D2 pins determines the capture range. (3) Stereo VCO Runs at 8 fH with the internal capacitor. Adjust the current value output from the STVA pin for the frequency. (4) Divider (Flip-flop) Produces the inphase fH signal and the fH signal which is different 90 degrees from the input pilot signal by dividing the 8 fH frequency by 4 × 2 from the stereo VCO. (5) Pilot discrimination phase comparator (Level detector) Multiplies the pilot signal from the COM pin with the inphase fH signal from the divider. The produced signal is applied to the external filter connected to the PD1, PD2 pins. The signal is smoothed out to make DC voltage for judging whether to turn on or off the stereo LED. (6) Pilot canceller The fH signal from the divider is added in the stereo signal at the resistor matrix depending on the level of the input pilot signal to cancel the pilot signal. (7) L+R LPF This LPF, having traps at fH and 24 kHz each, allows only the monaural signal to pass through. The filter response is adjusted by the current value output from the FLTA pin. (8) De-emphasis 75 µs de-emphasis filter for the monaural signal. The filter response is adjusted by the current value output from the FLTA pin. (9) L–R AM demodulator Demodulates the L–R AM-DSB modulated signal by multiplying with the 2fH signal which is synchronized to the pilot signal. The 2 fH square wave is used as the switching carrier. 14 Data Sheet S11666EJ4V0DS00 µPC1876 2.2 SAP Demodulation Block (1) SAP BPF Picks up the SAP signal by the 50 kHz and 102 kHz traps, and response peak at 5 fH. Adjust the current value output from the FLTA pin for the filter response. (2) Noise BPF The µPC1876 monitors signals picked up by noise BPF (fO ≅ 180 kHz), and distinguish noises from signals. By this method, the µPC1876 prevents misoperating on SAP detection in a weak electric field. Adjust the current value output from the FLTA pin for the filter response. (3) Noise detector Performs full-wave rectification of noise which has passed through noise BPF to change it to the DC voltage and input it to comparator. When the noise level exceeds the reference level, the stereo LED and SAP LED are turned off, and the stereo and SAP demodulation are stopped. Adjust the value of the resistor and capacitor connected to the NDT pin for the sensitivity and time constant of the noise detection circuit. (4) SAP detector Performs synchronized detection of the SAP signal which has passed through the SAP BPF, and smoothes it with the SDT pin and input it to the comparator. When receiving the SAP signal, the SAP LED is turned on. (5) SAP demodulator The SAP demodulator consists of the phase detector, loop filter, and SAP VCO (PLL detection circuit). The SAP VCO oscillates at 10 fH, and performs phase comparison between the signal divided by 2 of the SAP VCO frequency and the SAP signal to make the PLL loop. Adjust the current value output from the SAPVA pin for the frequency of the SAP VCO. (6) SAP LPF Eliminates the SAP carrier and higher frequency buzz. The filter consists of a secondary LPF and fH trap filter. Adjust the current value output from the FLTA pin for the filter response. 2.3 dbx Noise Reduction Block All the filters required for the TV-dbx noise reduction are incorporated. Adjust the current value output from the FLTA pin for these filter responses. (1) LPF The LPF has traps at fH and 24 kHz each. The fH trap filter minimizes interference to the dbx noise reduction by the fH signal which is not synchronized with the pilot signal (e.g. leakage of the synchronous idle and buzz from the video signal). Data Sheet S11666EJ4V0DS00 15 µPC1876 (2) 408 Hz LPF A de-emphasis filter. The transfer function is as follows: 1+ j f 5.23 k f 1+ j 408 T(f) = (3) Variable emphasis Also called spectral VCA and controlled by the spectral RMS. The transfer function is as follows: 1+ j 1 + 51 b f ⋅ 20.1 k b +1 1 + 51 f 1+ j ⋅ 20.1 k b + 1 S −1 (f, b) = b: Variable transferred from the spectral RMS for controlling (4) Wide band VCA A VCA whose operating frequency range is mainly low to mid frequencies and controlled by the wide band RMS. The transfer function is as follows: W–1 (a) = a a: Variable transferred from the wide-band RMS for controlling (5) 2.19 kHz LPF A de-emphasis filter. The transfer function is as follows: f 6.25 k f 1+ j 2.19 k 1+ j T(f) = (6) Spectral RMS filter A filter that limits the band width of the signal input to the RMS which controls the variable emphasis. The transfer function is as follows: f   j   7.66 k  1+ j 2 T(f) = f f   + j   7.66 k  7.31 k 2 ⋅ f 3.92 k f 1+ j 3.92 k j (7) Wide-band RMS filter A filter that limits the band width of the signal input to the wide-band RMS which controls the wide band VCA. The transfer function is as follows: T(f) = 1 1+ j f 2.09 k 16 Data Sheet S11666EJ4V0DS00 µPC1876 (8) Spectral RMS Detects the RMS value of the signal which has passed through the spectral RMS filter and converts the signal to the DC voltage. The timing (release time) is determined by the current inside the µPC1876 (IT) and the capacitance of the external capacitor connected to the STI pin. Set IT by the current value output from ITI pin. (9) Wide band RMS Detects the RMS value of the signal which has passed through the wide band RMS filter and converts the signal to the DC voltage. The timing (release time) is determined by the current inside the µPC1876 (IT) and the capacitance of the external capacitor connected to the WTI pin. Set IT by the current value output from ITI pin for the setting of IT. 2.4 Matrix Block (1) Matrix Adds L+R signal and L–R signal to output L signal and subtracts L+R signal from L–R signal to output R signal. (2) Mode selector Selects the user selected mode among the monaural, stereo, SAP signals, and mute, and outputs it from the ROT and LOT pins. Data Sheet S11666EJ4V0DS00 17 µPC1876 3. EXPLANATION OF EACH FUNCTION Caution Apply bias voltage to the F-MONAURAL SELECTION pin, the MATRIX MUTE pin, the SAP 1/2 pin and the STEREO/SAP SWITCH pin. Don’t leave those pins unconnected because those pins are base open. Loss current is 0.1 µA or less. Mode matrix table is shown in 3.1, and functions of mode switch pins are explained in 3.2 to 3.5. 3.1 Mode Matrix Table L, R SIGNAL OUTPUT pin matrix table Control pin Broadcasting mode Monaural F-MONAURAL SELECTION – H Stereo M L STEREO/SAP SWITCH – – – – H H Monaural + SAP M L L – – H H Stereo + SAP M L L – – SAP1/2 SWITCH – – – – – H L – – – H L – – L+R L L+R SAP OFF ON OFF ON L H L+R R SAP ON ON H L+R SAP L+R L+R SAP OFF OFF ON L H ON H L Output LED ON/OFF SAP LED OFF DC OUTPUT L L CHANNEL R CHANNEL STEREO OUTPUT OUTPUT LED L+R R OFF ON OFF ON OFF L Remark When the noise detector detects noise, both the stereo and the SAP demodulation circuit stop. The noise detector of the µPC1876 detects noise near 180 kHz that is 30 mVr.m.s. (TYP.) or higher. 3.2 MATRIX MUTE Pin The MATRIX MUTE pin controls muting of each output pin at muting operation. Input signal level of the MATRIX MUTE H L R CHANNEL OUTPUT L CHANNEL OUTPUT Mute is ON Mute is OFF SAP LED STEREO LED OFF ON 18 Data Sheet S11666EJ4V0DS00 µPC1876 3.3 F-MONAURAL SELECTION Pin When the F-MONAURAL SELECTION is ON, the R CHANNEL OUTPUT and L CHANNEL OUTPUT output monaural (L+R) signal regardless of broadcasting mode. The µPC1876 varies in pin function of the F-MONAURAL SELECTION. Output pin Input signal level of the F-MONAURAL SELECTION H M L ON R CHANNEL OUTPUT L CHANNEL OUTPUT OFF 3.4 STEREO/SAP SWITCH Pin Selecton pin of the L CHANNEL OUTPUT and R CHANNEL OUTPUT (Stereo signal/SAP signal). Output pin Input signal level of the STEREO/SAP SWITCH H L R CHANNEL OUTPUT L CHANNEL OUTPUT Stereo signal SAP signal 3.5 SAP 1/2 SWITCH Pin Selection pin of the L CHANNEL OUTPUT and R CHANNEL OUTPUT (SAP 1 mode/SAP 2 mode) when the STEREO/SAP SWITCH is L level (SAP signal is selected). Input signal level of the SAP 1/2 SWITCH H L Mode SAP2 SAP1 L CHANNEL OUTPUT R CHANNEL OUTPUT L + R signal SAP signal SAP signal Data Sheet S11666EJ4V0DS00 19 µPC1876 4. PRECAUTIONS 4.1 Impedance of Input Pins and Output Pins Each impedance of input and output pins are the following. Pin name Input COMPOSITE SIGNAL INPUT SAP DISCRIMINATION FILTER INPUT SAP SINGLE INPUT WIDE BAND VCA INPUT MONAURAL OFFSET ABSORPTION 1 Output SAP BPF OUTPUT SAP SINGLE OUTPUT VARIABLE EMPHASIS OUTPUT MONAURAL OFFSET ABSORPTION 2 R CHANNEL OUTPUT L CHANNEL OUTPUT Impedance 80 kΩ 40 kΩ 80 kΩ 80 kΩ 80 kΩ 360 Ω 360 Ω 360 Ω 360 Ω 15 Ω 15 Ω Scattering rate of impedance is about ± 30%. 4.2 Output Load Impedance If the L CHANNEL OUTPUT pin and the R CHANNEL OUTPUT pin are connected to GND through 10 kΩ resistor, they can drive 700 Ω load impedance. And, when connecting a load capacitance over 100 pF to the L/R CHANNEL OUTPUT pins, parasitic oscillation can cause. In this case, insert a resistor between the L/R CHANNEL OUTPUT pins and the load capacitance. Note that the load capacitance changes by printed-wiring pattern of set. Caution To insert the DC load resistor (RL) between the L/R CHANNEL OUTPUT pins and GND, the RL should be equal or more than 3 kΩ. Note that the DC current increments 4.5/RL [A] per one output pin when inserting the RL, because the medium potential is 4.5 V (VCC = 9 V). If the RL is less than 3 kΩ, the distortion rate may become worse extremely. 20 Data Sheet S11666EJ4V0DS00 µPC1876 4.3 Cautions on External Components For stable temperature characteristics of stereo VCO, SAP VCO and filter, use the following for external components. Pin name SAP VCO SETTING FILTER ADJUSTMENT STEREO VCO SETTING External parts Metal film resistor (± 1%), Cermet (Variable resistor) (± 10%) According to the license contract with THAT Corporation, use the following for external components. With regard to the use of other external components, please contact to THAT Corporation. Pin name TIMING CURRENT SETTING WIDE BAND RMS TIMING SPECTRAL RMS TIMING External parts Metal film resistor (± 1%) Tantalum capacitor (± 10%) 4.4 Change of Electrical Characteristics Depending on External Components • SAP sensitivity can be down by inserting a resistor between the SAP DISCRIMINATION FILTER pin and GND. • Stereo sensitivity can be down by inserting a resistor between the STEREO VCO FREE-RUN MONITOR SWITCH pin and GND. • Noise sensitivity can be changed by changing a resistor between the NOISE DETECTION FILTER pin and GND. • Capture range can be changed by changing capacitor between the PHASE COMPARATOR FILTER pins φD1 and φD2. The smaller capacitor is, the wider capture range is, and the larger capacitor is, the narrower capture range is. Please be careful because stereo distortion rate become worse if capacitor is too small. • In case noise detection circuit doesn’t operate with stereo, it is necessary that capacitor between the PILOT DISCRIMINATION FILTER pins is about 2.2 µF (Protection for miss operation in the weak electric field). The time for changing to stereo, become longer if capacitor is too large. 4.5 BIAS (1.5 V) Pin The BIAS (1.5 V) pin is the bias pin when adjusting the SAP VCO SETTING, the FILTER ADJUSTMENT, the STEREO VCO SETTING, the WIDE BAND RMS SETTING, and the SPECTRAL RMS SETTING pins with lasertrimming. Data Sheet S11666EJ4V0DS00 21 µPC1876 5. ADJUSTMENT PROCEDURE Precise alignment of the dbx decoder is absolutely critical for optimum performance. Where possible, the alignment should be performed after the µPC1876 is mounted in the chassis and with the video system active. 5.1 Stereo VCO Adjustment Perform this adjustment with no signal applied. (1) Set the STEREO VCO FREE-RUN MONITOR SWITCH pin “H” by connecting it to the VCC. (2) Measure the frequency of the STEREO LED DRIVER/STEREO VCO FREE-RUN MONITOR pin with a frequency counter, and adjust the variable resistor connected to the STEREO VCO SETTING pin for a measured frequency of 15.734 kHz ± 50 Hz. (3) Set the STEREO VCO FREE-RUN MONITOR SWITCH pin unconnected. 5.2 Filter Adjustment Perform this adjustment with the MATRIX MUTE pin “L” and the STEREO VCO FREE-RUN MONITOR SWITCH pin unconnected. (1) Short the capacitor across the PILOT DISCRIMINATION FILTER (PD1 and PD2) pins by connecting these pins together directly. (2) Apply a 15.734 kHz sin wave signal to the COMPOSITE SIGNAL INPUT pin at a level greater than 30 mVr.m.s. (100 mVr.m.s. is recommended). (3) Adjust the variable resistor connected to the FILTER ADJUSTMENT pin so that the AC output level at the RMS OFFSET ABSORPTION pin is minimized. This signal is best monitored through a band-pass filter (15.734 kHz). A recommended circuit is shown in 7. MEASURING CIRCUIT. (4) Disconnect the short circuit across the PILOT DISCRIMINATION FILTER (PD1 and PD2) pins after adjustment. 5.3 Separation Adjustment Perform this adjustment with the MATRIX MUTE pin “L”, the STEREO VCO FREE-RUN MONITOR SWITCH pin unconnected, and the F-MONAURAL SELECTION pin “H”. Verify that a L+R signal (100% modulation, 300 Hz, without noise reduction, pilot signal off) results in approximately 150 mVr.m.s. at the COMPOSITE SIGNAL INPUT pin, and that a pilot-only signal results in approximately 30 mVr.m.s. at the COMPOSITE SIGNAL INPUT pin. (1) Apply a composite signal (30% modulation, 300 Hz, L-only, with noise reduction) to the COMPOSITE SIGNAL INPUT pin. (2) Adjust the variable resistor connected to the WIDE-BAND RMS SETTING pin so that the output at the R CHANNEL OUTPUT pin is minimized. (3) Apply a composite signal (30% modulation, 3 kHz, L-only, with noise reduction) to the COMPOSITE SIGNAL INPUT pin. (4) Adjust the variable resistor connected to the SPECTRAL RMS SETTING pin so that the output at the R CHANNEL OUTPUT pin is minimized. (5) Repeat steps (1) and (2). Caution Be sure to perform step (5). 22 Data Sheet S11666EJ4V0DS00 µPC1876 5.4 SAP VCO Adjustment Perform this adjustment with the filter unless otherwise recommended. Be sure to adjust SAP VCO after 5.2. Filter adjustment. Usually, the filter and SAP VCO are adjusted simultaneously. For this reason, when this adjustment is performed, the applications of the SAP VCO SETTING pin and the FILTER ADJUSTMENT pin are modified to add variable resistor. (1) Input no signal to the COMPOSITE SIGNAL INPUT pin and measure the DC voltage of the SAP SINGLE OUTPUT pin. (2) Input SAP signal (5 fH, no modulation) to the COMPOSITE SIGNAL INPUT pin. Adjust the variable resistor connected to the SAP VCO SETTING pin so that the DC voltage of the SAP SINGLE OUTPUT pin may match with the DC voltage measured in step (1). 5.5 List of Pin Settings in Adjustment Pin Name Adjustment Stereo VCO Adjustment Filter Adjustment Separation Adjustment SAP VCO Adjustment SAP1/2 – – – – ST/SAP – – – – MUTE – L (OFF) L (OFF) L (OFF) FMONO – – H (OFF) – Remark –: Don’t care. Data Sheet S11666EJ4V0DS00 23 µPC1876 6. ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (TA = +25˚C) Parameter Supply voltage LED driver current Control pin voltage Symbol VCC ID Vcont Current fed into SAPL and STL pins Voltage applied to fHSW, SAP1/2, ST/SAP, MUTE and FMONO pins Voltage applied to COM pin TA = 75˚C, in using the Universal (10 × 10 cm2) Glass Epoxy Board VCC = 9 V Conditions Ratings 11 30 VCC + 0.2 Unit V mA V Input signal voltage Power dissipation Vin PD VCC 500 V mW Operating ambient temperature Storage temperature TA Tstg –20 to +75 –40 to +125 ˚C ˚C Caution If any of the parameters exceeds the absolute maximum ratings, even momentarily, the device reliability may be impaired. The absolute maximum ratings are values that may physically damage the product. Be sure to use the product within the ratings. Recommended Operating Conditions Parameter Supply voltage LED driver current Output load impedance 1 Symbol VCC ID RL1 Current fed into SAPL and STL pins A.C. load impedance which can drive output from ROT and LOT pins. (at 100% modulation) A.C. load impedance which can drive output from SOT pin. (at 100% modulation) Signal voltage applied to COM pin L + R signal (100% modulation) L – R signal (100% modulation) Pilot signal SAP signal Control pin voltage 1 (High) Control pin voltage 1 (Low) Control pin voltage 2 (High) Control pin voltage 2 (Mid.) Control pin voltage 2 (Low) VcontH1 VcontL1 VcontH2 VcontM2 VcontL2 FMONO pin SAP1/2, ST/SAP and MUTE pins 3.5 0 3.5 1.5 0 2 Conditions MIN. 8.0 TYP. 9.0 MAX. 10.0 25 Unit V mA kΩ Output load impedance 2 RL2 10 kΩ Input signal voltage Vin 0.424 Vp-p 0.848 Vp-p 0.0848 0.254 VCC 0.8 VCC 2.5 0.8 Vp-p Vp-p V V V V V 24 Data Sheet S11666EJ4V0DS00 µPC1876 Electrical Characteristics (TA = +25˚C, RH ≤ 70%, VCC = 9.0 V unless otherwise specified) (1/2) Parameter Supply current Stereo detection input sensitivity Stereo detection hysteresis Stereo detection capture range Symbol ICC STSENSE STHY CCH CCL SAP detection input sensitivity SAPSENSE No signal f = 15.734 kHz, sine wave Input stereo pilot signal only Vin = 30 mVr.m.s. Input stereo pilot signal only f = 78.67 kHz, 0% modulation Input SAP carrier only f = 78.67 kHz, 0% modulation Input SAP carrier only Input sine wave Frequency: noise BPF peak point Input sine wave Frequency: noise BPF peak point f = 300 Hz, 100% modulation f = 300 Hz, 100% modulation f = 300 Hz, 100% modulation f = 300 Hz, 100% modulation Noise reduction : OFF f = 300 Hz, 100% modulation Test conditions MIN. 19 9 5.0 2.5 –5.5 17 TYP. 27 13 7.5 4.0 –4.0 23 MAX. 38 18 10.0 5.5 –2.5 30 Unit mA mVr.m.s. dB % % mVr.m.s. SAP detection hysteresis SAPHY 3.3 4.8 6.3 dB Noise detection input sensitivity NOSENSE 21 30 40 mVr.m.s. Noise detection hysteresis NOHY 1.0 2.0 3.0 dB Monaural total output voltage Stereo total output voltage SAP total output voltage SAP single output voltage VOMO VOST VOSAP1 VOSAP2 450 450 400 450 500 500 500 500 550 550 600 550 mVr.m.s. mVr.m.s. mVr.m.s. mVr.m.s. Difference between monaural L and R output voltage Monaural total frequency characteristics 1 Monaural total frequency characteristics 2 Monaural total frequency characteristics 3 Monaural total frequency characteristics 4 Stereo total frequency characteristics 1 Stereo total frequency characteristics 2 Stereo total frequency characteristics 3 Stereo total frequency characteristics 4 SAP total frequency characteristics 1 SAP total frequency characteristics 2 SAP total frequency characteristics 3 VOLR –0.5 0 +0.5 dB VOMO1 f = 1 kHz, 30% modulation (f = 300 Hz : 0 dB) f = 3 kHz, 30% modulation (f = 300 Hz : 0 dB) f = 8 kHz, 30% modulation (f = 300 Hz : 0 dB) f = 12 kHz, 30% modulation (f = 300 Hz : 0 dB) f = 1 kHz, 30% modulation (f = 300 Hz : 0 dB) f = 3 kHz, 30% modulation (f = 300 Hz : 0 dB) f = 8 kHz, 30% modulation (f = 300 Hz : 0 dB) f = 12 kHz, 30% modulation (f = 300 Hz : 0 dB) f = 1 kHz, 30% modulation (f = 300 Hz : 0 dB) f = 3 kHz, 30% modulation (f = 300 Hz : 0 dB) f = 8 kHz, 30% modulation (f = 300 Hz : 0 dB) –0.5 0 +0.5 dB VOMO2 –0.5 0 +0.5 dB VOMO3 –0.8 0 +0.8 dB VOMO4 –3.0 –1.5 –0.5 dB VOST1 –0.5 0 +0.5 dB VOST2 –0.5 0 +0.5 dB VOST3 –1.7 –0.8 +0.1 dB VOST4 –6.0 –4.0 –2.5 dB VOSAP11 –1.2 +0.3 +1.2 dB VOSAP12 –0.6 +0.5 +1.6 dB VOSAP13 –2.5 –0.5 +1.5 dB Data Sheet S11666EJ4V0DS00 25 µPC1876 (2/2) Parameter SAP single frequency characteristics 1 Symbol VOSAP21 Test conditions f = 1 kHz, 30% modulation (f = 300 Hz : 0 dB) Noise reduction : OFF f = 3 kHz, 30% modulation (f = 300 Hz : 0 dB) Noise reduction : OFF f = 8 kHz, 30% modulation (f = 300 Hz : 0 dB) Noise reduction : OFF f = 300 Hz, 30% modulation f = 1 kHz, 30% modulation f = 3 kHz, 30% modulation f = 1 kHz, 100% modulation f = 1 kHz, 100% modulation f = 8 kHz, 30% modulation f = 1 kHz, 100% modulation f = 1 kHz, 100% modulation, Noise reduction : OFF SAP: f = 3 kHz, 30% modulation Stereo: L-only, f = 800 Hz, 30% modulation SAP: f = 800 Hz, 30% modulation Stereo: L-only, f = 3 kHz, 30% modulation f = 1 kHz, 100% modulation ID = 10 mA Current flowing into STI, WTI pins Mute → Monaural No signals Mute → Stereo Input pilot signal only Mute → SAP1 Input 5fH signal only f = 300 Hz, 100% modulation Pre-emphasis : ON f = 300 Hz, 100% modulation Noise reduction : ON 1.5 V pin DCO pin, I = 1 mA MIN. –0.5 TYP. 0 MAX. +0.5 Unit dB SAP single frequency characteristics 2 VOSAP22 –0.5 0 +0.5 dB SAP single frequency characteristics 3 VOSAP23 –1.0 0 +1.0 dB Stereo channel separation 1 Stereo channel separation 2 Stereo channel separation 3 Monaural total distortion rate Stereo total distortion rate 1 Stereo total distortion rate 2 SAP total distortion rate SAP single distortion rate Sep1 Sep2 Sep3 THDMO THDST1 THDST2 THDSAP1 THDSAP2 27 25 27 – – – – – 32 30 35 0.1 0.3 0.8 0.5 0.7 – – – 0.5 1.5 1.8 2.0 2.0 dB dB dB % % % % % Cross talk 1 SAP → stereo CT1 – –60 –50 dB Cross talk 2 stereo → SAP CT2 – –60 –50 dB Total muting level LED driver saturation voltage dbx timing current Inter-mode DC offset 1 Mute VOSAT IT VDOF1 60 – 7.1 –50 70 0.1 7.5 0 – 0.3 7.9 +50 dB V µA mV Inter-mode DC offset 2 VDOF2 –50 0 +50 mV Inter-mode DC offset 3 VDOF3 –50 0 +50 mV Monaural total S/N S/NMO 65 68 – dB Stereo total S/N SAP total S/N Reference voltage DC output saturation voltage S/NST S/NSAP Vref VOSAT2 65 70 1.35 – 68 80 1.50 0.1 – – 1.65 0.3 dB dB V V 26 Data Sheet S11666EJ4V0DS00 µPC1876 Electrical Characteristics Measurement List (TA = +25˚C, RH ≤ 70%, VCC = 9.0 V) (1/6) Parameter Supply current Stereo detection input sensitivity Stereo detection hysteresis Symbol ICC STSENSE Current flowing to VCC pin (no signal). Input signal (f = 15.734 kHz) to COM pin. Raise input voltage gradually until stereo LED turns ON. Then measure input voltage of COM pin. Input signal (f = 15.734 kHz) to COM pin for stereo LED to be ON. Lower input voltage gradually until stereo LED turns OFF. Then assume input voltage “V”. STSENSE STHY = 20 log V Input signal (f = 14.5 kHz, Vin = 0.0848 Vp-p [30 mVr.m.s.]) to COM pin. Raise input frequency gradually until stereo LED turns ON. Then assume input frequency “fin1”. 15.734 [kHz] – fin1 CC = 15.734 [kHz] Next, input signal (f = 17.0 kHz, Vin = 0.0848 Vp-p [30 mVr.m.s.]) to COM pin. Lower input frequency gradually until stereo LED turns ON. Then assume input frequency “fin2”. fin2 – 15.734 [kHz] CC = 15.734 [kHz] Input signal (f = 78.67 kHz, no modulation) to COM pin. Raise input voltage gradually until SAP LED turns ON. Then measure input volage of COM pin. SAPHY Input signal (f = 78.67 kHz, no modulation) to COM pin for SAP LED to be ON. Lower input voltage gradually until SAP LED turns OFF. Then assume input voltage “V”. SAPSENSE SAPHY = 20 log V Apply 6.0 V to SDT pin. Input signal (f = 160 kHz, Vin = 10 mVr.m.s.) to COM pin. Raise frequency and measure the DC voltage of NDT pin. At maximum voltage, raise input voltage gradually until SAP LED turns OFF. Then measure input voltage of COM pin. Apply 6.0 V to SDT pin. Input signal (f = 160 kHz, Vin = 90 mVr.m.s.) to COM pin. Raise frequency and measure the DC voltage of NDT pin. At maximum voltage, lower input voltage gradually until SAP LED turns ON. Then assume input voltage of COM pin “V”. NOSENSE NOHY = 20 log V Set MUTE and FMONO pins to “L”. Input monaural signal (100% modulation, f = 300 Hz) to COM pin. Measure output voltage of ROT pin. Execute the same operation for LOT pin. Set ST/SAP and FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (100% modulation, f = 300 Hz) to COM pin. Measure output voltage of LOT pin. Execute the same operation for ROT pin (R-only signal). Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (100% modulation, f = 300 Hz) to COM pin. Measure output voltage of ROT pin. Execute the same operation for LOT pin. Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (100% modulation, f = 300 Hz) to COM pin. Measure output voltage of SOT pin. (Noise reduction : OFF) Measurement STHY Stereo detection capture range CC SAP detection input sensitivity SAP detection hysteresis SAPSENSE Noise detection input sesitivity NOSENSE Noise detection hysteresis NOHY Monaural total output voltage VOMO Stereo total output voltage VOST SAP total output voltage VOSAP1 SAP single output voltage VOSAP2 Data Sheet S11666EJ4V0DS00 27 µPC1876 (2/6) Parameter Difference between monaural L and R output voltage Symbol VOLR Measurement Set MUTE and FMONO pin to “L”. Input monaural signal (100% modulation, f = 300 Hz) to COM pin. Measure output voltage of ROT and LOT pin. Assume the output voltage of ROT pin “VROT” and the output voltage of LOT pin “VLOT”. VROT VOLR = 20 log VLOT Set MUTE and FMONO pins to “L”. Input monaural signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of ROT pin “V300(MO)”. Input monaural signal (30% modulation, f = 1 kHz) to COM pin. Assume output voltage of ROT pin “V1k(MO)”. V1k(MO) VOMO1 = 20 log V300(MO) Execute the same operation for LOT pin. Set MUTE and FMONO pins to “L”. Input monaural signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of ROT pin “V300(MO)”. Input monaural signal (30% modulation, f = 3 kHz) to COM pin. Assume output voltage of ROT pin “V3k(MO)”. V3k(MO) VOMO2 = 20 log V300(MO) Execute the same operation for LOT pin. Set MUTE and FMONO pins to “L”. Input monaural signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of ROT pin “V300(MO)”. Input monaural signal (30% modulation, f = 8 kHz) to COM pin. Assume output voltage of ROT pin “V8k(MO)”. V8k(MO) VOMO3 = 20 log V300(MO) Execute the same operation for LOT pin. Set MUTE and FMONO pins to “L”. Input monaural signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of ROT pin “V300(MO)”. Input monaural signal (30% modulation, f = 12 kHz) to COM pin. Assume output voltage of ROT pin “V12k(MO)”. V12k(MO) VOMO4 = 20 log V300(MO) Execute the same operation for LOT pin. Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(ST)”. Input L-only signal (30% modulation, f = 1 kHz) to COM pin. Assume output voltage of LOT pin “V1k(ST)”. V1k(ST) VOST1 = 20 log V300(ST) Execute the same operation for ROT pin (R-only signal). Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(ST)”. Input L-only signal (30% modulation, f = 3 kHz) to COM pin. Assume output voltage of LOT pin “V3k(ST)”. V3k(ST) VOST2 = 20 log V300(ST) Execute the same operation for ROT pin (R-only signal). Monaural total frequency characteristics 1 VOMO1 Monaural total frequency characteristics 2 VOMO2 Monaural total frequency characteristics 3 VOMO3 Monaural total frequency characteristics 4 VOMO4 Stereo total frequency characteristics 1 VOST1 Stereo total frequency characteristics 2 VOST2 28 Data Sheet S11666EJ4V0DS00 µPC1876 (3/6) Parameter Stereo total frequency characteristics 3 Symbol VOST3 Measurement Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(ST)”. Input L-only signal (30% modulation, f = 8 kHz) to COM pin. Assume output voltage of LOT pin “V8k(ST)”. V8k(ST) VOST3 = 20 log V300(ST) Execute the same operation for ROT pin (R-only signal). Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(ST)”. Input L-only signal (30% modulation, f = 12 kHz) to COM pin. Assume output voltage of LOT pin “V12k(ST)”. V12k(ST) VOST4 = 20 log V300(ST) Execute the same operation for ROT pin (R-only signal). Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 1 kHz) to COM pin. Assume output voltage of LOT pin “V1k(SAP)”. V1k(SAP) VOSAP11 = 20 log V300(SAP) Execute the same operation for ROT pin. SAP total frequency characteristics 2 VOSAP12 Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 3 kHz) to COM pin. Assume output voltage of LOT pin “V3k(SAP)”. V3k(SAP) VOSAP12 = 20 log V300(SAP) Execute the same operation for ROT pin. Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of LOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 8 kHz) to COM pin. Assume output voltage of LOT pin “V8k(SAP)”. V8k(SAP) VOSAP13 = 20 log V300(SAP) Execute the same operation for ROT pin. Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of SOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 1 kHz) to COM pin. Assume output voltage of SOT pin “V1k(SAP)”. V1k(SAP) VOSAP21 = 20 log V300(SAP) (Noise reduction OFF) Stereo total frequency characteristics 4 VOST4 SAP total frequency characteristics 1 VOSAP11 SAP total frequency characteristics 3 VOSAP13 SAP single frequency characteristics 1 VOSAP21 Data Sheet S11666EJ4V0DS00 29 µPC1876 (4/6) Parameter SAP single frequency characteristics 2 Symbol VOSAP22 Measurement Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of SOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 3 kHz) to COM pin. Assume output voltage of SOT pin “V3k(SAP)”. V3k(SAP) VOSAP22 = 20 log V300(SAP) (Noise reduction OFF) Input SAP signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of SOT pin “V300(SAP)”. Input SAP signal (30% modulation, f = 8 kHz) to COM pin. Assume output voltage of SOT pin “V8k(SAP)”. V8k(SAP) VOSAP23 = 20 log V300(SAP) (Noise reduction OFF) Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 300 Hz) to COM pin. Assume output voltage of ROT pin “VROT” and output voltage of LOT pin “VLOT”. VLOT VROT Execute the same operation for R-only signal. (Sound multiplex signal generator: 465Z (manufactured by EIDEN Co. Ltd.)) Sep1 = 20 log Stereo channel separation 2 Sep2 Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 1 kHz) to COM pin. Assume output voltage of ROT pin “VROT” and output voltage of LOT pin “VLOT”. VLOT Sep2 = 20 log VROT Execute the same operation for R-only signal. (Sound multiplex signal generator: 465Z (manufactured by EIDEN Co. Ltd.)) Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (30% modulation, f = 3 kHz) to COM pin. Assume output voltage of ROT pin “VROT” and output voltage of LOT pin “VLOT”. VLOT Sep3 = 20 log VROT Execute the same operation for R-only signal. (Sound multiplex signal generator: 465Z (manufactured by EIDEN Co. Ltd.)) Set MUTE and FMONO pins to “L”. Input monaural signal (100% modulation, f = 1 kHz) to COM pin. Measure output distortion rate of ROT and LOT pin. Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (100% modulation, f = 1 kHz) to COM pin. Measure output distortion rate of LOT pin. Execute the same operation for R-only signal (ROT pin). Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (100% modulation, f = 8 kHz) to COM pin. Measure output distortion rate of LOT pin. Execute the same operation for R-only signal (ROT pin). Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (100% modulation, f = 1 kHz) to COM pin. Measure output distortion rate of ROT and LOT pin. SAP single frequency characteristics 3 VOSAP23 Stereo channel separation 1 Sep1 Stereo channel separation 3 Sep3 Monaural total distortion rate THDMO Stereo total distortion rate 1 THDST1 Stereo total distortion rate 2 THDST2 SAP total distortion rate THDSAP1 30 Data Sheet S11666EJ4V0DS00 µPC1876 (5/6) Parameter SAP single distortion rate Symbol THDSAP2 Measurement Set FMONO pin to “H” and SAP1/2, ST/SAP, MUTE pins to “L”. Input SAP signal (100% modulation, f = 1 kHz) to COM pin. Measure output distortion rate of SOT pin. (nosie reduction OFF) Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input L-only signal (f = 800 Hz, 30% modulation) and SAP signal (f = 3 kHz, 30% modulation) to COM pin. Assume output voltage of the LOT pin “VLOT”. Connect LOT pin to 3 kHz BPF (gain = 0 dB at f = 3 kHz, –80 dB or more at f = 800 Hz) to LOT pin. Assume output voltage of BPF “VLOTCT1”. VLOTCT1 CT1 = 20 log VLOT Set SAP1/2, ST/SAP pins to “L” and FMONO pin to “H”. Input L-only signal (f = 3 kHz, 30% modulation) and SAP signal (f = 800 Hz, 30% modulation) to COM pin. Assume output voltage of the LOT pin “VLOT”. Connect LOT pin to 3 kHz BPF (gain = 0 dB at f = 3 kHz, –80 dB or more at f = 800 Hz) to LOT pin. Assume output voltage of BPF “VLOTCT2”. VLOTCT2 CT2 = 20 log VLOT Set MUTE and FMONO pins to “L”. Input monaural signal (100% modulation, f = 1 kHz) to COM pin. Assume output voltage of ROT pin “VOMO”. Set FMONO pin to “H”. Assume output voltage of ROT pin “VMUTE”. VOMO Mute = 20 log VMUTE Execute the same operation for LOT and NOT pins. Apply current (10 mA) to SAPL, STL pins, and measure input voltage of the pin. Cross talk 1 SAP → stereo CT1 Cross talk 2 stereo → SAP CT2 Total muting level Mute LED driver saturation voltage dbx timing current Inter-mode DC offset 1 mute → monaural VOSAT IT VDOF1 Input DC voltage (6 V) to STI and WTI pins, and measure current of the pin. Set FMONO pin to “L”. Apply DC 1 V to fHSW pin and DC 6 V to SDT pin. Set MUTE pin to “H”. Assume output voltage of ROT pin “VMU”. Next, input no signal to COM pin to change MUTE pin to “L”. Assume output voltage of ROT pin “VMO”. VDOF1 = VMO – VMU Execute the same operation for LOT pin. Inter-mode DC offset 2 mute → stereo VDOF2 Set ST/SAP, FMONO pins to “H”. Apply DC 1 V to fHSW pin and DC 6 V to SDT pin. Set MUTE pin to “H”. Assume output voltage of ROT pin “VMU”. Next, input pilot signal to COM pin to change MUTE pin to “L”. Assume output voltage of ROT pin “VST”. VDOF2 = VST – VMU Execute the same operation for LOT pin. Set FMONO pin to “H” and SAP1/2, ST/SAP pins “L”. Apply DC 1 V to fHSW pin and DC 6 V to SDT pin. Set MUTE pin to “H”. Assume output voltage of ROT pin “VMU”. Next, input 5fH signal to COM pin to change MUTE pin to “L”. Assume output voltage of ROT pin “VSAP”. VDOF3 = VSAP – VMU Execute the same operation for LOT pin. Inter-mode DC offset 3 mute → SAP VDOF3 Data Sheet S11666EJ4V0DS00 31 µPC1876 (6/6) Parameter Monaural total S/N Symbol S/NMO Measurement Set MUTE and FMONO pins to “L”. Input no signal to COM pin, and assume output voltage of ROT pin “VNMO”. Input monaural signal (100% modulation, f = 300 Hz) to COM pin, and assume output voltage of ROT pin “VSMO”. VSMO S/NMO = 20 log VNMO Execute the same operation for LOT pin. Set ST/SAP, FMONO pins to “H” and MUTE pin to “L”. Input pilot signal to COM pin, and assume output voltage of ROT pin “VNST”. Input stereo signal (100% modulation, f = 300 Hz) to COM pin, and assume output voltage of ROT pin “VSST”. VSST S/NST = 20 log VNST Execute the same operation for LOT pin. Set FMONO pin to “H” and SAP1/2, ST/SAP pins to “L”. Input 5fH signal to COM pin, and assume output voltage of ROT pin “VNSAP”. Input SAP signal (100% modulation, f = 300 Hz) to COM pin, and assume output voltage of ROT pin “VSSAP”. VSSAP S/NSAP = 20 log VNSAP Execute the same operation for LOT pin. Measure DC voltage of 1.5 V pin. Apply flowing current (1 mA) to DCO pin and measure DC voltage of DCO pin. Stereo total S/N S/NST SAP total S/N S/NSAP Reference voltage DC saturation voltage Vref VOSAT2 32 Data Sheet S11666EJ4V0DS00 µPC1876 Measuring Circuit Mode Table (1/2) User ModeNote Item S1 S2 Supply current Stereo detection input sensitivity Stereo detection hysteresis Stereo detection capture range – – – – ST SA – ST ST ST Mute – OFF OFF OFF Measuring F-Monaural – OFF OFF OFF AC voltmeter f-counter AC voltmeter Sin wave SG Equipment DC ammeter AC voltmeter SG/MODE No signal Pilot SAP detection input sensitivity SAP detection hysteresis Noise detection input sensitivity Noise detection hysteresis Monaural total output voltage Stereo total output voltage SAP total output voltage SAP single output voltage Difference between monaural L and R output voltages Monaural total frequency characteristics 1 Monaural total frequency characteristics 2 Monaural total frequency characteristics 3 Monaural total frequency characteristics 4 Stereo total frequency characteristics 1 Stereo total frequency characteristics 2 Stereo total frequency characteristics 3 Stereo total frequency characteristics 4 SAP total frequency characteristics 1 SAP total frequency characteristics 2 SAP total frequency characteristics 3 SAP single frequency characteristics 1 SAP single frequency characteristics 2 SAP single frequency characteristics 3 Stereo channel separation 1 Stereo channel separation 2 Stereo channel separation 3 Monaural total distortion rate Stereo total distortion rate 1 Stereo total distortion rate 2 SAP total distortion rate SAP single distortion rate – – – – – – S1 – – SA SA SA SA – ST SA SA – OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF – OFF OFF OFF – SAP AC voltmeter DC voltmeter AC voltmeter Sin wave SG Monaural Stereo SAP SAP (NR OFF) Monaural – – – – – – – – S1 S1 S1 – – – – – – – – – S1 – – – – – ST ST ST ST SA SA SA SA SA SA ST ST ST – ST ST SA SA OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF – – – – OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF – OFF OFF OFF OFF AC voltmeter Monaural AC voltmeter L-only R-only AC voltmeter SAP AC voltmeter SAP (NR OFF) AC voltmeter L-only R-only Distortion meter Monaural Stereo SAP SAP (NR OFF) Note ST: Stereo, SA: SAP, S1: SAP1, S2: SAP2, –: free Data Sheet S11666EJ4V0DS00 33 µPC1876 (2/2) User Item S1 S2 Cross talk 1 SAP → Stereo Cross talk 2 Stereo → SAP Total muting level – ST SA ST Mute OFF ModeNote Measuring F-Monaural OFF Equipment AC voltmeter SG/MODE Stereo SAP S1 SA OFF OFF – – ON OFF OFF – AC voltmeter Monaural LED driver saturation voltage – – OFF DC voltmeter Stereo SAP No signal No signal dbx timing current Inter-mode DC offset 1 Mute → monaural Inter-mode DC offset 2 Mute → stereo Inter-mode DC offset 3 Mute → SAP Monaural total S/N Stereo total S/N SAP total S/N – – – – OFF ON OFF ON OFF ON OFF OFF OFF OFF OFF – DC ammeter DC voltmeter – ST OFF Pilot S1 SA OFF 5fH signal – – S1 – ST SA – OFF OFF AC voltmeter No signal Pilot SAP Note ST: Stereo, SA: SAP, S1: SAP1, S2: SAP2, –: free 34 Data Sheet S11666EJ4V0DS00 µPC1876 7. MEASURING CIRCUIT VCC (9 V) + 100 µF 0.1 µ F fH GND µ PC842C 2/2 10 kΩ + + – 1 MΩ 10 kΩ 10 µF 6.8 kΩ 4 6 1 kΩ ST 22 23 24 21 20 19 18 17 16 15 SAP 1 kΩ Note 1 3 2 1 20 kΩ 10 µF 3.3 µF + 51 kΩ + ∗∗ ∗∗ 100 kΩ 2.2 kΩ 6.8 kΩ 25 Note 2 30 kΩ + 10 µF 91 kΩ – 26 27 28 29 30 31 IC Rch Lch + 10 µF 10 µF 1 µF 0.1 µ F 22 µF 1.5 V pin ∗33 kΩ 10 kΩ ∗33 kΩ ∗47 kΩ 20 kΩ 0.1 µ F + 1 kΩ + 4.7 µF 1 µF 32 33 34 35 36 37 38 39 40 41 42 50 kΩ 51 kΩ ∗56 k Ω 14 ∗56 k Ω 1 µF 5.1 k Ω 13 3 kΩ + 1 µF 12 + 11 10 9 8 7 6 5 4 3 2 1 + + 0.047 µF 0.01 µ F 0.1 µF 68 kΩ 0.47 µF 0.1 µF µ PC842C 1/2 + 0.1 µF 47 µ F + + 10 µF 3 kΩ + + + 465Z (manufactured by EIDEN Co. Ltd.) ATT OUT SG GND 2.2 µ F 20 kΩ Notes 1. Filter: 126XGS-7990Z, manufactured by Toko Co. Ltd. 2. Do not leave the Internally Connected (IC) pin open because it is a base-open pin. Connect this pin to VCC or GND. Remark Use the following for external parts. Resistor (∗) : Metal film resistor (± 1%). Unless otherwise specified; ± 5% Capacitors (∗∗) : Tantalum capacitor (± 10%). Unless otherwise specified; ± 20% Variable resistors: ± 10% Data Sheet S11666EJ4V0DS00 35 µPC1876 8. DIFFERENCES BETWEEN THE µPC1876GT AND µPC1872GT µPC1876GT Stereo VCO adjustment external resistor µPC1872GT 38 38 47 kΩ ±1% 43 kΩ ±1% 20 kΩ ±10% Stereo VCO adjustment 20 kΩ ±10% Stereo VCO adjustment Filter adjustment input frequency Filter adjustment external resistor 15.734 kHz (= fH) 16.5 kHz 36 33 kΩ ±1% 37 33 kΩ ±1% 33 kΩ ±1% 36 37 30 kΩ ±1% 10 kΩ ±10% Filter adjustment 10 kΩ ±10% Filter adjustment MIN. Stereo total frequency chatacteristics 3 At f = 8 kHz Stereo total frequency chatacteristics 4 At f = 12 kHz SAP total frequency chatacteristics 2 At f = 3 kHz SAP total frequency chatacteristics 3 At f = 8 kHz –2.5 –0.6 –6.0 –1.7 TYP. –0.8 MAX. +0.1 Unit dB MIN. –0.9 TYP. 0.0 MAX. +0.9 Unit dB –4.0 –2.5 dB –5.0 –2.5 –1.0 dB +0.5 +1.6 dB –0.3 +0.8 +1.9 dB –0.5 +1.5 dB –1.0 +1.0 +3.0 dB 36 Data Sheet S11666EJ4V0DS00 µPC1876 9. PACKAGE DRAWING 42-PIN PLASTIC SSOP (9.53 mm (375)) 42 22 detail of lead end P 1 A 21 F H G I J S C D E NOTE N M M S B K L Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition. ITEM A B C D E F G H I J K L M N P MILLIMETERS 18.16 MAX. 1.13 MAX. 0.8 (T.P.) 0.35+ 0.10 − 0.05 0.125 ± 0.075 2.9 MAX. 2.5 ± 0.2 10.3 ± 0.3 7.15 ± 0.2 1.6 ± 0.2 0.15+ 0.10 − 0.05 0.8 ± 0.2 0.10 0.10 3° +7° −3° S42GT-80-375B-2 Data Sheet S11666EJ4V0DS00 37 µPC1876 10. RECOMMENDED SOLDERING CONDITIONS This product should be soldered and mounted under the conditions recommended in the table below. For details of recommended soldering conditions, refer to the information document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than those recommended below, contact an NEC sales representative. Table 10-1. Surface Mounting Type Soldering Conditions µPC1876GT: 42-pin plastic SSOP (9.53 mm (375)) Soldering Method Infrared reflow Soldering Conditions Package peak temperature: 235°C, Duration: 30 sec. max. (at 210°C or above), Number of times: 3 times max. VPS Package peak temperature: 215°C, Duration: 40 sec. max. (at 200°C or above), Number of times: 3 times max. Wave soldering Solder bath temperature: 260°C max., Duration: 10 sec. max., Number of times: Once, Preliminary heat temperature: 120°C max. (package surface temperature) Partial heating Pin temperature: 300°C max., Duration: 3 sec. max. (per pin row) — WS60-00-1 VP15-00-3 Symbol IR35-00-3 Caution Do not use different soldering methods together (except in the case of partial heating). 38 Data Sheet S11666EJ4V0DS00 µPC1876 [MEMO] Data Sheet S11666EJ4V0DS00 39 µPC1876 • The information in this document is current as of May, 2000. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. 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(Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above). M8E 00. 4