SM5865BM

ΣDECO SM5865BM NIPPON PRECISION CIRCUITS INC. D/A Converter for Digital Audio OVERVIEW The SM5865BM is a 24-bit input D/A converter for digital audio equipment. It comprises newly developed DEM (dynamic element matching) circuits, 3rd-order Σ∆ noise shaper and 23-level quantizer to control wide-band residual quantization noise in the signal band, making it ideal for application with high-frequency sampling formats. Also, the order of the required final-stage analog lowpass filter can be reduced, compared to filters for available devices, enhancing output tone quality. The output stage employs complementary outputs for high-accuracy analog signals, with appropriate lowpass filtering of the output signal. A single SM5865BM IC can be used in combination with an 8-times oversampling digital filter for conversion for a single audio channel. PINOUT (Top view) DVSS DI BCKI WCKI IWSL RSTN TSTN TO DVDD CKI CKDVN CVSS 1 24 AVSSA RAP IOUTA IOUTAN RAN AVDDA AVDDB RBP IOUTB IOUTBN RBN S M 5 8 6 5 BM 12 13 FEATURES s s AVSSB s s s s s s Single-channel D/A converter built-in High performance • 0.0004% total harmonic distortion and noise • 114 dB dynamic range • 117 dB signal-to-noise ratio Σ∆ D/A converter • 3rd-order noise shaper • 23-level quantizer Input data format • 20 or 24-bit word length • MSB first, right-justified format • 8 or 4 times oversampling at fs = 16/32/44.1/48/ 88.2/96/176.4/192 kHz System clock frequency • 192/256/384/512/768/1024 fs Single 5 V operating supply voltage 24-pin SSOP package Molybdenum-gate CMOS process PACKAGE DIMENSIONS (Unit: mm) 24-pin SSOP 5.40 0.20 7.80 0.30 10.05 0.20 10.20 0.30 0.15 − 0.0 + 0.1 5 ORDERING INFORMATION 0.10 0.10 +0.20 1.90−0.10 D e vice SM5865BM P ackag e 24-pin SSOP 0.8 0.36 0.10 0.10 1.80 0.12 M 0.50 0.20 0 10 NIPPON PRECISION CIRCUITS—1 S M5865BM BLOCK DIAGRAM TO 8 TSTN 7 RSTN 6 IWSL 5 WCKI 4 BCKI 3 DI 2 Input interface 9 DVDD CKI CKDVN CVSS 10 11 12 Divider Timing control Interpolation 1 DVSS Noise shaper Noise shaper AVSSB 13 24 23 Level DEM DAC 23 Level DEM DAC 23 Level DEM DAC 23 Level DEM DAC AVSSA 14 RBN 15 IOUTBN 16 IOUTB 17 RBP 18 AVDDB 19 AVDDA 20 RAN 21 IOUTAN 22 IOUTA 23 RAP NIPPON PRECISION CIRCUITS—2 S M5865BM PIN DESCRIPTION Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 IP : P ull-up input Name DV S S DI BCKI WCKI IWSL RSTN TSTN TO DV D D CKI C K DV N CVSS AV S S B RBN IOUTBN IOUTB RBP AV D D B AV D D A RAN I O U TA N I O U TA RAP AV S S A I/O – I I I Ip Ip Ip O – I Ip – – I O O I – – I O O I – Digital ground Data input Bit clock input W ord clock input Input data word length select. 24-bit when HIGH, and 20-bit when LOW . System reset. Reset when LOW . Test pin. Tie HIGH or leave open for normal operation. Test output Digital supply System clock input System clock frequency divider ratio select. 1 when HIGH (no division), and 2 when LOW . System clock ground Analog ground B Built-in resistor connection B Inverse-phase analog output B In-phase analog output B Built-in resistor connection B Analog supply B Analog supply A Built-in resistor connection A Inverse-phase analog output A In-phase analog output A Built-in resistor connection A Analog ground A Description NIPPON PRECISION CIRCUITS—3 S M5865BM SPECIFICATIONS Absolute Maximum Ratings DVSS = AVSSA = AVSSB = CVSS = 0 V, DVDD = AVDDA = AVDDB P arameter S upply voltage range Input voltage range 1 Storage temperature range Pow er dissipation 1 . Pins DI, BCKI, W C K I , C K DVN, IWSL, RSTN, T S T N . Also applicable during supply switching. Symbol DV D D , AV D D A , AV D D B V IN T s tg PD Rating −0 .3 to 7.0 D V S S − 0 .3 to DV D D + 0 .3 −5 5 to 125 2 50 Unit V V °C mW Recommended Operating Conditions DVSS = AVSSA = AVSSB = CVSS = 0 V, DVDD = AVDDA = AVDDB P arameter S upply voltage range Symbol DV D D , AV D D A , AV D D B DV D D − AV D D A , DV D D − A V D D B , AV D D A − AV D D B , DV S S − AV S S A , DV S S − AV S S B , AV S S A − AV S S B , DV S S − C V S S , AV S S A − C V S S , AV S S B − C V S S T o pr Rating 4 .5 to 5.5 Unit V Supply voltage variation ± 0.1 V Operating temperature range −4 0 to 85 °C NIPPON PRECISION CIRCUITS—4 S M5865BM DC Electrical Characteristics Recommended operating conditions, unless otherwise specified. Rating P arameter Symbol Condition min fC K I = 1 1.2896 MHz D V D D, AV D D A, AV D D B supply current 1 ID D fC K I = 1 6.9344 MHz fC K I = 2 4.576 MHz fC K I = 3 6.864 MHz CKI HIGH-level input voltage CKI LOW -level input voltage CKI input voltage HIGH-level input L O W -level input voltage 2 voltage 2 voltage 3 voltage 3 V IHC V I LC V I N AC V IH V IL VOH VOL II H C II LC II L2 current 5 current 5 current 6 II H1 II L1 II H2 I O H = −1 m A IO L = 1 m A V I N = DV D D V IN = 0 V V IN = 0 V V I N = DV D D V IN = 0 V V I N = DV D D A C coupling – – – – 0 .7V D D – 1.0 2 .4 – DV D D − 0 .4 – 30 30 – – – – typ 6 9 12 18 – – – – – – – 60 60 9 – – – max 10 13 16 23 – 0.3V D D – – 0.5 – 0.4 120 120 18 1.0 1.0 1.0 mA mA mA mA V V Vp-p V V V V µA µA µA µA µA µA Unit HIGH-level output L O W -level output CKI HIGH-level input current CKI LOW -level input current L O W -level input current 4 HIGH-level input leakage L O W -level input leakage HIGH-level input leakage 1. 2. 3. 4. 5. 6. No output load, NPC-standard input data pattern. Pins DI, BCKI, W C K I , C K DVN, IWSL, RSTN, T S T N . Pin TO . Pins CKDVN, IWSL, RSTN, T S T N . Pins DI, BCKI, W C K I . Pins CKDVN, IWSL, RSTN, T S T N . NIPPON PRECISION CIRCUITS—5 S M5865BM AC Electrical Characteristics System clock Input (CKI) Rating P arameter C KI clock frequency HIGH-level clock pulsewidth L O W -level clock pulsewidth Symbol min fC K I tC W H tC W L 5 5 5 typ – – – max 60 – – MHz ns ns Unit 1/f CKI CKI t CWL t CWH VIHC 0.5VDD VILC Internal System Clock Rating P arameter I nternal system clock frequency Symbol fS Y S Condition min 5 typ – max 46 MHz Unit I nternal system clock frequency is the same as the CKI clock frequency when CKDVN = HIGH. Internal system clock frequency is half the CKI clock frequency when CKDVN = LOW . Reset Input (RSTN) Rating P arameter Symbol Condition min A t pow er ON R S T N L OW -level pulsewidth tR S T N After pow er ON 1 100 typ – – max – – µs ns Unit NIPPON PRECISION CIRCUITS—6 S M5865BM Serial input (BCKI, DI, WCKI) Rating P arameter B CKI HIGH-level pulsewidth B C K I L OW -level pulsewidth BCKI pulse cycle DI setup time DI hold time WCKI edge to first BCKI rising edge Last BCKI rising edge to W C K I e d g e Symbol min tB C W H tB C W L tB C Y tD S tD H tW B tB W 10 10 22 5 5 10 10 typ – – – – – – – max – – – – – – – ns ns ns ns ns ns ns Unit BCKI t BCWH DI t DS WCKI t WB t BW t DH t BCY t BCWL 1.5V 1.5V 1.5V NIPPON PRECISION CIRCUITS—7 S M5865BM AC Analog Characteristics Measurement Conditions External 8fs digital filter External operational amplifier Supply voltage : NPC SM5847AF : JRC NJM5534D : + 3V : ± 15V : 25 °C : 48kHz sampling (fs), 24-bit data : 24.576MHz (512fs) 64fs : Audio Precision System Two (RMS mode) : THD + N : D.R : S/N 22HzHPF, 20kHzLPF (FLP-A20K) 22HzHPF, 22kHzLPF, A-weight (FIL-AWT) 22HzHPF, 22kHzLPF, A-weight (FIL-AWT) SM5865BM : DVDD = AVDDA = AVDDB = 5V, DVSS = AVSSA = AVSSB = CVSS = 0V SM5847AF NJM5534D Ambient temperature Input data of SM5847AF System clock Noise shaper operating rate Audio analyzer Measurement filter condition Measurement circuits diagram : See next page. Analog Characteristics Rating P arameter Output level 1 Total harmonic distortion Dynamic range Signal-to-noise ratio Gain drift Symbol V out THD + N D.R S/N G.D Condition min 1 kHz, 0 dB 1 kHz, 0 dB 1 kHz, −60 dB 1 kHz, 0/ −∞ d B 1.22 – 108 114 – typ 1.27 0.0004 (− 1 08dB) 114 117 10 max 1.32 0.0009 (− 1 01dB) – – – Vr m s % dB dB ppm/ °C Unit 1. V O U T i s the output level of the first I–V conversion stage. Group Delay Rating P arameter Group delay 1 Symbol T gd Condition min – typ – max 2/fsi s Unit 1. fsi is the input sampling rate of S M 5 8 6 5 B M . For example, fsi is 384kHz when this LSI is used in combination with an 8-times oversampling digital filter of whinch input sampling rate is 48kHz. NIPPON PRECISION CIRCUITS—8 Measurement circuit Vcc C5 220p IC1 C1 220p 2 R3 680 Vcc R1 910 Vee Vcc R2 910 2 7 U2 5534 6 4 C6 220p Vee GND R4 680 3 4 Vee 2 7 U3 5534 6 7 U1 5534 6 4 1 DVSS AVSSA 24 2 3 DI RAP 23 GND 3 C2 220p VDD GND C7 4.7µ BCKI IOUTA 22 4 WCKI IOUTAN 21 5 IWSL RAN 20 6 RSTN AVDDA 19 R5 470 BNC J1 S M5865BM 7 TSTN AVDDB 18 8 C3 220p TO RBP 17 9 DVDD IOUTB 16 GND 10 CKI 3 IOUTBN 15 11 C4 220p CKDVN RBN 14 12 CVSS AVSSB 13 SM5865 GND NIPPON PRECISION CIRCUITS—9 GND S M5865BM FUNCTIONAL DESCRIPTION Quantization Noise Reduction The SM5865BM employs a 3rd-order 23-level quantizer noise shaper to effectively reduce quantization noise in the audio band. The quantization noise component at 16fs to 96fs operation is shown in figure 1. 0 10 20 30 40 50 60 70 80 Quantization noise 90 (dB) 100 110 120 130 140 150 160 170 180 0 0.5 1 1.5 2 2.5 3 3.5 4 24-bit, fs quantization noise level 20-bit, fs quantization noise level 16-bit, fs quantization noise level 0 dB sine wave equivalent white noise level 16fs 24fs 32fs 48fs 64fs 96fs Frequency (fs) Figure 1. Quantization noise level Internal Oversampling Operation The SM5865BM accepts data output from an 8-times or 4-times oversampling digital filter, and oversampled internally again up to the noise shaper operating rate. The internal oversampling factor is determined automatically from the system clock input frequency and the input sampling frequency. This internal oversampling factor (n) must be an integer satisfying the conditions shown in table 1. Table 1. Operating conditions P arameter fW C K I a nd f C K I c ompulsor y conditions 1 C K DVN = HIGH C K D V N = L OW f CKI = f WCKI × 8 × n where n = 1, 2, 3, ... f CKI = f WCKI × 16 × n where n = 1, 2, 3, ... Noise shaper operating frequency f CKI f ns = f WCKI × n = ---------8 f CKI f ns = f WCKI × n = ---------16 1. fW C K I = w ord clock frequency, fC K I = i nput system clock frequency, n = internal oversampling factor NIPPON PRECISION CIRCUITS—10 S M5865BM Word clock input WCKI SM5865 System clock input CKI System clock divider select CKDVN Figure 2. Clock-related inputs Table 2 shows some possible combinations for the circuit configuration shown in figure 3. fs Interpolating filter (8-times/4-times) fWCKI SM5865 fCKI Figure 3. Circuit configuration Table 2. System clock frequencies (CKDVN = HIGH) fs 16 kHz 16 kHz 16 kHz 32 kHz 32 kHz 32 kHz 32 kHz 32 kHz 44.1 kHz 44.1 kHz 44.1 kHz 44.1 kHz 44.1 kHz 48 kHz 48 kHz 48 kHz 48 kHz 48 kHz System clock frequency 1 fC K I 6.144 MHz (384fs) 8.192 MHz (512fs) 12.288 MHz (768fs) 6.144 MHz (192fs) 8.192 MHz (256fs) 12.288 MHz (384fs) 16.384 MHz (512fs) 24.576 MHz (768fs) 8.4672 MHz (192fs) 11.2896 MHz (256fs) 16.9344 MHz (384fs) 22.5792 MHz (512fs) 33.8688 MHz (768fs) 9.216 MHz (192fs) 12.288 MHz (256fs) 18.432 MHz (384fs) 24.576 MHz (512fs) 36.864 MHz (768fs) Noise shaper operating rate 48fs 64fs 96fs 24fs 32fs 48fs 64fs 96fs 24fs 32fs 48fs 64fs 96fs 24fs 32fs 48fs 64fs 96fs Internal factor (8fs input) 6 8 12 3 4 6 8 12 3 4 6 8 12 3 4 6 8 12 CKDVN Internal factor (4fs input) 12 16 24 6 8 12 16 24 6 8 12 16 24 6 8 12 16 24 NIPPON PRECISION CIRCUITS—11 S M5865BM Table 2. System clock frequencies (CKDVN = HIGH) fs 88.2 kHz 88.2 kHz 88.2 kHz 88.2 kHz 96 kHz 96 kHz 96 kHz 176.4 kHz 176.4 kHz 192 kHz System clock frequency 1 fC K I 16.9344 MHz (192fs) 22.5792 MHz (256fs) 33.8688 MHz (384fs) 45.1584 MHz (512fs) 18.432 MHz (192fs) 24.576 MHz (256fs) 36.864 MHz (384fs) 33.8688 MHz (192fs) 45.1584 MHz (256fs) 36.864 MHz (192fs) Noise shaper operating rate 24fs 32fs 48fs 64fs 24fs 32fs 48fs 24fs 32fs 24fs Internal factor (8fs input) 3 4 6 8 3 4 6 3 4 3 Internal factor (4fs input) 6 8 12 16 6 8 12 6 8 6 1. W h e n C K DVN = LOW , the system clock frequency f C K I i s halved, so the values shown are half the input frequency required for the same sampling rate and internal factors. System Clock Divider (CKDVN) The SM5865BM has a built-in divide-by-2 system clock frequency divider. The divider enables the internal system clock to operate at half the input frequency, for example when the external master clock input frequency is high. Audio Data Input (DI, BCKI, WCKI, IWSL) Input data format The audio data is input in MSB-first, 2s-complement, 24-bit/20-bit serial format. The input word bit length is selected by IWSL, 24-bit when HIGH or open circuit, and 20-bit when LOW. Jitter-free function System Reset (RSTN) The device should be reset in the following cases. s s At power ON When the system clock CKI stops, or other abnormalities occur. The device is reset by applying a LOW-level pulse on RSTN. Serial input data bits on DI are read into an SIPO register (serial-to-parallel converter register) on the rising edge of the bit clock BCKI where the serial data is converted into parallel data. The internal parallel data control timing is derived from the system clock, and is not affected by any jitter on the input data clocks (WCKI and BCKI). After a reset operation is released when RSTN goes HIGH, the internal timing and the WCKI input timing are phase compared on the first and subsequent WCKI falling edges and the comparison result is used to perform timing adjustment to maintain the word boundary relationship between the internal timing and the WCKI clock. NIPPON PRECISION CIRCUITS—12 S M5865BM TIMING DIAGRAMS 192fs System Clock Input Timing 1 / 8fs WCKI CKI BCKI (1)20bit * DI MSB LSB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 BCKI (2)20bit DI MSB LSB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 BCKI (3)24bit DI MSB LSB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 * Data can be input at any period within the word clock cycle. NIPPON PRECISION CIRCUITS—13 S M5865BM 256fs System Clock Input Timing 1 / 8fs WCKI CKI BCKI (1)20bit * DI MSB LSB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 BCKI (2)20bit DI MSB LSB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 BCKI (3)24bit * DI MSB LSB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 BCKI (4)24bit DI MSB LSB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 * Data can be input at any period within the word clock cycle. NIPPON PRECISION CIRCUITS—14 S M5865BM TYPICAL APPLICATIONS Input Interface Circuit XTI CKI DI WCKI BCKI SM5847 DOL DOR WCKO BCKO SM5865 CKI DI WCKI BCKI SM5865 NIPPON PRECISION CIRCUITS—15 S M5865BM Analog Output Circuit 1 RAP 23 Level DEM DAC 23 Level DEM DAC IOUTA IOUTAN RAN SM5865 RBP 23 Level DEM DAC 23 Level DEM DAC IOUTB IOUTBN RBN Analog Output Circuit 2 RAP 23 Level DEM DAC 23 Level DEM DAC IOUTA IOUTAN RAN SM5865 RBP 23 Level DEM DAC 23 Level DEM DAC IOUTB IOUTBN RBN Note that the analog output characteristics are not guaranteed for non-standard output circuit configurations. NIPPON PRECISION CIRCUITS—16 S M5865BM NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility fo r the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with expor t controls on the distribution or dissemination of the products. Customers shall not expor t, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2-chome Koto-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NC9920AE 2000.01 NIPPON PRECISION CIRCUITS INC. NIPPON PRECISION CIRCUITS—17