CD40162B

CD40160BM BC Decade Counter with Asynchronous CD40162BM BC Synchronous Clear CD40161BM BC Binary Counter with Asynchronous CD40163BM BC Synchronous Clear March 1988 CD40160BM CD40160BC Decade Counter with Asynchronous Clear CD40161BM CD40161BC Binary Counter with Asynchronous Clear CD40162BM CD40162BC Decade Counter with Synchronous Clear CD40163BM CD40163BC Binary Counter with Synchronous Clear General Description These (synchronous presettable up) counters are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors They feature an internal carry look-ahead for fast counting schemes and for cascading packages without additional gating A low level at the load input disables counting and causes the outputs to agree with the data input after the next positive clock edge The clear function for the CD40162B and CD40163B is synchronous and a low level at the clear input sets all four outputs low after the next positive clock edge The clear function for the CD40160B and CD40161B is asynchronous and a low level at the clear input sets all four outputs low regardless of the state of the clock Counting is enabled when both count enable inputs are high Input T is fed forward to also enable the carry out The carry output is a positive pulse with a duration approximately equal to the positive portion of QA and can be used to enable successive cascaded stages Logic transitions at the enable P or T inputs can occur when the clock is high or low Features Y Y Y Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD (typ ) Low power TTL fan out of 2 driving 74L compatibility or 1 driving 74LS Internal look-ahead for fast counting schemes Carry output for N-bit cascading Load control line Synchronously programmable Equivalent to MC14160B MC14161B MC14162B MC14163B Equivalent to MM74C160 MM74C161 MM74C162 MM74C163 Connection Diagram Dual-In-Line Package Order Number CD40160B CD40161B CD40162B or CD40163B TL F 5986 – 1 Top View C1995 National Semiconductor Corporation TL F 5986 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Notes 1 2) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (Soldering 10 seconds) b 0 5 to a 18 VDC b 0 5 to VDD a 0 5 VDC b 65 C to a 150 C Recommended Operating Conditions (Note 2) DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD40XXXBM CD40XXXBC 3V to 15 VDC 0V to VDD VDC b 55 C to a 125 C b 40 C to a 85 C 700 mW 500 mW 260 C CD40161BM CD40162BM CD40163BM (Note 2) Limits b 55 C a 25 C a 125 C DC Electrical Characteristics CD40160BM Symbol IDD Parameter Quiescent Device Current Low Level Output Voltage Conditions VDD e 5V VDD e 10V VDD e 15V Units mA mA mA V V V V V V Min Max 5 10 20 0 05 0 05 0 05 Min Typ Max 5 10 20 0 05 0 05 0 05 Min Max 150 300 600 0 05 0 05 0 05 VOL l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V VDD e 5V VO e 4 6V VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V VDD e 15V VIN e 0V VDD e 15V VIN e 15V 35 70 11 0 0 64 16 42 b 0 64 b1 6 b4 2 VOH High Level Output Voltage 4 95 9 95 14 95 15 30 40 4 95 9 95 14 95 5 10 15 15 30 40 4 95 9 95 14 95 15 30 40 35 70 11 0 VIL Low Level Input Voltage High Level Input Voltage Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current V V V V V V mA mA mA mA mA mA VIH 35 70 11 0 0 51 13 34 b 0 51 b1 3 b3 4 b 0 10 IOL 0 88 2 25 88 b 0 88 b 2 25 b8 8 b 10 b 5 b 0 10 0 36 09 24 b 0 36 b0 9 b2 4 b1 0 IOH IIN 0 10 10b5 0 10 10 mA mA DC Electrical Characteristics CD40160BC Symbol IDD Parameter Quiescent Device Current Conditions VDD e 5V VDD e 10V VDD e 15V CD40161BC CD40162BC CD40163BC (Note 2) Limits b 40 C a 25 C a 85 C Units mA mA mA V V V V V V Min Max 20 40 80 0 05 0 05 0 05 Min Typ Max 20 40 80 0 05 0 05 0 05 Min Max 150 300 600 0 05 0 05 0 05 VOL Low Level Output Voltage l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V 2 4 95 9 95 14 95 VOH High Level Output Voltage 4 95 9 95 14 95 15 30 40 5 10 15 15 30 40 4 95 0 95 14 95 15 30 40 VIL Low Level Input Voltage V V V DC Electrical Characteristics CD40160BC Symbol VIH Parameter High Level Input Voltage Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current Conditions VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V VDD e 5V VO e 4 6V VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V VDD e 15V VIN e 0V VDD e 15V VIN e 15V CD40161BC CD40162BC CD40163BC (Note 2) (Continued) Limits b 40 C a 25 C a 85 C Units V V V mA mA mA mA mA mA Min 35 70 11 0 0 52 13 36 b 0 52 b1 3 b3 6 Max Min 35 70 11 0 0 44 11 30 b 0 44 b1 1 b3 0 Typ Max Min 35 70 11 0 Max IOL 0 88 2 25 88 b 0 88 b 2 25 b8 8 b 10 b 5 b 0 30 0 36 09 24 b 0 36 b0 9 b2 4 b1 0 IOH IIN b 0 30 0 30 10b5 0 30 10 mA mA AC Electrical Characteristics Symbol tPHL or tPLH Parameter Propagation Delay Time from Clock to Q Propagation Delay Time from Clock to Carry Out TA e 25 C CL e 50 pF RL e 200k unless otherwise specified Conditions VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V All Outputs VDD e 5V VDD e 10V VDD e 15V Any Input (Note 4) 2 55 7 4 11 14 100 50 40 50 95 200 100 80 75 Min Typ 250 100 80 290 120 100 180 70 60 190 80 70 120 30 25 170 70 60 120 50 40 125 45 35 280 120 100 190 80 70 250 90 70 15 50 50 Max 400 160 130 450 190 160 290 130 110 300 150 120 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ms ms MHz MHz MHz ns ns ns pF pF tPHL or tPLH tPHL or tPLH Propagation Delay Time from T Enable to Carry Out Propagation Time from Clear to Q (CD40160B CD40161B Only) Minimum Time Prior to Clock that Data or Load must be Present Minimum Time Prior to Clock that Enable P or T must be Present Minimum Time Prior to Clock that Clear must be Present (CD40162B CD40163B Only) Maximum Clock Pulse Width tPHL tSU tSU tSU tWL or tWH tRCL or tFCL Maximum Clock Rise or Fall Time fCL Maximum Clock Frequency tTHL or tTLH Transition Time CIN CPD Average Input Capacitance Power Dissipation Capacity AC Parameters are guaranteed by DC correlated testing Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices should be operated at these limits The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOH and IOL are tested one output at a time Note 4 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C Family Characteristics application note AN-90 3 Logic Diagram CD40160B CD40162B Clear is Synchronous for the CD40162B TL F 5986 – 2 CD40161B CD40163B Clear is Synchronous for the CD40163B TL F 5986 – 3 4 Logic Waveforms CD40160B CD40162B Decade Counters CD40161B CD40163B Binary Counters TL F 5986 – 4 TL F 5986 – 5 Switching Time Waveforms TL F 5986 – 6 Note 1 All input pulses are from generators having the following characteristics tr e tf e 20 ns PRR s 1 MHz duty cycle s 50% ZOUT Note 2 All times are measured from 50% to 50% 50X Cascading Packages TL F 5986 – 7 5 6 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD40160BMJ CD40160BCJ CD40161BMJ CD40161BCJ CD40162BMJ CD40162BCJ CD40163BMJ or CD40163BCJ NS Package Number J16A 7 CD40160BM BC Decade Counter with Asynchronous CD40162BM BC Synchronous Clear CD40161BM BC Binary Counter with Asynchronous CD40163BM BC Synchronous Clear Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number CD40160BMN CD40160BCN CD40161BMN CD40161BCN CD40162BMN CD40162BCN CD41063BMN or CD40163BCN NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications