SM72482MA-4

SM72482 SolarMagic Dual 5A Compound Gate Driver May 9, 2011 SM72482 SolarMagic Dual 5A Compound Gate Driver General Description The SM72482 Dual Gate Driver replaces industry standard gate drivers with improved peak output current and efficiency. Each “compound” output driver stage includes MOS and bipolar transistors operating in parallel that together sink more than 5A peak from capacitive loads. Combining the unique characteristics of MOS and bipolar devices reduces drive current variation with voltage and temperature. Under-voltage lockout protection is also provided. The drivers can be operated in parallel with inputs and outputs connected to double the drive current capability. This device is available in the SOIC-8 package. ■ Fast rise and fall times (14 ns/12 ns rise/fall with 2 nF load) ■ Available in dual non-inverting, dual inverting and combination configurations ■ Supply rail under-voltage lockout protection (UVLO) ■ SM72482 UVLO configured to drive PFET through OUT_A and NFET through OUT_B ■ Pin compatible with industry standard gate drivers Typical Applications ■ Synchronous Rectifier Gate Drivers ■ Switch-mode Power Supply Gate Driver ■ Solenoid and Motor Drivers Features ■ Renewable Energy Grade ■ Independently drives two N-Channel MOSFETs ■ Compound CMOS and bipolar outputs reduce output current variation Packages ■ SOIC-8 ■ Thermally Enhanced MSOP8–EP ■ 5A sink/3A source current capability ■ Two channels can be connected in parallel to double the drive current ■ Independent inputs (TTL compatible) ■ Fast propagation times (25 ns typical) Connection Diagram 30142201 SOIC-8, eMSOP-8 © 2011 National Semiconductor Corporation 301422 www.national.com SM72482 Ordering Information Order Number SM72482MY-1 SM72482MYE-1 SM72482MYX-1 SM72482MA-4 SM72482MAE-4 SM72482MAX-4 Package Type MSOP–8–EP MSOP–8–EP MSOP–8–EP SOIC-8 SOIC-8 SOIC-8 NSC Package Drawing MUY08A MUY08A MUY08A M08A M08A M08A Package Marking SD8B SD8B SD8B S482 S482 S482 Supplied As 1000 Units in Tape and Reel 250 Units in Tape and Reel 3500 Units in Tape and Reel 95 Units in Rail 250 Units in Tape and Reel 2500 Units in Tape and Reel Pin Descriptions Pin 1 2 3 4 5 6 7 8 NC IN_A VEE IN_B OUT_B VCC OUT_A. NC Name No Connect ‘A’ side control input Ground reference for both inputs and outputs ‘B’ side control input Output for the ‘B’ side driver. Positive output supply Output for the ‘A’ side driver. No Connect TTL compatible thresholds. Connect to power ground. TTL compatible thresholds. Voltage swing of this output is from VCC to VEE. The output stage is capable of sourcing 3A and sinking 5A. Locally decouple to VEE. Voltage swing of this output is from VCC to VEE. The output stage is capable of sourcing 3A and sinking 5A. Description Application Information Configuration Table Part Number SM72482MY-1 SM72482MA-4 “A” Output Configuration Non-Inverting (Low in UVLO) Inverting (High in UVLO) “B” Output Configuration Non-Inverting (Low in UVLO) Non-Inverting (Low in UVLO) Package MSOP8–EP SOIC-8 www.national.com 2 SM72482 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VCC to VEE IN to VEE Storage Temperature Range, (TSTG) Maximum Junction Temperature, (TJ(max)) Operating Junction Temperature ESD Rating −0.3V to 15V −0.3V to 15V −55°C to +150°C +150°C +125°C 2kV Electrical Characteristics TJ = −40°C to +125°C, VCC = 12V, VEE = 0V, No Load on OUT_A or OUT_B, unless otherwise specified. Symbol VCCR VCCH ICC Parameter VCC Operating Range VCC Under Voltage Lockout (rising) VCC Under Voltage Lockout Hysteresis VCC Supply Current (ICC) IN_A = IN_B = 0V (SM72482MY-1) IN_A = VCC, IN_B = 0V (SM72482MA-4) CONTROL INPUTS VIH VIL VthH VthL HYS IIL IIH Logic High Logic Low High Threshold Low Threshold Input Hysteresis Input Current Low Input Current High IN_A=IN_B=VCC IN_A=IN_B=VCC(SM72482MY-1) IN_B=VCC (SM72482MA-4) IN_A=VCC (SM72482MA-4) OUTPUT DRIVERS ROH ROL ISource ISink Output Resistance High Output Resistance Low Peak Source Current Peak Sink Current IOUT = −10 mA (Note 2) IOUT = + 10 mA (Note 2) OUTA/OUTB = VCC/2, 200 ns Pulsed Current OUTA/OUTB = VCC/2, 200 ns Pulsed Current 30 1.4 3 5 50 2.5 Ω Ω A A −1 10 10 -1 1.3 0.8 1.75 1.35 400 0.1 18 18 0.1 1 25 25 1 µA 2.2 0.8 2.2 2.0 V V V V mV VCC−VEE VCC−VEE Conditions Min 3.5 2.3 2.9 230 1 1 2 2 mA Typ Max 14 3.5 Units V V mV 3 www.national.com SM72482 Symbol td1 td2 tr tf Parameter Propagation Delay Time Low to High, IN rising (IN to OUT) Propagation Delay Time High to Low, IN falling (IN to OUT) Rise Time Fall Time AEC - Q100, Method 004 Conditions CLOAD = 2 nF, see Figure 1 CLOAD = 2 nF, see Figure 1 CLOAD = 2 nF, see Figure 1 CLOAD = 2 nF, see Figure 1 TJ = 150°C SOIC-8 Package MSOP8–EP Package SOIC-8 Package MSOP8–EP Package Min Typ Max Units SWITCHING CHARACTERISTICS 25 25 14 12 500 170 60 70 4.7 40 40 25 25 ns ns ns ns mA LATCHUP PROTECTION THERMAL RESISTANCE θJA θJC Junction to Ambient, 0 LFPM Air Flow Junction to Case °C/W °C/W Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The output resistance specification applies to the MOS device only. The total output current capability is the sum of the MOS and Bipolar devices. Timing Waveforms 30142205 30142206 (a) FIGURE 1. (a) Inverting, (b) Non-Inverting (b) www.national.com 4 SM72482 Typical Performance Characteristics Supply Current vs Frequency Supply Current vs Capacitive Load 30142210 30142211 Rise and Fall Time vs Supply Voltage Rise and Fall Time vs Temperature 30142212 30142213 5 www.national.com SM72482 Rise and Fall Time vs Capacitive Load Delay Time vs Supply Voltage 30142214 30142215 Delay Time vs Temperature RDSON vs Supply Voltage 30142216 30142217 UVLO Thresholds and Hysteresis vs Temperature 30142218 www.national.com 6 SM72482 Block Diagram 30142203 Block Diagram of SM72482 7 www.national.com SM72482 Detailed Operating Description The SM72482 dual gate driver consists of two independent and identical driver channels with TTL compatible logic inputs and high current totem-pole outputs that source or sink current to drive MOSFET gates. The driver output consist of a compound structure with MOS and bipolar transistor operating in parallel to optimize current capability over a wide output voltage and operating temperature range. The bipolar device provides high peak current at the critical threshold region of the MOSFET VGS while the MOS devices provide rail-to-rail output swing. The totem pole output drives the MOSFET gate between the gate drive supply voltage VCC and the power ground potential at the VEE pin. The control inputs of the drivers are high impedance CMOS buffers with TTL compatible threshold voltages. The SM72482 pinout was designed for compatibility with industry standard gate drivers in single supply gate driver applications. The input stage of each driver should be driven by a signal with a short rise and fall time. Slow rising and falling input signals, although not harmful to the driver, may result in the output switching repeatedly at a high frequency. The two driver channels of the SM72482 are designed as identical cells. Transistor matching inherent to integrated circuit manufacturing ensures that the AC and DC peformance of the channels are nearly identical. Closely matched propagation delays allow the dual driver to be operated as a single with inputs and output pins connected. The drive current capability in parallel operation is precisely 2X the drive of an individual channel. Small differences in switching speed between the driver channels will produce a transient current (shoot-through) in the output stage when two output pins are connected to drive a single load. Differences in input thresholds between the driver channels will also produce a transient current (shoot-through) in the output stage. Fast transition input signals are especially important while operating in a parallel configuration. The efficiency loss for parallel operation has been characterized at various loads, supply voltages and operating frequencies. The power dissipation in the SM72482 increases less than 1% relative to the dual driver configuration when operated as a single driver with inputs/ outputs connected. An Under Voltage Lock Out (UVLO) circuit is included in the SM72482, which senses the voltage difference between VCC and the chip ground pin, VEE. When the VCC to VEE voltage difference falls below 2.8V both driver channels are disabled. The UVLO hysteresis prevents chattering during brown-out conditions and the driver will resume normal operation when the VCC to VEE differential voltage exceeds approximately 3.0V. The SM72482MY –1 device hold both outputs in the low state in the under-voltage lockout (UVLO) condition. The SM72482MA–4 has an active high output state of OUT_A during UVLO. When VCC is less than the UVLO threshold voltage, OUT_A will be locked in the high state while OUT_B will be disabled in the low state. This configuration allows the SM72482MY –4 to drive a PFET through OUT_A and an NFET through OUT_B with both FETs safely turned off during UVLO. Layout Considerations Attention must be given to board layout when using SM72482. Some important considerations include: 1. A Low ESR/ESL capacitor must be connected close to the IC and between the VCC and VEE pins to support high peak currents being drawn from VCC during turn-on of the MOSFET. 2. Proper grounding is crucial. The drivers need a very low impedance path for current return to ground avoiding inductive loops. The two paths for returning current to ground are a) between SM72482 VEE pin and the ground of the circuit that controls the driver inputs, b) between SM72482 VEE pin and the source of the power MOSFET being driven. All these paths should be as short as possible to reduce inductance and be as wide as possible to reduce resistance. All these ground paths should be kept distinctly separate to avoid coupling between the high current output paths and the logic signals that drive the SM72482. A good method is to dedicate one copper plane in a multi-layered PCB to provide a common ground surface. 3. With the rise and fall times in the range of 10 ns to 30 ns, care is required to minimize the lengths of current carrying conductors to reduce their inductance and EMI from the high di/dt transients generated by the SM72482. 4. The SM72482 footprint is compatible with other industry standard drivers including the TC4426/27/28 and UCC27323/4/5. 5. If either channel is not being used, the respective input pin (IN_A or IN_B) should be connected to either VEE or VCC to avoid spurious output signals. Thermal Performance INTRODUCTION The primary goal of thermal management is to maintain the integrated circuit (IC) junction temperature (TJ) below a specified maximum operating temperature to ensure reliability. It is essential to estimate the maximum TJ of IC components in worst case operating conditions. The junction temperature is estimated based on the power dissipated in the IC and the junction to ambient thermal resistance θJA for the IC package in the application board and environment. The θJA is not a given constant for the package and depends on the printed circuit board design and the operating environment. DRIVE POWER REQUIREMENT CALCULATIONS IN SM72482 The SM72482 dual low side MOSFET driver is capable of sourcing/sinking 3A/5A peak currents for short intervals to drive a MOSFET without exceeding package power dissipation limits. High peak currents are required to switch the MOSFET gate very quickly for operation at high frequencies. www.national.com 8 SM72482 Characterization of the SM72482 provides accurate estimates of the transient and quiescent power dissipation components. At 300 kHz switching frequency and 30 nC load used in the example, the transient power will be 8 mW. The 1 mA nominal quiescent current and 12V VGATE supply produce a 12 mW typical quiescent power. Therefore the total power dissipation PD = 0.216 + 0.008 + 0.012 = 0.236W. We know that the junction temperature is given by TJ = PD x θJA + TA Or the rise in temperature is given by TRISE = TJ − TA = PD x θJA 30142207 FIGURE 2. The schematic above shows a conceptual diagram of the SM72482 output and MOSFET load. Q1 and Q2 are the switches within the gate driver. RG is the gate resistance of the external MOSFET, and CIN is the equivalent gate capacitance of the MOSFET. The gate resistance Rg is usually very small and losses in it can be neglected. The equivalent gate capacitance is a difficult parameter to measure since it is the combination of CGS (gate to source capacitance) and CGD (gate to drain capacitance). Both of these MOSFET capacitances are not constants and vary with the gate and drain voltage. The better way of quantifying gate capacitance is the total gate charge QG in coloumbs. QG combines the charge required by CGS and CGD for a given gate drive voltage VGATE. Assuming negligible gate resistance, the total power dissipated in the MOSFET driver due to gate charge is approximated by PDRIVER = VGATE x QG x FSW Where FSW = switching frequency of the MOSFET. For example, consider the MOSFET MTD6N15 whose gate charge specified as 30 nC for VGATE = 12V. The power dissipation in the driver due to charging and discharging of MOSFET gate capacitances at switching frequency of 300 kHz and VGATE of 12V is equal to PDRIVER = 12V x 30 nC x 300 kHz = 0.108W. If both channels of the SM72482 are operating at equal frequency with equivalent loads, the total losses will be twice as this value which is 0.216W. In addition to the above gate charge power dissipation, - transient power is dissipated in the driver during output transitions. When either output of the SM72482 changes state, current will flow from VCC to VEE for a very brief interval of time through the output totem-pole N and P channel MOSFETs. The final component of power dissipation in the driver is the power associated with the quiescent bias current consumed by the driver input stage and Under-voltage lockout sections. For SOIC-8 package θJA is estimated as 170°C/W for the conditions of natural convection. For MSOP8-EP θJA is typically 60°C/W. Therefore for SOIC TRISE is equal to TRISE = 0.236 x 170 = 40.1°C CONTINUOUS CURRENT RATING OF SM72482 The SM72482 can deliver pulsed source/sink currents of 3A and 5A to capacitive loads. In applications requiring continuous load current (resistive or inductive loads), package power dissipation, limits the SM72482 current capability far below the 5A sink/3A source capability. Rated continuous current can be estimated both when sourcing current to or sinking current from the load. For example when sinking, the maximum sink current can be calculated as: where R DS(on) is the on resistance of lower MOSFET in the output stage of SM72482. Consider TJ(max) of 125°C and θJA of 170°C/W for an SO-8 package under the condition of natural convection and no air flow. If the ambient temperature (TA) is 60°C, and the RDS(on) of the SM72482 output at TJ(max) is 2.5Ω, this equation yields ISINK(max) of 391mA which is much smaller than 5A peak pulsed currents. Similarly, the maximum continuous source current can be calculated as where VDIODE is the voltage drop across hybrid output stage which varies over temperature and can be assumed to be about 1.1V at TJ(max) of 125°C. Assuming the same parameters as above, this equation yields ISOURCE(max) of 347mA. 9 www.national.com SM72482 Physical Dimensions inches (millimeters) unless otherwise noted NOTES: UNLESS OTHERWISE SPECIFIED 1. STANDARD LEAD FINISH TO BE 200 MICROINCHES/5.08 MICROMETERS MINIMUM LEAD/TIN(SOLDER) ON COPPER. 2. 3. DIMENSION DOES NOT INCLUDE MOLD FLASH. REFERENCE JEDEC REGISTRATION MS-012, VARIATION AA, DATED MAY 1990. 8-Lead SOIC Package NS Package Number M08A 8-Lead Exposed Pad MSOP Package NS Package Number MUY08A www.national.com 10 SM72482 11 www.national.com SM72482 SolarMagic Dual 5A Compound Gate Driver Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Amplifiers Audio Clock and Timing Data Converters Interface LVDS Power Management Switching Regulators LDOs LED Lighting Voltage References PowerWise® Solutions Temperature Sensors PLL/VCO www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/vref www.national.com/powerwise WEBENCH® Tools App Notes Reference Designs Samples Eval Boards Packaging Green Compliance Distributors Quality and Reliability Feedback/Support Design Made Easy Design Support www.national.com/webench www.national.com/appnotes www.national.com/refdesigns www.national.com/samples www.national.com/evalboards www.national.com/packaging www.national.com/quality/green www.national.com/contacts www.national.com/quality www.national.com/feedback www.national.com/easy www.national.com/solutions www.national.com/milaero www.national.com/solarmagic www.national.com/training Applications & Markets Mil/Aero PowerWise® Design University Serial Digital Interface (SDI) www.national.com/sdi www.national.com/wireless www.national.com/tempsensors SolarMagic™ THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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