74HC393N,652

74HC393; 74HCT393 Dual 4-bit binary ripple counter Rev. 5 — 1 April 2014 Product data sheet 1. General description The 74HC393; 7474HCT393 is a dual 4-stage binary ripple counter. Each counter features a clock input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered parallel outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP. A HIGH on nMR clears the counter stages and forces the outputs LOW, independent of the state of nCP. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Input levels:  For 74HC393: CMOS level  For 74HCT393: TTL level  Complies with JEDEC standard no. 7A  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V.  Two 4-bit binary counters with individual clocks  Divide by any binary module up to 28 in one package  Two master resets to clear each 4-bit counter individually 3. Ordering information Table 1. Ordering information Type number Package 74HC393N Temperature range Name Description Version 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5  3  0.85 mm 74HCT393N 74HC393D 74HCT393D 74HC393DB 74HCT393DB 74HC393PW 74HCT393PW 74HC393BQ 74HCT393BQ SOT762-1 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter 4. Functional diagram 1Q0 1 CTR4 3 1CP 1Q1 2 4 13 1Q2 5 1Q3 6 2Q0 11 1 1MR 4 CTR4 2CP 2Q1 5 + 12 10 2Q2 9 2Q3 8 10 9 4-BIT BINARY RIPPLE COUNTER 1Q1 1Q2 1Q3 2Q0 13 12 2CP 2MR 4-BIT BINARY RIPPLE COUNTER 2Q1 2Q2 2Q3 IEC logic symbol 3 4 5 0 6 1 74HC_HCT393 Product data sheet 3 4 15 5 10 14 6 13 7 9 8 12 Functional diagram 2 11 11 001aad534 Fig 3. 8 001aad533 Fig 2. 1CP 1MR 11 3 1Q0 2 0 + 13 2MR Logic symbol 1 6 CT 001aad532 Fig 1. 3 CT = 0 2 12 3 CT 1 2 0 CT = 0 10 9 8 001aad535 Fig 4. State diagram All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 2 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter Q CP T Q FF 1 T RD Q FF 2 T RD Q FF 3 T RD FF 4 RD MR Q0 Q1 Q2 Q3 001aad536 Fig 5. Logic diagram (one counter) 5. Pinning information 5.1 Pinning +& +&7 &3   9&& 05   &3 4   05 4   4 4   4 4   4 *1'   4 DDD Fig 6. Pin configuration DIP14 and SO14 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 3 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter &3 WHUPLQDO LQGH[DUHD  +& +&7  9&& +& +&7 05   &3  05  4  4   05 4  4   4 4   4 4  4   4 *1'   4  4 9&&  4   4  &3   9&&  4  *1' &3 05 4 DDD 7UDQVSDUHQWWRSYLHZ DDD (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to VCC. Fig 7. Pin configuration SSOP14 and TSSOP14 Fig 8. Pin configuration DHVQFN14 5.2 Pin description Table 2. Pin description Symbol Pin Description 1CP 1 clock input (HIGH-to-LOW, edge-triggered) 1MR 2 asynchronous master reset input (active HIGH) 1Q0 3 flip-flop output 1Q1 4 flip-flop output 1Q2 5 flip-flop output 1Q3 6 flip-flop output GND 7 ground (0 V) 2Q3 8 flip-flop output 2Q2 9 flip-flop output 2Q1 10 flip-flop output 2Q0 11 flip-flop output 2MR 12 asynchronous master reset input (active HIGH) 2CP 13 clock input (HIGH-to-LOW, edge-triggered) VCC 14 supply voltage 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 4 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter 6. Functional description Table 3. Count sequence for one counter [1] Count Output nQ0 nQ1 nQ2 nQ3 0 L L L L 1 H L L L 2 L H L L 3 H H L L 4 L L H L 5 H L H L 6 L H H L 7 H H H L 8 L L L H 9 H L L H 10 L H L H 11 H H L H 12 L L H H 13 H L H H 14 L H H H 15 H H H H [1] H = HIGH voltage level; L = LOW voltage level. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min VCC supply voltage IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V IO output current VO = 0.5 V to VCC + 0.5 V ICC supply current - ±50 mA IGND ground current - 50 mA Tstg storage temperature total power dissipation Ptot [1] [2] Max Unit 0.5 +7 V - 20 mA - 20 mA - 25 mA 65 +150 C DIP14 package [1] - 750 mW SO14, SSOP14, TSSOP14 and DHVQFN14 package [2] - 500 mW For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C. For SO14 package: Ptot derates linearly with 8 mW/K above 70 C. For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C. 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 5 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC393 Min 74HCT393 Typ Max Min Unit Typ Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min Typ VCC = 2.0 V 1.5 VCC = 4.5 V 3.15 VCC = 6.0 V 4.2 VCC = 2.0 V - VCC = 4.5 V - VCC = 6.0 V 40 C to +85 C 40 C to +125 C Unit Max Min Max Min Max 1.2 - 1.5 - 1.5 - V 2.4 - 3.15 - 3.15 - V 3.2 - 4.2 - 4.2 - V 0.8 0.5 - 0.5 - 0.5 V 2.1 1.35 - 1.35 - 1.35 V - 2.8 1.8 - 1.8 - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V 74HC393 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 0.1 - 0.1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 A 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 6 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min CI input capacitance Typ 40 C to +85 C 40 C to +125 C Unit Max - 3.5 - Min Max Min Max pF 74HCT393 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 6 mA 3.98 4.32 - 3.84 - 3.7 - V LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A - 0 0.1 - 0.1 - 0.1 V IO = 6.0 mA - 0.15 0.26 - 0.33 - 0.4 V VOL II input leakage current VI = VCC or GND; VCC = 5.5 V - - 0.1 - 1.0 - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 - 80 - 160 A ICC additional supply current VI = VCC  2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A per input pin; nCP - 40 144 - 180 - 196 A per input pin; nMR - 100 360 - 450 - 490 - 3.5 - CI input capacitance 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 A pF © NXP Semiconductors N.V. 2014. All rights reserved. 7 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 11. Symbol Parameter 25 C Conditions Min Typ 40 C to +85 C 40 C to +125 C Unit Max Min Max Min Max 74HC393 tpd propagation delay nCP to nQ0; see Figure 9 VCC = 2.0 V - 41 125 - 155 - 190 ns VCC = 4.5 V - 15 25 - 31 - 38 ns VCC = 5 V; CL = 15 pF - 12 - - - - - ns VCC = 6.0 V - 12 21 - 26 - 32 ns [1] nQx to nQ(x1); see Figure 9 tPHL HIGH to LOW propagation delay [1] VCC = 2.0 V - 14 45 - 55 - 70 ns VCC = 4.5 V - 5 9 - 11 - 14 ns VCC = 5 V; CL = 15 pF - 5 - - - - - ns VCC = 6.0 V - 4 8 - 9 - 12 ns VCC = 2.0 V - 39 140 - 175 - 210 ns VCC = 4.5 V - 14 28 - 35 - 42 ns VCC = 5 V; CL = 15 pF - 11 - - - - - ns - 11 24 - 30 - 36 ns VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 16 - 19 ns VCC = 2.0 V 80 17 - 100 - 120 - ns VCC = 4.5 V 16 6 - 20 - 24 - ns VCC = 6.0 V 14 5 - 17 - 20 - ns VCC = 2.0 V 80 19 - 100 - 120 - ns VCC = 4.5 V 16 7 - 20 - 24 - ns VCC = 6.0 V 14 6 - 17 - 20 - ns VCC = 2.0 V 5 3 - 5 - 5 - ns VCC = 4.5 V 5 1 - 5 - 5 - ns VCC = 6.0 V 5 1 - 5 - 5 - ns nMR to nQx; see Figure 10 VCC = 6.0 V tt tW transition time pulse width [2] Qn; see Figure 9 nCP HIGH or LOW; see Figure 9 nMR HIGH; see Figure 10 trec recovery time 74HC_HCT393 Product data sheet nMR to nCP; see Figure 10 All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 8 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 11. Symbol Parameter 25 C Conditions Min fclk(max) maximum clock frequency power dissipation capacitance Max Min Max Min Max see Figure 9 VCC = 2.0 V 6 30 - 5 - 4 - MHz VCC = 4.5 V 30 90 - 24 - 20 - MHz VCC = 5 V; CL = 15 pF - 99 - 35 107 - - 23 - - 15 25 - 20 - VCC = 6.0 V CPD Typ 40 C to +85 C 40 C to +125 C Unit CL = 50 pF; f = 1 MHz; VI = GND to VCC [3] nCP to nQ0; see Figure 9 [1] - - 28 24 - - - - MHz MHz - pF 74HCT393 tpd propagation delay VCC = 4.5 V VCC = 5 V; CL = 15 pF 31 - - 38 - ns - ns [1] nQx to nQ(x1); see Figure 9 VCC = 4.5 V - 6 10 VCC = 5 V; CL = 15 pF - 6 - HIGH to LOW propagation delay nMR to nQx; see Figure 10 tt transition time Qn; see Figure 9 tW pulse width nCP HIGH or LOW; see Figure 9 tPHL - - 13 - - - 40 15 - - VCC = 4.5 V - 18 32 - 15 - - 7 15 - 19 - 22 ns 19 11 - 24 - 29 - ns 16 6 - 20 - 24 - ns 5 0 - 5 - 5 - ns VCC = 4.5 V 27 48 - 22 - 18 - MHz VCC = 5 V; CL = 15 pF - 53 - - 48 ns VCC = 5 V; CL = 15 pF - - ns - ns - ns [2] VCC = 4.5 V VCC = 4.5 V nMR HIGH; see Figure 10 VCC = 4.5 V trec recovery time nMR to nCP; see Figure 10 fclk(max) maximum clock frequency see Figure 9 VCC = 4.5 V 74HC_HCT393 Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 - - - MHz © NXP Semiconductors N.V. 2014. All rights reserved. 9 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 11. Symbol Parameter CPD power dissipation capacitance 25 C Conditions Min Typ Max Min Max Min Max - 25 - - - - - [3] CL = 50 pF; f = 1 MHz; VI = GND to VCC  1.5 V 40 C to +85 C 40 C to +125 C Unit [1] tpd is the same as tPLH and tPHL. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in W). pF PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 10.1 Waveforms 1/f max VI input nCP VM GND t PHL t PLH VOH output nQx VM VOL t THL t TLH 001aad537 Measurement points are given in Table 8. Fig 9. Propagation delays clock (nCP) to output (nQx), the output transition times and the maximum clock frequency Table 8. Measurement points Type Input Output VM VM 74HC393 0.5VCC 0.5VCC 74HCT393 1.3 V 1.3 V 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 10 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter VI input nMR VM GND tW t rec VI VM input nCP GND t PHL VOH output nQx VM VOL 001aad538 Measurement points are given in Table 8. Fig 10. Propagation delays clock (nCP) to output (nQx), pulse width master reset (nMR), and recovery time master reset (nMR) to clock (nCP) 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 11 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter tW VI 90 % 90 % negative pulse VM VM 10 % 0V VI tf tr tr tf 90 % positive pulse VM VM 10 % 0V 10 % tW 001aac221 Measurement points are given in Table 8. a. Input pulse definition VCC PULSE GENERATOR VI VO D.U.T. CL RT mna101 Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. b. Test circuit Fig 11. Test circuit for measuring switching times Table 9. Test data Type Input VI Load tr, tf CL 74HC393 VCC 6 ns 15 pF, 50 pF 74HCT393 3V 6 ns 15 pF, 50 pF 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 12 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter 11. Package outline SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.010 0.057 inches 0.069 0.004 0.049 0.05 0.244 0.039 0.041 0.228 0.016 0.028 0.024 0.01 0.01 0.028 0.004 0.012 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 12. Package outline SOT108-1 (SO14) 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 13 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b MH 8 14 pin 1 index E 1 7 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2.2 inches 0.17 0.02 0.13 0.068 0.044 0.021 0.015 0.014 0.009 0.77 0.73 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT27-1 050G04 MO-001 SC-501-14 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Fig 13. Package outline SOT27-1 (DIP14) 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 14 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp L 7 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.4 0.9 8o o 0 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT337-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig 14. Package outline SOT337-1 (SSOP14) 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 15 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig 15. Package outline SOT402-1 (TSSOP14) 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 16 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 3.1 2.9 1.65 1.35 2.6 2.4 1.15 0.85 0.5 2 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT762-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 16. Package outline SOT762-1 (DHVQFN14) 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 17 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter 12. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT393 v.5 20140401 Product data sheet - 74HC_HCT393 v.4 Modifications: 74HC_HCT393 v.4 Modifications: • The conditions for CPD have been corrected (errata). 20130516 Product data sheet - 74HC_HCT393 v.3 • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 74HC_HCT393 v.3 20050906 Product data sheet - 74HC_HCT393_CNV v.2 74HC_HCT393_CNV v.2 19901201 Product specification - - 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 18 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter 14. Legal information 14.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 14.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74HC_HCT393 Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 19 of 21 74HC393; 74HCT393 NXP Semiconductors Dual 4-bit binary ripple counter Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT393 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 1 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 20 of 21 NXP Semiconductors 74HC393; 74HCT393 Dual 4-bit binary ripple counter 16. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 10.1 11 12 13 14 14.1 14.2 14.3 14.4 15 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Contact information. . . . . . . . . . . . . . . . . . . . . 20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2014. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 1 April 2014 Document identifier: 74HC_HCT393