CS2841BEDR14

CS2841B Automotive Current Mode PWM Control Circuit The CS2841B provides all the necessary features to implement off−line fixed frequency current−mode control with a minimum number of external components. The CS2841B (a variation of the CS2843A) is designed specifically for use in automotive operation. The low start threshold voltage of 8.0 V (typ), and the ability to survive 40 V automotive load dump transients are important for automotive subsystem designs. The CS2841 series has a history of quality and reliability in automotive applications. The CS2841B incorporates a precision temperature−controlled oscillator with an internally trimmed discharge current to minimize variations in frequency. Duty−cycles greater than 50% are also possible. On board logic ensures that VREF is stabilized before the output stage is enabled. Ion implant resistors provide tighter control of undervoltage lockout. Features http://onsemi.com 8 1 PDIP−8 N SUFFIX CASE 626 14 1 SOIC−14 D SUFFIX CASE 751A • • • • • • • • • • • Optimized for Off−Line Control Internally Trimmed Temperature Compensated Oscillator Maximum Duty−Cycle Clamp VREF Stabilized Before Output Stage Enabled Low Start−Up Current Pulse−By−Pulse Current Limiting Improved Undervoltage Lockout Double Pulse Suppression 1.0 % Trimmed Bandgap Reference High Current Totem Pole Output Pb−Free Packages are Available* PIN CONNECTIONS AND MARKING DIAGRAM COMP VFB Sense OSC VREF VCC VOUT GND CS2841BEBG AWL YYWW PDIP−8 14 1 CS2841BD14G AWLYWW SOIC−14 COMP NC VFB NC Sense NC OSC VREF NC VCC VCC PWR VOUT PWR GND GND CS2841B A WL YY, Y WW G = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2005 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. 1 September, 2005 − Rev. 7 Publication Order Number: CS2841B/D CS2841B VCC VCC Pwr Undervoltage Lockout Circuit Set/ Reset 8.0 V/7.4 V 2.5 V Output Enable NOR 5.0 V Reference Internal Bias GND VREF OSC Oscillator S VOUT + − Error Amplifier 2R VC R R 1.0 V Current Sensing Comparator PWM Latch Pwr GND VFB COMP Sense Figure 1. Block Diagram MAXIMUM RATINGS Rating Supply Voltage (Low Impedance Source) Output Current Output Energy (Capacitive Load) Analog Inputs (VFB, Sense) Error Amp Output Sink Current Lead Temperature Soldering Wave Solder (through hole styles only) Note 1 Reflow (SMD styles only) Note 2 Value 40 ±1.0 5.0 −0.3 to 5.5 10 260 peak 230 peak Unit V A mJ V mA °C °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. 10 seconds max 2. 60 seconds max above 183°C ORDERING INFORMATION Device CS2841BEBN8 CS2841BEBN8G CS2841BED14 CS2841BED14G CS2841BEDR14 CS2841BEDR14G Package PDIP−8 PDIP−8 (Pb−Free) SOIC−14 SOIC−14 (Pb−Free) SOIC−14 SOIC−14 (Pb−Free) Shipping † 50 Units / Rail 50 Units / Rail 55 Units / Rail 55 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 CS2841B ELECTRICAL CHARACTERISTICS (−40°C ≤ TA ≤ 85°C, RT = 680 kW, CT = 0.022 mF for Triangular Mode, VCC = 15 V (Note 3), RT = 10 kW, CT = 3.3 nF for Sawtooth Mode (see Figure 7); unless otherwise specified.) Characteristic Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit Oscillator Section Initial Accuracy Sawtooth Mode: TJ = 25°C. See Figure 7. Sawtooth Mode: −40°C ≤ TA ≤ +85°C Triangular Mode: TJ =25°C. See Figure 7. 8.4 ≤ VCC ≤ 16 V Sawtooth Mode: TMIN ≤ TA ≤ TMAX. Note 4 Triangular Mode: TMIN ≤ TA ≤ TMAX. Note 4 VOSC (Peak to Peak) TJ = 25°C TMIN ≤ TA ≤ TMAX 47 44 44 − − − − 7.4 7.2 52 52 52 0.2 5.0 8.0 1.7 8.3 − 57 60 60 1.0 − − − 9.2 9.4 kHz kHz kHz % % % V mA mA TJ = 25°C, IOUT = 1.0 mA 8.4 ≤ VCC ≤ 16 V 1.0 ≤ IOUT ≤ 20 mA Note 4 Line, Load, Temp. Note 4 10 Hz ≤ f ≤ 10 kHz, TJ = 25°C. Note 4 TA = 125°C, 1000 Hrs. Note 4 TA = 25°C 4.9 − − − 4.82 − − −30 5.0 6.0 6.0 0.2 − 50 5.0 −100 5.1 20 25 0.4 5.18 − 25 −180 V mV mV mV/°C V mV mV mA Test Conditions Min Typ Max Unit Voltage Stability Temperature Stability Amplitude Discharge Current Error Amp Section Input Voltage Input Bias Current AVOL Unity Gain Bandwidth PSRR Output Sink Current Output Source Current VOUT High VOUT Low Current Sense Section Gain Maximum Input Signal PSRR Input Bias Current Delay to Output 3. 4. 5. 6. VCOMP = 2.5 V VFB = 0 V 2.0 ≤ VOUT ≤ 4.0 V Note 4 8.4 V ≤ VCC ≤ 16 V VFB = 2.7 V, VCOMP = 1.1 V VFB = 2.3 V, VCOMP = 5.0 V VFB = 2.3 V, RL = 15 kW to Ground VFB = 2.7 V, RL = 15 kW to VREF 2.42 − 65 0.7 60 2.0 −0.5 5.0 − 2.5 −0.3 90 1.0 70 6.0 −0.8 6.0 0.7 2.58 −2.0 − − − − − − 1.1 V mA dB MHz dB mA mA V V Notes 5 and 6 VCOMP = 5.0 V. Note 5 12 V ≤ VCC ≤ 25 V. Note 5 VSense = 0 V TJ = 25°C. Note 4 2.85 0.9 − − − 3.0 1.0 70 −2.0 150 3.15 1.1 − −10 300 V/V V dB mA ns Adjust VCC above the start threshold before setting at 15 V These parameters, although guaranteed, are not 100% tested in production Parameter measured at trip point of latch with VFB = 0 Gain defined as: A+ DVCOMP ; 0 v VSense v 0.8 V. DVSense http://onsemi.com 3 CS2841B ELECTRICAL CHARACTERISTICS (−40°C ≤ TA ≤ 85°C, RT = 680 kW, CT = 0.022 mF for Triangular Mode, VCC = 15 V (Note 3), RT = 10 kW, CT = 3.3 nF for Sawtooth Mode (see Figure 7); unless otherwise specified.) Characteristic Output Section Output Low Level Output High Level Rise Time Fall Time Output Leakage Total Standby Current Startup Current Operating Supply Current ICC Undervoltage Lockout Section Start Threshold Min. Operating Voltage After Turn On − 7.6 7.0 8.0 7.4 8.4 7.8 V V − VFB = VSense = 0 V, RT = 10 kW, CT = 3.3 nF − − 0.5 11 1.0 17 mA mA ISINK = 20 mA ISINK = 200 mA ISOURCE = 20 mA ISOURCE = 200 mA TJ = 25°C, CL = 1.0 nF. Note 7 TJ = 25°C, CL = 1.0 nF. Note 7 Undervoltage Active, VOUT = 0 − − 13 12 − − − 0.1 1.5 13.5 13.5 50 50 −0.01 0.4 2.2 − − 150 150 −10 V V V V ns ns mA Test Conditions Min Typ Max Unit 7. These parameters, although guaranteed, are not 100% tested in production. PACKAGE PIN DESCRIPTION PACKAGE PIN # PDIP−8 1 2 3 4 5 SOIC−14 1 3 5 7 8 9 6 10 11 7 8 12 14 2, 4, 6, 13 PIN SYMBOL COMP VFB Sense OSC GND Pwr GND VOUT VCC Pwr VCC VREF NC FUNCTION Error Amp Output, Used to Compensate Error Amplifier Error Amp Inverting Input Noninverting Input to Current Sense Comparator Oscillator Timing Network with Capacitor to Ground, Resistor to VREF Ground Output Driver Ground Output Drive Pin Output Driver Positive Supply Positive Power Supply Output of 5.0 V Internal Reference No Connection http://onsemi.com 4 CS2841B TYPICAL PERFORMANCE CHARACTERISTICS 100 RT = 680 W 90 Duty Cycle (%) .01 .02 .03 .04 .05 80 70 60 50 40 30 RT = 10 kW 20 10 100 200 300 400 500 700 10 k 1k 2k 3k 4k 5k 7k VCC 900 800 Frequency (kHz) 700 600 500 400 300 200 100 .0005 .001 .002 .003 .005 CT (mF) RT = 1.5 kW RT (W) Figure 2. Oscillator Frequency vs. CT Figure 3. Oscillator Duty Cycle vs. RT VREF RT 2N2222 4.7 kW 100 kW COMP VREF 0.1 mF VFB 5.0 kW Sense Adjust CS2841B Sense VOUT VCC 0.1 mF 1.0 kW 1.0 W VOUT A 1.0 kW Error Amp Adjust 4.7 kW OSC GND GND CT Figure 4. Test Circuit http://onsemi.com 5 CS2841B CIRCUIT DESCRIPTION Undervoltage Lockout During Undervoltage Lockout (Figure 5), the output driver is biased to a high impedance state. The output should be shunted to ground with a resistor to prevent output leakage current from activating the power switch. When the power supply sees a sudden large output current increase, the control voltage will increase allowing the duty cycle to momentarily increase. Since the duty cycle tends to exceed the maximum allowed to prevent transformer saturation in some power supplies, the internal oscillator waveform provides the maximum duty cycle clamp as programmed by the selection of OSC components. VCC ON/OFF Command to Reset of IC VREF VON = 8.0 V VOFF = 7.4 V RT OSC CT GND ICC Timing Parameters Vupper < 15 mA < 1.0 mA 7.4 V 8.0 V VCC Vlower Figure 5. Typical Undervoltage Characteristics tc Sawtooth Mode Large RT (≈ 10 kW) td PWM Waveform To generate the PWM waveform, the control voltage from the error amplifier is compared to a current sense signal representing the peak output inductor current (Figure 6). An increase in VCC causes the inductor current slope to increase, thus reducing the duty cycle. This is an inherent feed−forward characteristic of current mode control, since the control voltage does not have to change during changes of input supply voltage. VOSC Internal Clock Triangular Mode Small RT (≈ 700 kW) VOSC OSC OSC RESET EA Output Switch Current VCC Internal Clock Figure 7. Oscillator Timing Network and Parameters Setting the Oscillator IO VO Figure 6. Timing Diagram for Key CS2841B Parameters Oscillator timing capacitor, CT, is charged by VREF through RT and discharged by an internal current source. During the discharge time, the internal clock signal blanks out the output to the Low state, thus providing a user selected maximum duty cycle clamp. Charge and discharge times are determined by the general formulas: http://onsemi.com 6 CS2841B tc + RTCT ln VREF * Vlower VREF * Vupper The frequency and maximum duty cycle can be determined from the Typical Performance Characteristic graphs. Grounding td + RTCT ln VREF * IdRT * Vupper VREF * IdRT * Vlower Substituting in typical values for the parameters in the above formulas: VREF + 5.0 V Vupper + 2.7 V Vlower + 1.0 V Id + 8.3 mA tc [ 0.5534RTCT td + RTCT ln 2.3 * 0.0083RT 4.0 * 0.0083RT High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to GND pin in a single point ground. The transistor and 5.0 kW potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to Sense. VPR GND C1 68 mF C2 68 mF C3 4.7 pF 100 V 20T D2 MBR360 MURS120T3 D1 R2 47 9T C4 0.1 mF L1 2.2 mH C5 1000 mF C6 1000 mF C7 0.1 mF VCC VCC−GND Q1 2n4401 R1 4.7 k DZ1 13 V 1N5243B VCC = 5.0 V @ 750 mA VC C8 10 mF C9 0.1 mF VCC VREF C10 0.1 mF R5 2.0 k OSC GND C13 4.7 nF CS2841B SENSE COMP R7 PGND VFB R8 4.99 k 1.0 % C11 R9 0.2 1.0 % 22.1 k 0.33 mF C14 47 pF PVCC VOUT R3 4.99 k 1.0 % R4 C12 10 10 nF R6 1.0 k Q2 MTDISN06VTL4 Figure 8. Flyback Application http://onsemi.com 7 CS2841B L1 VPR C1 100 mF 100 V R2 10 C4 10 mF C5 0.1 mF VCC VREF C6 0.1 mF R4 3.0 k OSC GND C9 470 pF VOUT CS2841B SENSE COMP FB R8 2.0 k C7 0.01 mF R6 10 k R7 1.0 R3 10 R5 100 Q1 MTP12N10 100 mH D1 1N5818 17 V C2 330 mF C3 0.1 mF R1 12 k GND C8 1.0 nF D2 1N5818 Input Voltage Range: 8.0 V to 16 V Output Voltage: 17 V @ 100 mA > 300 mA Figure 9. Boost Application PACKAGE THERMAL DATA Parameter RqJC RqJA Typical Typical PDIP−8 52 100 SOIC−14 30 125 Unit °C/W °C/W http://onsemi.com 8 CS2841B PACKAGE DIMENSIONS PDIP−8 CASE 626−05 ISSUE L 8 5 −B− 1 4 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC −−− 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC −−− 10_ 0.030 0.040 F NOTE 2 −A− L C −T− SEATING PLANE J N D K M M TA M H G 0.13 (0.005) B M SOIC−14 CASE 751A−03 ISSUE G −A− 14 8 −B− P 7 PL 0.25 (0.010) M B M 1 7 G C R X 45 _ F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 −T− SEATING PLANE D 14 PL 0.25 (0.010) K M M S J TB A S DIM A B C D F G J K M P R http://onsemi.com 9 CS2841B ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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