EMI2121MTTAG

EMI2121, SZEMI2121 Single Pair Common Mode Filter with ESD Protection Description The EMI2121 is an integrated common mode filter providing both ESD protection and EMI filtering for high speed serial digital interfaces such as USB2.0. The EMI2121 provides EMI filtering for one differential data line pair and ESD protection for one data pair plus a supply input such as USB2.0 Vbus or USB ID pin. It is supplied in a small RoHS−compliant WDFN8 package. www.onsemi.com SIMPLIFIED SCHEMATIC External (Connector) 1 Features • • • • • • • 7 2 • Highly Integrated Common Mode Filter (CMF) with ESD Protection provides protection and EMI Reduction for systems using high speed Serial Data Lines with cost and space savings over Discrete Solutions Large Differential Mode Bandwidth with Cutoff Frequency > 2 GHz High Common Mode Stop Band Attenuation: >25 dB at 700 MHz, >30 dB at 800 MHz Typical Provides ESD Protection to IEC61000−4−2 Level 4, ±12 kV Contact Discharge Low Channel Input Capacitance provides Superior Impedance Matching Performance Low Profile Package with Small Footprint in WDFN8 2.0 mm length x 2.2 mm width x 0.75 mm height Pb−Free Package SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 8 Internal (ASIC) 6 3,4,5 MARKING DIAGRAM 8 WDFN8 CASE 511BN 1 1 C2 MG G C2 = Specific Device Code M = Date Code G = Pb−Free Device (Note: Microdot may be in either location) PIN CONNECTIONS In_1+ 1 8 Out_1+ • USB2.0 and other High Speed Differential Data Lines in Mobile In_1− 2 7 Out_1− • GND 3 6 VDD/ID 5 GND Applications Phones, Digital Still Cameras, and Automotive interfaces MIPI D−PHY GND 4 GND (Top View) ORDERING INFORMATION Package Shipping† WDFN8 (Pb−Free) 3000/Tape & Reel SZEMI2121MTTAG WDFN8 (Pb−Free) 3000/Tape & Reel Device EMI2121MTTAG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2013 May, 2019 − Rev. 3 1 Publication Order Number: EMI2121MT/D EMI2121, SZEMI2121 PIN DESCRIPTION Pin No. Pin Name Type 1 In_1+ I/O CMF Channel 1+ to Connector (External) Description 2 In_1− I/O CMF Channel 1− to Connector (External) 8 Out_1+ I/O CMF Channel 1+ to ASIC (Internal) 7 Out_1− I/O CMF Channel 1− to ASIC (Internal) 6 VDD/ID I/O Supply Protection to Connector (External) 3,4,5 GND GND Ground MAXIMUM RATINGS (TA = 25°C unless otherwise stated) Parameter Symbol Value Units Operating Temperature Range TOP −40 to +85 °C Storage Temperature Range TSTG −65 to +150 °C TL 260 °C ILINE 100 mA Maximum Lead Temperature for Soldering Purposes (1/8” from Case for 10 Seconds) DC Current per Line Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Parameter Symbol Test Conditions Channel Leakage Current ILEAK Channel Negative Voltage VF TA = 25°C, IF = 10 mA Channel Input Capacitance to ground (Pins 1,2,4,5 to Pins 3,8) CIN TA = 25°C, At 1 MHz, GND = 0 V, VIN = 1.65 V Channel Resistance (Pins 1−16, 2−15, 4−13, 5−12, 7−10 and 9−9) Rch Min Typ TA = 25°C, VIN = 5 V, GND = 0 V 0.1 0.8 Max Unit 1.0 mA 1.5 V 1.3 pF 8.0 W Differential Mode Cut*Off Frequency f3dB 50 W source and load termination 2.0 GHz Common Mode Stop Band Attenuation Fatten @ 800 MHz 30 dB In−system ESD Withstand Voltage a) Contact discharge per IEC 61000−4−2 standard, Level 4 (External Pins) b) Contact discharge per IEC 61000−4−2 standard, Level 1 (Internal Pins) VESD (Notes 1 and 2) TLP Clamping Voltage (See Figure 9) Reverse Working Voltage Breakdown Voltage ±2 VCL VRWM Forward IPP = 8 A Forward IPP = 12 A Reverse IPP = −8 A Reverse IPP = −12 A V V V V 5.0 V 9.0 V 8x20 ms Waveform 12 A IPP = 5 A 10 V IT = 1 mA; (Note 4) Maximum Peak Pulse Current (Pin 6 to GND) IPP Clamping Voltage (Pin 6 to GND) VC RDYN 13 16 −6 −8.5 (Note 3) VBR Dynamic Resistance Positive Transients Negative Transients kV ±12 TA = 25C, IPP=1 A, tP= 8/20 us, Any I/O to GND 5.5 0.67 0.59 W W 1. Standard IEC 61000−4−2 with CDischarge = 150 pF, RDischarge = 330, GND grounded. 2. These measurements performed with no external capacitor. 3. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC or continuous peak operating voltage level. 4. VBR is measured at pulse test current IT. www.onsemi.com 2 EMI2121, SZEMI2121 I/O 1 I/O 8 I/O 2 I/O 7 EMI2121MT 2 4 Network Analyzer 1 3 Normal (Differential) Mode Figure 1. Normal (Differential) Mode Test Configuration I/O 1 I/O 8 I/O 2 I/O 7 Differential Signal Driver and Transmission Line EMI2121MT Figure 2. Application Circuit www.onsemi.com 3 Differential Signal Buffer and Transmission Line EMI2121, SZEMI2121 TYPICAL CHARACTERISTICS Figure 3. Differential Mode Attenuation vs. Frequency (Zdiff = 100 W) Figure 4. Common Mode Attenuation vs. Frequency (Zcomm = 50 W) Figure 5. Differential Return Loss vs. Frequency (Zdiff=100 W) Figure 6. Differential Impedance vs. Frequency (Zdiff=100 W) Figure 7. EMI2121 Measured Eye Diagram @ 480 Mbps www.onsemi.com 4 EMI2121, SZEMI2121 Transmission Line Pulse (TLP) Measurements Transmission Line Pulse (TLP) provides current versus voltage (I−V) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in Figure 8. TLP I−V curves of ESD protection devices accurately demonstrate the product’s ESD capability because the 10 s of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 9 where an 8 kV IEC61000−4−2 current waveform is compared with TLP current pulses at 8 and 16 A. A TLP curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. Typical TLP I−V curves for the EMI2121 are shown in Figure 10. L SW Attenuator 50 W Coax Cable ÷ 50 W Coax Cable IM VM 10 MW VC DUT Oscilloscope Figure 8. Simplified Schematic of a Typical TLP System Figure 9. Comparison Between 8 kV IEC61000−4−2 and 8 A and 16 A TLP Waveforms -14 12 -12 10 -10 ) 8 A (t n e rr u 6 C -8 Current (A) 14 -6 4 -4 2 -2 0 0 0 2 4 6 8 10 12 14 16 0 18 -2 -4 -6 Voltage (V) Voltage (V) Figure 10. Positive and Negative TLP Waveforms www.onsemi.com 5 -8 -10 EMI2121, SZEMI2121 ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to On Semiconductor Application Notes AND8307/D and AND8308/D. IEC61000−4−2 Waveform IEC61000−4−2 Spec. Ipeak Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Oscilloscope TVS 50 W Cable 50 W Figure 11. Diagram of ESD Test Setup 100 % OF PEAK PULSE CURRENT ESD Gun PEAK VALUE IRSM @ 8 ms tr 90 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms 80 70 60 HALF VALUE IRSM/2 @ 20 ms 50 40 30 tP 20 10 0 0 20 40 t, TIME (ms) 60 Figure 12. 8 x 20 ms Pulse Waveform www.onsemi.com 6 80 EMI2121, SZEMI2121 Figure 13. ESD Clamping Voltage +8 kV per IEC6100−4−2 (external to internal pin) Figure 14. ESD Clamping Voltage −8 kV per IEC6100−4−2 (external to internal pin) www.onsemi.com 7 EMI2121, SZEMI2121 Micro USB Connector VBUS ID ID or Vbus (red= inner layer ) EMI 2121 D+ D+ D− D− ID or VBUS GND GND (Top View) Figure 15. EMI2121 Micro − USB Connector Application Diagram www.onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WDFN8, 2.2x2, 0.5P CASE 511BN ISSUE A 8 DATE 11 DEC 2012 1 SCALE 4:1 PIN ONE REFERENCE 2X L A B D ÉÉÉ ÉÉÉ ÉÉÉ L1 E DETAIL A OPTIONAL CONSTRUCTIONS 0.10 C 0.10 C 2X ÇÇ ÇÇ ÉÉ EXPOSED Cu TOP VIEW A DETAIL B 0.05 C MOLD CMPD ÉÉ ÉÉ ÇÇ A1 DETAIL B 9X 0.05 C OPTIONAL CONSTRUCTIONS A3 A1 SIDE VIEW NOTE 4 SEATING PLANE C b1 0.10 C A B DETAIL C D2 1 4X 2X 4 DIM A A1 A3 b b1 D D2 E E2 e L L1 L2 L3 L L3 DETAIL C 1 8 b 0.10 C A B DETAIL A e/2 NOTE 3 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. BOTTOM VIEW RECOMMENDED SOLDERING FOOTPRINT* 7X 0.54 0.30 XX MG G XX = Specific Device Code M = Date Code G = Pb−Free Device 5 e MILLIMETERS MIN MAX 0.70 0.80 0.00 0.05 0.20 REF 0.15 0.25 0.25 0.35 2.20 BSC 0.34 0.54 2.00 BSC 0.60 0.80 0.50 BSC 0.75 0.95 0.05 0.15 0.30 0.50 0.15 0.25 GENERIC MARKING DIAGRAM* L2 E2 A3 0.10 C A B 7X 0.05 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.25 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. PACKAGE OUTLINE 0.80 2.30 4X 4X 1.00 0.60 1 0.50 PITCH 0.40 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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