FDS6675

FDS6675 Single P-Channel, Logic Level, PowerTrenchTM MOSFET General Description Features This P-Channel Logic Level MOSFET is produced using ON Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. These devices are well suited for notebook computer applications: load switching and power management, battery charging circuits, and DC/DC conversion. SuperSOTTM-6 SOT-23 D SuperSOTTM-8 D D D S F D 75 66 SO-8 pin 1 Absolute Maximum Ratings S S S G -11 A, -30 V. RDS(ON) = 0.014 Ω @ VGS = -10 V, RDS(ON) = 0.020 Ω @ VGS = -4.5 V. Low gate charge (30nC typical). High performance trench technology for extremely low RDS(ON). High power and current handling capability. SO-8 SOIC-16 SOT-223 5 4 6 3 7 2 8 1 TA = 25oC unless otherwise noted Symbol Parameter FDS6675 Units VDSS Drain-Source Voltage -30 V VGSS Gate-Source Voltage ±20 V ID Drain Current - Continuous -11 A (Note 1a) - Pulsed PD Power Dissipation for Single Operation -50 (Note 1a) 2.5 (Note 1b) 1.2 (Note 1c) TJ,TSTG Operating and Storage Temperature Range W 1 -55 to 150 °C THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 50 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 25 °C/W © 1998 Semiconductor Components Industries, LLC. October-2017, Rev. 3 Publication Order Number: FDS6675/D Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, I D = -250 µA -30 ∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient ID = -250 µA, Referenced to 25 C IDSS Zero Gate Voltage Drain Current VDS = -24 V, VGS = 0 V o V mV/oC -22 TJ = 55°C -1 µA -10 µA IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA ON CHARACTERISTICS (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA ∆VGS(th)/∆TJ Gate Threshold Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 oC -1 RDS(ON) Static Drain-Source On-Resistance VGS = -10 V, I D = -11 A -1.7 -3 TJ =125°C VGS = -4.5 V, I D = -9 A V mV/oC 4.3 0.011 0.014 0.016 0.023 0.015 0.02 -50 Ω ID(ON) On-State Drain Current VGS = -10 V, VDS = -5 V gFS Forward Transconductance VDS = -10 V, I D = -11 A 32 A S VDS = -15 V, VGS = 0 V, f = 1.0 MHz 3000 pF 870 pF 360 pF DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time VDS = -15 V, I D = -1 A 12 22 ns tr Turn - On Rise Time VGEN = -10 V, RGEN = 6 Ω 16 27 ns tD(off) Turn - Off Delay Time 50 80 ns tf Turn - Off Fall Time 100 140 ns Qg Total Gate Charge VDS = -15 V, I D = -11 A, 30 42 nC Qgs Gate-Source Charge VGS = -5 V 9 nC Qgd Gate-Drain Charge 11 nC DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -2.1 A (Note 2) -0.72 -2.1 A -1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 50OC/W on a 0.5 in2 pad of 2oz copper. b. 105OC/W on a 0.02 in2 pad of 2oz copper. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. www.onsemi.com 2 c. 125OC/W on a 0.003 in2 pad of 2oz copper. Typical Electrical Characteristics 40 R DS(ON), NORMALIZED - I D , DRAIN-SOURCE CURRENT (A) VGS = -10V -6.0V -4.5V -3.5V 30 20 -3.0V 10 DRAIN-SOURCE ON-RESISTANCE 2.5 50 -4.0V 1.5 -4.5 V -5.5V -7.0V -10V 1 0.5 0 0 0.6 1.2 -V DS 1.8 2.4 0 3 1 0.8 -25 0 I D = -5.5A R DS(ON), ON-RESISTANCE (OHM) DRAIN-SOURCE ON-RESISTANCE 50 25 50 75 100 125 0.04 0.03 TJ = 125°C 0.02 0.01 0 150 25° C 0 2 4 6 8 - VGS , GATE TO SOURCE VOLTAGE (V) TJ , JUNCTION TEMPERATURE (° C) Figure 3. On-Resistance Variation with Temperature. 10 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 50 V DS = -5.0V TJ = -55° C 40 - I S, REVERSE DRAIN CURRENT (A) 50 - I D , DRAIN CURRENT (A) 40 0.05 ID = -11A VGS = -10V 1.2 0.6 -50 20 30 - I D , DRAIN CURRENT (A) Figure 2. On-Resistance Variation with Dain Current and Gate Voltage. 1.6 1.4 10 , DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. R DS(ON) , NORMALIZED V GS = -3.5V 2 25° C 125° C 30 20 10 VGS = 0V 10 TJ = 125° C 1 25° C -55° C 0.1 0.01 0.001 0 1 2 3 4 5 0 0.4 -V - VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. SD 0.8 , BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. www.onsemi.com 3 1.2 Typical Electrical Characteristics (continued) 6000 ID = -11A 4000 V DS = -5V Ciss -10V 8 CAPACITANCE (pF) - VGS , GATE-SOURCE VOLTAGE (V) 10 -15V 6 4 2000 Coss 1000 500 Crss 2 f = 1 MHz VGS = 0 V 200 0 0 12 24 36 48 100 0.1 60 Q g , GATE CHARGE (nC) 0.5 2 5 10 20 30 Figure 8. Capacitance Characteristics. 50 100 10 10 1m 10m 3 VGS = -10V SINGLE PULSE R θJA = 125° C/W TA = 2 5 ° C 0.01 0.05 0.1 s SINGLE PULSE RθJA =125°C/W TA = 25°C 40 s s 1s 10 0m DC s 10 s 0.5 0.05 0u POWER (W) IT LIM N) S(O RD 30 30 20 10 0.3 1 3 10 30 0 0.001 50 0.01 0.1 1 10 100 SINGLE PULSE TIME (SEC) - V DS , DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 - V DS , DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. - I D, DRAIN CURRENT (A) 0.2 Figure 10. Single Pulse Maximum Power Dissipation. 1 0.5 0.2 0.1 0.05 0.02 D = 0.5 R θJA (t) = r(t) * R θJA R θJA = 125°C/W 0.2 0.1 0.05 P(pk) 0.02 0.01 0.01 t1 Single Pulse Duty Cycle, D = t1 /t2 0.002 0.001 0.0001 t2 TJ - TA = P * RθJA (t) 0.005 0.001 0.01 0.1 1 10 t1 , TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. www.onsemi.com 4 100 300 300 SO-8 Tape and Reel Data and Package Dimensions SOIC(8lds) Packaging Configuration: Figure 1.0 N ELECTROSTATIC SENSITIVE DEVICES DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC ELECTROMAGNETIC, MAGNETIC OR RADIOACTIVE FIELDS TNR DATE PT NUMBER PEEL STRENGTH MIN ______________ gms MAX _____________ gms ESD Label Antistatic Cover Tape Conductive Embossed Carrier Tape F63TNR Label Pin 1 F852 831N F852 831N F852 831N F852 831N Customized Label SOIC-8 Unit Orientation SOIC (8lds) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Standard (no flow code) TNR L86Z S62Z D84Z Rail/Tube Bag TNR 2,500 95 200 500 13” Dia - - 7” Dia 184x187x47 343x64x343 530x130x83 76x102x127 Max qty per Box 5,000 30,000 1,000 2,500 Weight per unit (gm) 0.0774 0.0774 0.0774 0.0774 Weight per Reel (kg) 0.6060 - - 0.1182 Note/Comments Bulk 343mm x 342mm x 64mm Standard Intermediate box ESD Label F63TNR Label sample F63TNLabel F63TNLabel QTY: 2500 LOT: CBVK741B019 SPEC: FSID: FDS9953A ESD Label D/C1: D9842 D/C2: QTY1: QTY2: SPEC REV: CPN: QARV: (F63TNR)2 SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0 Carrier Tape Cover Tape Trailer Tape 160mm minimum Components www.onsemi.com 5 Leader Tape 390mm minimum SO-8 Tape and Reel Data and Package Dimensions, continued SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0 P0 D0 T E1 F K0 Wc W E2 B0 Tc A0 D1 P1 User Direction of Feed Dimensions are in millimeter Pkg type SOIC(8lds) (12mm) A0 6.50 +/-0.10 B0 5.30 +/-0.10 W 12.0 +/-0.3 D0 D1 1.55 +/-0.05 E1 1.60 +/-0.10 E2 1.75 +/-0.10 F 10.25 min P1 5.50 +/-0.05 P0 8.0 +/-0.1 4.0 +/-0.1 K0 2.1 +/-0.10 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). T Wc 0.450 +/0.150 9.2 +/-0.3 0.06 +/-0.02 0.5mm maximum 20 deg maximum Typical component cavity center line B0 Tc 0.5mm maximum 20 deg maximum component rotation Typical component center line Sketch A (Side or Front Sectional View) A0 Component Rotation Sketch C (Top View) Component lateral movement Sketch B (Top View) SOIC(8lds) Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max Dim A max See detail AA Dim N 7” Diameter Option B Min Dim C See detail AA W3 13” Diameter Option Dim D min W2 max Measured at Hub DETAIL AA Dimensions are in inches and millimeters Tape Size Reel Option Dim A Dim B 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 5.906 150 0.488 +0.078/-0.000 12.4 +2/0 0.724 18.4 0.469 – 0.606 11.9 – 15.4 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 7.00 178 0.488 +0.078/-0.000 12.4 +2/0 0.724 18.4 0.469 – 0.606 11.9 – 15.4 12mm 7” Dia 7.00 177.8 12mm 13” Dia 13.00 330 Dim C Dim D Dim N www.onsemi.com 6 Dim W1 Dim W2 Dim W3 (LSL-USL) SO-8 Tape and Reel Data and Package Dimensions, continued SOIC-8 (FS PKG Code S1) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.0774 9 www.onsemi.com 7 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. 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