FDWS9508L-F085

DATA SHEET www.onsemi.com MOSFET – P-Channel, Logic Level, POWERTRENCH) -40 V, -80 A, 4.9 mW VDSS RDS(ON) MAX ID MAX −40 V 4.9 mW @ −10 V −80 A FDWS9508L-F085 S Features • • • • • • G Typ RDS(on) = 3,6 mW at VGS = −10 V; ID = −80 A Typ Qg(tot) = 82 nC at VGS = −10 V; ID = −80 A UIS Capability Wettable Flanks for Automatic Optical Inspection (AOI) AEC−Q101 Qualified These Devices are Pb−Free and are RoHS Compliant D P−Channel MOSFET Applications • • • • • • • Top Automotive Engine Control PowerTrain Management Solenoid and Motor Drivers Electrical Power Steering Integrated Starter/Alternator Distributed Power Architectures and VRM Primary Switch for 12 V Systems D G Ratings Unit Drain to Source Voltage −40 V VGS Gate to Source Voltage ±16 V Drain Current (TC = 25°C) Continuous (VGS = −10 V) (Note 1) Pulsed −80 (see Fig. 4) Single Pulse Avalanche Energy (Note 2) 211 mJ PD Power Dissipation Derate Above 25°C 214 1.43 W W/°C −55 to +175 °C Operating and Storage Temperature RθJC Thermal Resistance (Junction to case) 0.7 °C/W RθJA Maximum Thermal Resistance (Junction to Ambient) (Note 3) 50 °C/W Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Current is limited by wirebond configuration 2. Starting Tj = 25°C, L = 0.1 mH, IAS = −65 A, VDD = −40 V during inductor charging and VDD = 0 V during time in avalanche 3. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by design while RqJA is determined by the user’s board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2 oz copper. © Semiconductor Components Industries, LLC, 2016 October, 2021 − Rev. 3 D S MARKING DIAGRAM ON AYWWWL FDWS 9508L A EAS TJ, TSTG S D Pin 1 VDSS ID Parameter S D DFNW8 CASE 507AU MOSFET MAXIMUM RATINGS (TJ = 25°C, Unless otherwise specified) Symbol Bottom 1 A Y WW WL FDWS 9508L = Assembly Location = Year = Work Week = Assembly Lot = Device Code = Device Code (Note: Microdot may be in either location) ORDERING INFORMATION Device FDWS9508L−F085 Package Shipping† DFNW8 (Power56) (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: FDWS9508L−F085/D FDWS9508L−F085 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit −40 − − V OFF CHARACTERISTICS BVDSS IDSS IGSS Drain−to−Source Breakdown Voltage ID = −250 mA, VGS = 0 V Drain−to−Source Leakage Current VDS = −40 V, VGS = 0 V, TJ = 25°C − − −1 mA VDS = −40 V, VGS = 0 V, TJ = 175°C (Note 4) − − −1 mA Gate−to−Source Leakage Current VGS = ±16 V, VDS = 0 V − − ±100 nA −1.0 −1.8 −3.0 V mW ON CHARACTERISTICS VGS(th) Gate−to−Source Threshold Voltage VGS = VDS, ID = −250 mA RDS(on) Drain to Source On−Resistance ID = −80 A, VGS = −4.5 V, TJ = 25°C − 5.6 8.5 ID = −80 A, VGS = −10 V, TJ = 25°C − 3.6 4.9 ID = −80 A, VGS = −10 V, TJ = 175°C (Note 4) − 5.9 8.0 VDS = −20 V, VGS = 0 V, f = 1 MHz − 4840 − DYNAMIC CHARACTERISTICS pF Ciss Input Capacitance Coss Output Capacitance − 2310 − Crss Reverse Transfer Capacitance − 49 − − 24 − W − 82 107 nC − 11 − Rg Qg(ToT) Qg(th) Gate Resistance f = 1 MHz Total Gate Charge at 10 V VGS = 0 V to −10 V Threshold Gate Charge VGS = 0 V to −2 V Qgs Gate−to−Source Gate Charge Qgd Gate−to−Drain “Miller” Charge VDD = −32 V, ID = −80 A 20 − 10 − − − 23 − 10 − Rise Time − 5 − Turn−Off Delay Time − 389 − Fall Time − 114 − Turn−Off Time − − 780 SWITCHING CHARACTERISTICS ton td(on) tr td(off) tf toff Turn−On Time Turn−On Delay Time VDD = −20 V, ID = −80 A, VGS = −10 V, RGEN = 6 W ns DRAIN−SOURCE DIODE CHARACTERISTICS VSD Source−to−Drain Diode Voltage ISD = −80 A, VGS = 0 V − − −1.25 V ISD = −40 A, VGS = 0 V − − −1.2 trr Reverse Recovery Time − 82 107 ns Qrr Reverse Recovery Charge ISD = −80 A, DISD/Dt = 100 A/ms, VDD = −32 V − 95 124 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. NOTE: 4. The maximum value is specified by design at TJ = 175°C. Product is not tested to this condition in production. www.onsemi.com 2 FDWS9508L−F085 1.2 180 1.0 150 0.8 0.6 0.4 0.2 0 ZqJC, NORMALIZED THERMAL IMPEDANCE ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER TYPICAL CHARACTERISTICS 0 25 50 75 100 125 150 Current Limited by Package 120 VGS = −10 V 90 60 30 0 175 25 50 75 100 125 150 175 TC, CASE TEMPERATURE (°C) TC, CASE TEMPERATURE (°C) Figure 1. Normalized Power Dissipation vs. Case Temperature Figure 2. Maximum Continuous Drain Current vs. Case Temperature 2 Duty Cycle − Descending Order 1 PDM D = 0.50 0.20 0.10 0.05 0.02 0.01 0.1 t1 t2 Notes: Duty Factor: D = t1/t2 Peak TJ = PDM x ZqJA x RqJA + TC Single Pulse 0.01 10−5 10−4 10−3 10−2 10−1 100 101 t, RECTANGULAR PULSE DURATION (s) Figure 3. Normalized Maximum Transient Thermal Impedance 10000 −IDM, PEAK CURRENT (A) VGS = −10 V TC = 25°C For temperatures above 25°C derate peak current as follows: ƪǸ 1000 I + I 25 ƫ 175 * T C 150 100 Single Pulse 10 10−5 10−4 10−3 10−2 t, RECTANGULAR PULSE DURATION (s) Figure 4. Peak Current Capability www.onsemi.com 3 10−1 100 101 FDWS9508L−F085 TYPICAL CHARACTERISTICS 1000 −IAS, AVALANCHE CURRENT (A) −ID, DRAIN CURRENT (A) 1000 100 100 ms 10 Limited by package 1 1 ms Operation in this area may be limited by RDS(on) 10 ms 100 ms Single Pulse TC = 25°C TJ = Max Rated 0.1 1 10 If R = 0 tAV=(L)(IAS)/(1.3*Rated BVDSS− VDD) If R ≠ 0 tAV=(L/R)In[(IAS*R)/(1.3*Rated BVDSS− VDD)+1] 100 Starting TJ = 25°C 10 Starting TJ = 150°C 1 1E−3 100 0.01 1 0.1 −VDS, DRAIN TO SOURCE VOLTAGE (V) 100 10 1000 10000 tAV, TIME IN AVALANCHE (ms) NOTE: Refer to onsemi Application Notes AN7514 and AN7515 −ID, DRAIN CURRENT (A) 300 Figure 6. Unclamped Inductive Switching Capability −IS, REVERSE DRAIN CURRENT (A) Figure 5. Forward Bias Safe Operating Area Pulse Duration = 250 ms Duty Cycle = 0.5% Max 250 VDS = −5 V 200 150 TJ = 25°C 100 TJ = 175°C 50 TJ = −55°C 0 2 3 TJ = 175°C TJ = 25°C 1 0.1 0 0.2 0.6 0.4 0.8 1.0 −VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 7. Transfer Characteristics Figure 8. Forward Diode Characteristics 1.2 300 250 −ID, DRAIN CURRENT (A) −ID, DRAIN CURRENT (A) 10 −VGS, GATE TO SOURCE VOLTAGE (V) 300 VGS −10 V Top −7 V −5 V −4.5 V −4 V −3.5 V Bottom 200 150 100 250 ms Pulse Width TJ = 25°C 50 0 VGS = 0 V 100 0.01 5 4 300 0 1 2 3 200 150 100 250 ms Pulse Width TJ = 175°C 50 0 5 4 VGS −10 V Top −7 V −5 V −4.5 V −4 V −3.5 V Bottom 250 0 1 2 3 4 −VDS, DRAIN TO SOURCE VOLTAGE (V) −VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 9. Saturation Characteristics Figure 10. Saturation Characteristics www.onsemi.com 4 5 FDWS9508L−F085 TYPICAL CHARACTERISTICS 25 20 15 TJ = 175°C 10 5 TJ = 25°C 0 2 3 6 5 4 7 9 8 1.4 1.2 1.0 ID = −80 A VGS = −10 V 0.8 0 −40 40 160 120 80 −VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C) Figure 11. RDS(on) vs. Gate Voltage Figure 12. Normalized RDS(on) vs. Junction Temperature 200 1.10 1.4 VGS = VDS ID = −250 mA 1.2 1.0 0.8 0.6 0.4 0.2 −80 −40 40 0 80 120 160 200 ID = −5 mA 1.05 1.00 0.95 0.90 −80 −40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 13. Normalized Gate Threshold Voltage vs. Temperature Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature 10K CISS 1K 100 10 0.1 −VGS, GATE TO SOURCE VOLTAGE (V) 100K CAPACITANCE (pF) Pulse Duration = 250 ms Duty Cycle = 0.5% Max 1.6 0.6 −80 10 NORMALIZED DRAIN−TO−SOURCE BREAKDOWN VOLTAGE NORMALIZED GATE THRESHOLD VOLTAGE 1.8 Pulse Duration = 250 ms Duty Cycle = 0.5% Max ID = −80 A NORMALIZED DRAIN TO SOURCE ON−RESISTANCE RDS(on), DRAIN TO SOURCE ON−RESISTANCE (mW) 30 COSS f = 1 MHz VGS = 0 V CRSS 1 10 10 VDD = −16 V ID = −80 A 8 VDD = −24 V 6 VDD = −20 V 4 2 0 40 0 10 20 30 40 50 60 70 80 −VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 15. Capacitance vs. Drain to Source Voltage Figure 16. Gate Charge vs. Gate to Source Voltage www.onsemi.com 5 90 FDWS9508L−F085 PACKAGE DIMENSIONS DFNW8 5.2x6.3, 1.27P CASE 507AU ISSUE A www.onsemi.com 6 FDWS9508L−F085 POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. 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