MPSA13RLRAG

MPSA13, MPSA14 MPSA14 is a Preferred Device Darlington Transistors NPN Silicon Features http://onsemi.com • Pb−Free Packages are Available* COLLECTOR 3 MAXIMUM RATINGS Rating Symbol Value Unit Collector −Emitter Voltage VCES 30 Vdc Collector −Base Voltage VCBO 30 Vdc Emitter −Base Voltage VEBO 10 Vdc Collector Current − Continuous IC 500 mAdc Total Device Dissipation @ TA = 25°C Derate above 25°C PD 625 5.0 mW mW/°C Total Device Dissipation @ TC = 25°C Derate above 25°C PD 1.5 12 W mW/°C TJ, Tstg −55 to +150 °C Operating and Storage Junction Temperature Range EMITTER 1 TO−92 CASE 29 STYLE 1 1 12 THERMAL CHARACTERISTICS Characteristic BASE 2 Symbol Max Unit Thermal Resistance, Junction−to−Ambient RqJA 200 °C/mW Thermal Resistance, Junction−to−Case RqJC 83.3 °C/mW Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 3 STRAIGHT LEAD BULK PACK 2 3 BENT LEAD TAPE & REEL AMMO PACK MARKING DIAGRAM MPS A1x AYWW G G x = 3 or 4 A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2007 April, 2007 − Rev. 4 1 Preferred devices are recommended choices for future use and best overall value. Publication Order Number: MPSA13/D MPSA13, MPSA14 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Max Unit V(BR)CES 30 − Vdc Collector Cutoff Current (VCB= 30 Vdc, IE = 0) ICBO − 100 nAdc Emitter Cutoff Current (VEB= 10 Vdc, IC = 0) IEBO − 100 nAdc 5,000 10,000 10,000 20,000 − − − − OFF CHARACTERISTICS Collector −Emitter Breakdown Voltage (IC = 100 mAdc, IB = 0) ON CHARACTERISTICS (Note 1) DC Current Gain (IC = 10 mAdc, VCE = 5.0 Vdc) hFE MPSA13 MPSA14 MPSA13 MPSA14 (IC = 100 mAdc, VCE = 5.0 Vdc) − Collector −Emitter Saturation Voltage (IC = 100 mAdc, IB = 0.1 mAdc) VCE(sat) − 1.5 Vdc Base −Emitter On Voltage (IC = 100 mAdc, VCE = 5.0 Vdc) VBE(on) − 2.0 Vdc 125 − SMALL−SIGNAL CHARACTERISTICS fT Current−Gain − Bandwidth Product (Note 2) (IC = 10 mAdc, VCE = 5.0 Vdc, f = 100 MHz) MHz 1. Pulse Test: Pulse Width v 300 ms; Duty Cycle v 2.0%. 2. fT = |hfe| S ftest. ORDERING INFORMATION Package Shipping† TO−92 5000 Units / Bulk TO−92 (Pb−Free) 5000 Units / Bulk TO−92 2000 / Tape & Reel MPSA13RLRAG TO−92 (Pb−Free) 2000 / Tape & Reel MPSA13RLRMG TO−92 (Pb−Free) 2000 / Ammo Pack MPSA13RLRPG TO−92 (Pb−Free) 2000 / Ammo Pack MPSA13ZL1G TO−92 (Pb−Free) 2000 / Ammo Pack MPSA14G TO−92 (Pb−Free) 5000 Units / Bulk MPSA14RLRAG TO−92 (Pb−Free) 2000 / Tape & Reel MPSA14RLRPG TO−92 (Pb−Free) 2000 / Ammo Pack Device MPSA13 MPSA13G MPSA13RLRA †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 MPSA13, MPSA14 RS in en IDEAL TRANSISTOR Figure 1. Transistor Noise Model NOISE CHARACTERISTICS (VCE = 5.0 Vdc, TA = 25°C) 2.0 BANDWIDTH = 1.0 Hz RS ≈ 0 200 BANDWIDTH = 1.0 Hz i n, NOISE CURRENT (pA) en, NOISE VOLTAGE (nV) 500 100 10 mA 50 100 mA 20 IC = 1.0 mA 10 1.0 0.7 0.5 IC = 1.0 mA 0.3 0.2 100 mA 0.1 0.07 0.05 10 mA 0.03 5.0 10 20 50 100 200 500 1k 2k 5k 10k 20k f, FREQUENCY (Hz) 50k 100k 0.02 10 20 50 100 200 50k 100k Figure 3. Noise Current 14 200 BANDWIDTH = 10 Hz TO 15.7 kHz 12 BANDWIDTH = 10 Hz TO 15.7 kHz 100 NF, NOISE FIGURE (dB) VT, TOTAL WIDEBAND NOISE VOLTAGE (nV) Figure 2. Noise Voltage 500 1k 2k 5k 10k 20k f, FREQUENCY (Hz) IC = 10 mA 70 50 100 mA 30 20 1.0 mA 10 1.0 2.0 10 10 mA 8.0 100 mA 6.0 4.0 IC = 1.0 mA 2.0 5.0 10 20 50 100 200 RS, SOURCE RESISTANCE (kW) 500 1000 0 1.0 Figure 4. Total Wideband Noise Voltage 2.0 5.0 10 20 50 100 200 RS, SOURCE RESISTANCE (kW) Figure 5. Wideband Noise Figure http://onsemi.com 3 500 1000 MPSA13, MPSA14 SMALL−SIGNAL CHARACTERISTICS 4.0 |h fe |, SMALL−SIGNAL CURRENT GAIN C, CAPACITANCE (pF) 20 TJ = 25°C 10 7.0 Cibo Cobo 5.0 3.0 2.0 0.04 0.1 0.2 0.4 1.0 2.0 4.0 VR, REVERSE VOLTAGE (VOLTS) 10 20 VCE = 5.0 V f = 100 MHz TJ = 25°C 2.0 1.0 0.8 0.6 0.4 0.2 0.5 40 1.0 200k hFE, DC CURRENT GAIN TJ = 125°C 100k 70k 50k 25°C 30k 20k 10k 7.0k 5.0k −55 °C VCE = 5.0 V 3.0k 2.0k 5.0 7.0 10 20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (mA) 500 TJ = 25°C 2.5 IC = 10 mA RθV, TEMPERATURE COEFFICIENTS (mV/°C) TJ = 25°C V, VOLTAGE (VOLTS) 1.4 VBE(sat) @ IC/IB = 1000 1.2 VBE(on) @ VCE = 5.0 V 1.0 VCE(sat) @ IC/IB = 1000 5.0 7.0 10 50 mA 250 mA 500 mA 2.0 1.5 1.0 0.5 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 IB, BASE CURRENT (mA) 100 200 500 1000 Figure 9. Collector Saturation Region 1.6 0.6 500 3.0 Figure 8. DC Current Gain 0.8 0.5 10 20 50 100 200 IC, COLLECTOR CURRENT (mA) Figure 7. High Frequency Current Gain VCE , COLLECTOR−EMITTER VOLTAGE (VOLTS) Figure 6. Capacitance 2.0 20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (mA) 500 −1.0 −2.0 *APPLIES FOR IC/IB ≤ hFE/3.0 25°C TO 125°C *RqVC FOR VCE(sat) −55 °C TO 25°C −3.0 25°C TO 125°C −4.0 qVB FOR VBE −5.0 −55 °C TO 25°C −6.0 5.0 7.0 10 Figure 10. “On” Voltages 20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (mA) Figure 11. Temperature Coefficients http://onsemi.com 4 500 1.0 0.7 0.5 D = 0.5 0.2 0.3 0.2 0.1 0.05 SINGLE PULSE 0.1 0.07 0.05 SINGLE PULSE ZqJC(t) = r(t) • RqJCTJ(pk) − TC = P(pk) ZqJC(t) ZqJA(t) = r(t) • RqJATJ(pk) − TA = P(pk) ZqJA(t) 0.03 0.02 0.01 0.1 0.2 0.5 1.0 2.0 10 5.0 20 50 t, TIME (ms) 100 200 500 Figure 12. Thermal Response 1.0k 700 500 IC, COLLECTOR CURRENT (mA) r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) MPSA13, MPSA14 300 200 1.0 ms TC = 25°C TA = 25°C 100 ms 1.0 s 100 70 50 30 CURRENT LIMIT THERMAL LIMIT SECOND BREAKDOWN LIMIT 20 10 0.4 0.6 1.0 2.0 4.0 6.0 10 20 VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS) 40 Figure 13. Active Region Safe Operating Area FIGURE A tP PP PP t1 1/f t DUTYCYCLE + t1f + 1 tP PEAK PULSE POWER = PP Design Note: Use of Transient Thermal Resistance Data http://onsemi.com 5 1.0k 2.0k 5.0k 10k MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−92 (TO−226) CASE 29−11 ISSUE AM SCALE 1:1 1 12 3 STRAIGHT LEAD BULK PACK DATE 09 MAR 2007 2 3 BENT LEAD TAPE & REEL AMMO PACK A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. STRAIGHT LEAD BULK PACK R P L SEATING PLANE K DIM A B C D G H J K L N P R V D X X G J H V C SECTION X−X N 1 INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 --0.250 --0.080 0.105 --0.100 0.115 --0.135 --- MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 --6.35 --2.04 2.66 --2.54 2.93 --3.43 --- N A R NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. BENT LEAD TAPE & REEL AMMO PACK B P T SEATING PLANE G K DIM A B C D G J K N P R V D X X J V 1 C N SECTION X−X MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.40 0.54 2.40 2.80 0.39 0.50 12.70 --2.04 2.66 1.50 4.00 2.93 --3.43 --- STYLES ON PAGE 2 DOCUMENT NUMBER: STATUS: 98ASB42022B ON SEMICONDUCTOR STANDARD NEW STANDARD: © Semiconductor Components Industries, LLC, 2002 October, DESCRIPTION: 2002 − Rev. 0 TO−92 (TO−226) http://onsemi.com 1 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. Case Outline Number: PAGE 1 OFXXX 3 TO−92 (TO−226) CASE 29−11 ISSUE AM DATE 09 MAR 2007 STYLE 1: PIN 1. EMITTER 2. BASE 3. COLLECTOR STYLE 2: PIN 1. BASE 2. EMITTER 3. COLLECTOR STYLE 3: PIN 1. ANODE 2. ANODE 3. CATHODE STYLE 4: PIN 1. CATHODE 2. CATHODE 3. ANODE STYLE 5: PIN 1. DRAIN 2. SOURCE 3. GATE STYLE 6: PIN 1. GATE 2. SOURCE & SUBSTRATE 3. DRAIN STYLE 7: PIN 1. SOURCE 2. DRAIN 3. GATE STYLE 8: PIN 1. DRAIN 2. GATE 3. SOURCE & SUBSTRATE STYLE 9: PIN 1. BASE 1 2. EMITTER 3. BASE 2 STYLE 10: PIN 1. CATHODE 2. GATE 3. ANODE STYLE 11: PIN 1. ANODE 2. CATHODE & ANODE 3. CATHODE STYLE 12: PIN 1. MAIN TERMINAL 1 2. GATE 3. MAIN TERMINAL 2 STYLE 13: PIN 1. ANODE 1 2. GATE 3. CATHODE 2 STYLE 14: PIN 1. EMITTER 2. COLLECTOR 3. BASE STYLE 15: PIN 1. ANODE 1 2. CATHODE 3. ANODE 2 STYLE 16: PIN 1. ANODE 2. GATE 3. CATHODE STYLE 17: PIN 1. COLLECTOR 2. BASE 3. EMITTER STYLE 18: PIN 1. ANODE 2. CATHODE 3. NOT CONNECTED STYLE 19: PIN 1. GATE 2. ANODE 3. CATHODE STYLE 20: PIN 1. NOT CONNECTED 2. CATHODE 3. ANODE STYLE 21: PIN 1. COLLECTOR 2. EMITTER 3. BASE STYLE 22: PIN 1. SOURCE 2. GATE 3. DRAIN STYLE 23: PIN 1. GATE 2. SOURCE 3. DRAIN STYLE 24: PIN 1. EMITTER 2. COLLECTOR/ANODE 3. CATHODE STYLE 25: PIN 1. MT 1 2. GATE 3. MT 2 STYLE 26: PIN 1. VCC 2. GROUND 2 3. OUTPUT STYLE 27: PIN 1. MT 2. SUBSTRATE 3. MT STYLE 28: PIN 1. CATHODE 2. ANODE 3. GATE STYLE 29: PIN 1. NOT CONNECTED 2. ANODE 3. CATHODE STYLE 30: PIN 1. DRAIN 2. GATE 3. SOURCE STYLE 31: PIN 1. GATE 2. DRAIN 3. SOURCE STYLE 32: PIN 1. BASE 2. COLLECTOR 3. EMITTER STYLE 33: PIN 1. RETURN 2. INPUT 3. OUTPUT STYLE 34: PIN 1. INPUT 2. GROUND 3. LOGIC STYLE 35: PIN 1. GATE 2. COLLECTOR 3. EMITTER DOCUMENT NUMBER: STATUS: 98ASB42022B ON SEMICONDUCTOR STANDARD NEW STANDARD: © Semiconductor Components Industries, LLC, 2002 October, DESCRIPTION: 2002 − Rev. 0 TO−92 (TO−226) http://onsemi.com 2 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. Case Outline Number: PAGE 2 OFXXX 3 DOCUMENT NUMBER: 98ASB42022B PAGE 3 OF 3 ISSUE AM REVISION ADDED BENT−LEAD TAPE & REEL VERSION. REQ. BY J. SUPINA. DATE 09 MAR 2007 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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