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NCP1050, NCP1051,
NCP1052, NCP1053,
NCP1054, NCP1055
Monolithic High Voltage
Gated Oscillator Power
Switching Regulator
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The NCP1050 through NCP1055 are monolithic high voltage
regulators that enable end product equipment to be compliant with low
standby power requirements. This device series combines the required
converter functions allowing a simple and economical power system
solution for office automation, consumer, and industrial products.
These devices are designed to operate directly from a rectified AC line
source. In flyback converter applications they are capable of providing
an output power that ranges from 6.0 W to 40 W with a fixed AC input
of 100 V, 115 V, or 230 V, and 3.0 W to 20 W with a variable AC input
that ranges from 85 V to 265 V.
This device series features an active startup regulator circuit that
eliminates the need for an auxiliary bias winding on the converter
transformer, fault detector and a programmable timer for converter
overload protection, unique gated oscillator configuration for extremely
fast loop response with double pulse suppression, power switch current
limiting, input undervoltage lockout with hysteresis, thermal shutdown,
and auto restart fault detection. These devices are available in
economical 8−pin dual−in−line and 4−pin SOT−223 packages.
MARKING
DIAGRAMS
8
PDIP−8
P SUFFIX
CASE 626A
8
1
•
•
•
•
•
•
•
•
•
•
•
•
AYW
N5XZG
G
1
Pin: 1.VCC
2.Control Input
3.Power Switch Drain
4.Ground
• Startup Circuit Eliminates the Need for Transformer Auxiliary Bias
Winding
Optional Auxiliary Bias Winding Override for Lowest Standby
Power Applications
Converter Output Overload and Open Loop Protection
Auto Restart Fault Protection
IC Thermal Fault Protection
Unique, Dual Edge, Gated Oscillator Configuration for Extremely
Fast Loop Response
Oscillator Frequency Dithering with Controlled Slew Rate Driver for
Reduced EMI
Low Power Consumption Allowing European Blue Angel Compliance
On−Chip 700 V Power Switch Circuit and Active Startup Circuit
Rectified AC Line Source Operation from 85 V to 265 V
Input Undervoltage Lockout with Hysteresis
Oscillator Frequency Options of 44 kHz, 100 kHz, 136 kHz
These are Pb−Free and Halide−Free Devices
1
Pin: 1.
VCC
2.
Control Input
3, 7−8. Ground
4.
No Connection
5.
Power Switch Drain
SOT−223
ST SUFFIX
CASE 318E
Features
NCP105XZ
AWL
YYWWG
X
Z
= Current Limit (0, 1, 2, 3, 4, 5)
= Oscillator Frequency
A = 44 kHz, B = 100 kHz, C = 136 kHz
A
= Assembly Location
WL,
= Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 22 of
this data sheet.
Typical Applications
•
•
•
•
AC−DC Converters
Wall Adapters
Portable Electronic Chargers
Low Power Standby and Keep−Alive Supplies
© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. 14
1
Publication Order Number:
NCP1050/D
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
+
AC Line
Input
+
Snubber
Power Switch Circuit Output
VCC
+
+
Converter
DC Output
−
5
Startup & VCC
Regulator Circuit
1
Power
Switch
Circuit
Fault Detector
Control Input 2
Oscillator &
Gating Logic
Ground
3, 7−8
Figure 1. Typical Application
Pin Function Description
Pin
(SOT−223)
Pin
(PDIP−8)
Function
1
1
VCC
2
2
Control Input
The Power Switch Circuit is turned off when a current greater than approximately 50 A
is drawn out of or applied to this pin. A 10 V clamp is built onto the chip to protect the
device from ESD damage or overvoltage conditions.
4
3, 7, 8
Ground
This pin is the control circuit and Power Switch Circuit ground. It is part of the integrated
circuit lead frame.
−
4
No Connection
3
5
Power Switch
Drain
Description
This is the positive supply voltage input. During startup, power is supplied to this input
from Pin 5. When VCC reaches VCC(on), the Startup Circuit turns off and the output is
allowed to begin switching with 1.0 V hysteresis on the VCC pin. The capacitance connected to this pin programs fault timing and frequency modulation rate.
This pin is designed to directly drive the converter transformer primary, and internally
connects to Power Switch and Startup Circuit.
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2
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
+
AC Line
Input
Snubber
+
+
Converter
DC Output
−
Power Switch Circuit Output
VCC
+
Startup/VCC Reg
10 V
+
−
+
VCC Bypass/
Fault Timing/
VCO Sweep
Control
Startup
Circuit
7.5/8.5 V
Undervoltage
Lockout
Fault
Detector
Internal Bias
Power
Switch
Circuit
Q
−
+
+
Fault
Latch
S
Thermal
Shutdown
R
Driver
4.5 V
VCC
Oscillator
IH = 10 A
48 A
Turn On
Latch
Turn Off
Latch
R
2.6 V
Q
+
Ck
S
Control
Input
Q
R
10 V
+
−
Current Limit
Comparator
+
3.3 V
48 A
Leading Edge
Blanking
+
RSENSE
IH = 10 A
Ground
Figure 2. Representative Block Diagram
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3
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
fOSC (high)
8.5 V
fOSC (low)
VCC
7.5 V
Oscillator Duty
Cycle
Oscillator Clock
47.5 A
37.5 A
ICONTROL, SINK
0 A
Leading Edge On
Duty Cycle Off
Leading Edge On
Feedback Off
Delay On
Duty Cycle Off
Leading Edge On
Duty Cycle Off
No Second
Pulse
Leading Edge On
Current Limit Off
Power Switch
Circuit Gate Drive
Current Limit
Threshold
Primary Current
Current Limit
Propagation De
lay
Figure 3. Timing Diagram for Gated Oscillator with Dual Edge PWM
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4
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
ICC1, Current Measurement
ICC2, Current Measurement
VCC(on)
Hysteretic Regulation
VCC
VCC(off)
VCC(reset)
ICC3, Current Measurement
0V
6.3 mA
I(start)
0 mA
ICC1
ICC
ICC2
ICC3
0 mA
I(start)
47.5 A
37.5 A
ICONTROL, SINK
0 A
V(pin 5)
Fault Removed
Fault Applied
Figure 4. Non−Latching Fault Condition Timing Diagram
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5
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
MAXIMUM RATINGS
Rating
Power Switch and Startup Circuit
Drain Voltage Range
Drain Current Peak During Transformer Saturation
Power Supply/VCC Bypass and Control Input
Voltage Range
Current
Thermal Characteristics
P Suffix, Plastic Package Case 626A−01
Junction−to−Lead
Junction−to−Air, 2.0 Oz. Printed Circuit Copper Clad
0.36 Sq. Inch
1.0 Sq. Inch
ST Suffix, Plastic Package Case 318E−04
Junction−to−Lead
Junction−to−Air, 2.0 Oz. Printed Circuit Copper Clad
0.36 Sq. Inch
1.0 Sq. Inch
Symbol
Value
Unit
VDS
IDS(pk)
*0.3 to 700
2.0 x Ilim Max
V
A
VIR
Imax
*0.3 to 10
100
V
mA
°C/W
RJL
RJA
9.0
RJL
RJA
14
Operating Junction Temperature
TJ
*40 to +150
°C
Storage Temperature
Tstg
*65 to +150
°C
77
60
74
55
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests:
Pins 1−3: Human Body Model 2000 V per JEDEC JESD22−A114−F.
Machine Model Method 400 V per JEDEC JESD22−A115−A.
Pin 5: Human Body Model 1000 V per JEDEC JESD22−A114−F.
Machine Model Method 400 V per JEDEC JESD22−A115−A.
Pin 5 is connected to the power switch and start−up circuits, and is rated only to the max voltage of the part, or 700 V.
Charged Device Model (CDM) 1000 V per JEDEC Standard JESD22−C101E.
2. This device contains Latch−up protection and exceeds $100 mA per JEDEC Standard JESD78.
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6
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
ELECTRICAL CHARACTERISTICS (VCC = 8.0 V, for typical values TJ = 25°C, for min/max values, TJ is the operating junction
temperature range that applies (Note 3), unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
OSCILLATOR
Frequency (VCC = 7.5 V)
TJ = 25°C:
44 kHz Version
100 kHz Version
136 kHz Version
TJ = Tlow to Thigh
44 kHz Version
100 kHz Version
136 kHz Version
fOSC(low)
Frequency (VCC = 8.5 V)
TJ = 25°C:
44 kHz Version
100 kHz Version
136 kHz Version
TJ = Tlow to Thigh
44 kHz Version
100 kHz Version
136 kHz Version
fOSC(high)
kHz
38
87
119
42.5
97
132
47
107
145
37
84
113
−
−
−
47
107
145
kHz
41
93
126
45.5
103
140
50
113
154
39
90
120
−
−
−
50
113
154
Frequency Sweep (VCC = 7.5 V to 8.5 V, TJ = 25°C)
%fOSC
−
5.0
−
%
Maximum Duty Cycle
D(max)
74
77
80
%
Ioff(low)
Ion(low)
−58
−50
−47.5
−37.5
−37
−25
Ioff(high)
Ion(high)
37
25
47.5
37.5
58
50
Vlow
Vhigh
1.1
4.2
1.35
4.6
1.6
5.0
CONTROL INPUT
Lower Window Input Current Threshold
Switching Enabled, Sink Current Increasing
Switching Disabled, Sink Current Decreasing
Upper Window Input Current Threshold
Switching Enabled, Source Current Increasing
Switching Disabled, Source Current Decreasing
Control Window Input Voltage
Lower (Isink = 25 A)
Upper (Isource = 25 A)
3. Tested junction temperature range for the NCP105X series:
Thigh = +125°C
Tlow = −40°C
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7
A
V
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
ELECTRICAL CHARACTERISTICS (VCC = 8.0 V, for typical values TJ = 25°C, for min/max values, TJ is the operating junction
temperature range that applies (Note 4), unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
POWER SWITCH CIRCUIT
Power Switch Circuit On−State Resistance
NCP1050, NCP1051, NCP1052 (ID = 50 mA)
TJ = 25°C
TJ = 125°C
NCP1053, NCP1054, NCP1055 (ID = 100 mA)
TJ = 25°C
TJ = 125°C
RDS(on)
Power Switch Circuit & Startup Breakdown Voltage
(ID(off) = 100 A, TA = 25°C)
V(BR)DS
Power Switch Circuit & Startup Circuit Off−State Leakage Current
(VDS = 650 V) TJ = 25°C
(VDS = 650 V) TJ = 125°C
−
−
22
42
30
55
−
−
10
23
15
28
700
−
−
−
−
25
15
40
80
−
−
20
10
−
−
93
186
279
372
493
632
100
200
300
400
530
680
107
214
321
428
567
728
−
0
10
−
−
135
160
−
−
Tsd
TH
140
−
160
75
−
−
VCC(on)
VCC(off)
VH
8.0
7.0
−
8.5
7.5
1.0
9.0
8.0
−
VCC(reset)
4.0
4.5
5.0
IDS(off)
Switching Characteristics (RL = 50 , VDS set for ID = 0.7 IIim)
Turn−on Time (90% to 10%)
Turn−off Time (10% to 90%)
ton
toff
V
A
ns
CURRENT LIMIT AND THERMAL PROTECTION
Current Limit Threshold (TJ = 25°C) (Note 7)
NCP1050
NCP1051
NCP1052
NCP1053
NCP1054
NCP1055
Ilim
I2fOSC
Conversion Power Deviation (TJ = 25°C) (Note 8)
Propagation Delay, Current Limit Threshold to Power Switch Circuit Output
NCP1050, NCP1051, NCP1052
NCP1053, NCP1054, NCP1055
Thermal Protection (VCC = 8.6 V) (Note 4, 5, 6)
Shutdown (Junction Temperature Increasing)
Hysteresis (Junction Temperature Decreasing)
tPLH
mA
%A2Hz
ns
°C
STARTUP CONTROL
Startup/VCC Regulation
Startup Threshold/VCC Regulation Peak (VCC Increasing)
Minimum Operating/VCC Valley Voltage After Turn−On
Hysteresis
Undervoltage Lockout Threshold Voltage, VCC Decreasing
Startup Circuit Output Current (Power Switch Circuit Output = 40 V)
VCC = 0 V
TJ = 25°C
TJ = −40 to 125°C
VCC = VCC(on) − 0.2 V
TJ = 25°C
TJ = −40 to 125°C
Istart
Minimum Start−up Drain Voltage (Istart = 0.5 mA, VCC = VCC(on) − 0.2 V)
Output Fault Condition Auto Restart
(VCC Capacitor = 10 F, Power Switch Circuit Output = 40 V)
Average Switching Duty Cycle
Frequency
8
V
mA
5.4
4.5
6.3
−
7.2
8.0
4.6
3.5
5.6
−
6.6
7.0
Vstart(min)
−
13.4
20
V
Drst
frst
−
−
6.0
3.5
−
−
%
Hz
4. Tested junction temperature range for the NCP105X series:
Thigh = +125°C
Tlow = −40°C
5. Maximum package power dissipation limits must be observed.
6. Guaranteed by design only.
7. Adjust di/dt to reach Ilim in 4.0 sec.
8. Consult factory for additional options including test and trim for output power accuracy.
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V
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
ELECTRICAL CHARACTERISTICS (VCC = 8.0 V, for typical values TJ = 25°C, for min/max values, TJ is the operating junction
temperature range that applies (Note 9), unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
TOTAL DEVICE
Power Supply Current After UVLO Turn−On (Note 10)
Power Switch Circuit Enabled
NCP1050, NCP1051, NCP1052
44 kHz Version
100 kHz Version
136 kHz Version
NCP1053, NCP1054, NCP1055
44 kHz Version
100 kHz Version
136 kHz Version
Power Switch Circuit Disabled
Non−Fault Condition
Fault Condition
mA
ICC1
ICC2
ICC3
9. Tested junction temperature range for the NCP105X series:
Thigh = +125°C
Tlow = −40°C
10. See Non−Latching Fault Condition Timing Diagram in Figure 4.
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9
0.35
0.40
0.40
0.45
0.50
0.525
0.55
0.60
0.65
0.40
0.45
0.50
0.50
0.575
0.65
0.60
0.70
0.80
0.35
0.10
0.45
0.175
0.55
0.25
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
TYPICAL CHARACTERISTICS
104
VCC = VCC(on)
OSCILLATOR FREQUENCY (kHz)
OSCILLATOR FREQUENCY (kHz)
46
45
44
VCC = VCC(off)
43
42
41
40
−50 −25
0
25
50
75
100
125
VCC = VCC(on)
102
100
98
VCC = VCC(off)
96
94
92
−50 −25
150
0
TEMPERATURE (°C)
Figure 5. Oscillator Frequency
(44 kHz Version) versus Temperature
FREQUENCY SWEEP (kHz)
OSCILLATOR FREQUENCY (kHz)
138
136
VCC = VCC(off)
132
130
128
100
125
150
8
136 kHz
7
100 kHz
6
5
4
3
44 kHz
2
1
126
124
−50 −25
0
25
50
75
100
125
0
−50 −25
150
0
TEMPERATURE (°C)
77.2
77.0
76.8
76.6
76.4
25
50
75
100
125
150
TEMPERATURE (°C)
SINK CONTROL CURRENT THRESHOLD (A)
77.4
0
50
75
100
125
150
125
150
Figure 8. Frequency Sweep versus
Temperature
77.6
76.2
−50 −25
25
TEMPERATURE (°C)
Figure 7. Oscillator Frequency
(136 kHz Version) versus Temperature
MAXIMUM DUTY CYCLE (%)
75
9
VCC = VCC(on)
134
50
Figure 6. Oscillator Frequency
(100 kHz Version) versus Temperature
142
140
25
TEMPERATURE (°C)
55
CURRENT RISING
50
45
40
CURRENT FALLING
35
30
−50 −25
Figure 9. Maximum Duty Cycle versus
Temperature
0
25
50
75
100
TEMPERATURE (°C)
Figure 10. Lower Window Control Input
Current Thresholds versus Temperature
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10
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
1.39
50
1.38
CURRENT RISING
46
1.37
CLAMP VOLTAGE (V)
SOURCE CONTROL CURRENT THRESHOLD (A)
TYPICAL CHARACTERISTICS
42
38
CURRENT FALLING
34
1.36
1.35
1.34
1.32
1.31
1.30
30
−50
−25
0
25
50
75
100
125
1.29
1.28
−50 −25
150
0
50
75
100
Figure 11. Upper Window Control Input
Current Thresholds versus Temperature
150
Figure 12. Control Input Lower Window Clamp
Voltage versus Temperature
45
40
ON RESISTANCE ()
4.62
4.60
ISOURCE = 25 A
4.58
4.56
4.54
NCP1050,1,2
(ID = 50 mA)
35
30
25
20
NCP1053,4,5
(ID = 100 mA)
15
10
5
4.52
−50 −25
0
25
50
75
100
125
0
−50 −25
150
0
TEMPERATURE (°C)
25
50
100
75
125
150
TEMPERATURE (°C)
Figure 13. Control Input Upper Window Clamp
Voltage versus Temperature
Figure 14. On Resistance versus Temperature
120
100
TJ = 25°C
CAPACITANCE (pF)
100
80
60
TJ = −40°C
40
TJ = 25°C
20
0
125
TEMPERATURE (°C)
4.64
LEAKAGE CURRENT (A)
25
TEMPERATURE (°C)
4.66
CLAMP VOLTAGE (V)
ISINK = 25 A
1.33
NCP1053,4,5
10
NCP1050,1,2
TJ = 125°C
0
100
200
300
400
500
600
700
800
900
1
0
APPLIED VOLTAGE (V)
100
200
300
400
500
600
APPLIED VOLTAGE (V)
Figure 15. Power Switch and Startup Circuit
Leakage Current versus Voltage
Figure 16. Power Switch and Startup Circuit
Output Capacitance versus Applied Voltage
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11
700
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
1.02
8.6
1.00
8.4
SUPPLY THRESHOLD (V)
NORMALIZED CURRENT LIMIT
TYPICAL CHARACTERISTICS
0.98
0.96
0.94
0.92
0.90
0.88
−50 −25
0
25
50
75
100
125
STARTUP
THRESHOLD
VCC(on)
8.2
8.0
MINIMUM
OPERATING
THRESHOLD
VCC(off)
7.8
7.6
7.4
7.2
−50 −25
150
0
4.54
7
4.52
START CURRENT (mA)
UNDERVOLTAGE THRESHOLD (V)
75
100
125
150
8
4.56
4.50
4.48
4.46
4.44
4.42
4.40
4.38
4.36
4.34
−50
VCC = 0 V
6
5
4
VCC = 8.3 V
3
2
VPIN 5 = 20 V
1
−25
0
25
50
75
100
125
0
−50 −25
150
0
25
50
75
100
125
150
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 20. Start Current versus Temperature
Figure 19. Undervoltage Lockout Threshold
versus Temperature
8
7
VCC = 0 V
6
STARTUP CURRENT (mA)
STARTUP CURRENT (mA)
50
Figure 18. Supply Voltage Thresholds versus
Temperature
Figure 17. Normalized Peak Current Limit
versus Temperature
5
4
3
TJ = 25°C
VPIN 5 = 20 V
2
1
0
25
TEMPERATURE (°C)
TEMPERATURE (°C)
0
1
2
3
4
5
6
7
8
6
4
2
0
−2
9
VCC = 8 V
TJ = 25°C
1
10
100
PIN 5 VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 22. Startup Current versus Pin 5
Voltage
Figure 21. Startup Current versus Supply
Voltage
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12
1000
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
TYPICAL CHARACTERISTICS
0.55
0.70
136 kHz
0.65
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
136 kHz
0.50
100 kHz
0.45
44 kHz
0.40
0.60
100 kHz
0.55
0.50
44 kHz
0.45
0.40
0.35
−50 −25
0
25
50
75
100
125
0.35
−50
150
−25
0
50
75
100
125
150
Figure 24. Supply Current versus Temperature
(NCP1053/4/5)
Figure 23. Supply Current versus Temperature
(NCP1050/1/2)
0.48
0.21
0.20
SUPPLY CURRENT (mA)
0.47
0.46
0.45
0.44
0.43
0.42
0.19
0.18
0.17
0.16
0.15
0.14
0.13
0.41
−50 −25
0
25
50
75
100
125
150
0.12
−50
−25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 25. Supply Current When Switching
Disable versus Temperature
Figure 26. Supply Current in Fault Condition
versus Temperature
14.0
CONDITION:
VCC pin = 1 F to ground
Control pin = open
Drain pin = 1 k to Power Supply,
Increase Voltage Until Switching
13.9
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
25
TEMPERATURE (°C)
TEMPERATURE (°C)
13.8
13.7
13.6
13.5
13.4
13.3
13.2
13.1
13.0
−50 −25
0
25
50
75
100
125
150
TEMPERATURE (°C)
Figure 27. Supply Voltage versus Temperature
www.onsemi.com
13
150
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
OPERATING DESCRIPTION
Introduction
followers at approximately 47.5 A with 10 A hysteresis.
When a source or sink current in excess of this value is
applied to this input, a logic signal generated internally
changes state to block power switch conduction. Since the
output of the Control Input sense is sampled continuously
during ton (77% duty cycle), it is possible to turn the Power
Switch Circuit on or off at any time within ton. Because it
does not have to wait for the next cycle (rising edge of the
clock signal) to switch on, and because it does not have to
wait for current limit to turn off, the circuit has a very fast
transient response as shown in Figure 3.
In a typical converter application the control input current
is drawn by an optocoupler. The collector of the optocoupler
is connected to the Control Input pin and the emitter is
connected to ground. The optocoupler LED is mounted in
series with a shunt regulator (typically a TL431) at the DC
output of the converter. When the power supply output is
greater than the reference voltage (shunt regulator voltage
plus optocoupler diode voltage drop), the optocoupler turns
on, pulling down on the Control Input. The control input
logic is configured for line input sensing as well.
The NCP105X series represents a new higher level of
integration by providing on a single monolithic chip all of
the active power, control, logic, and protection circuitry
required to implement a high voltage flyback converter and
compliance with very low standby power requirements for
modern consumer electronic power supplies. This device
series is designed for direct operation from a rectified 240
VAC line source and requires minimal external components
for a complete cost sensitive converter solution. Potential
markets include cellular phone chargers, standby power
supplies for personal computers, secondary bias supplies for
microprocessor keep−alive supplies and IR detectors. A
description of each of the functional blocks is given below,
and the representative block diagram is shown in Figure 2.
This device series features an active startup regulator
circuit that eliminates the need for an auxiliary bias winding
on the converter transformer, fault logic with a programmable
timer for converter overload protection, unique gated
oscillator configuration for extremely fast loop response with
double pulse suppression, oscillator frequency dithering with
a controlled slew rate driver for reduced EMI,
cycle−by−cycle current limiting, input undervoltage lockout
with hysteresis, thermal shutdown, and auto restart or latched
off fault detect device options. These devices are available in
economical 8−pin PDIP and 4−pin SOT−223 packages.
Turn On Latch
The Oscillator output is typically a 77% positive duty
cycle square waveform. This waveform is inverted and
applied to the reset input of the turn−on latch to prevent any
power switch conduction during the guaranteed off time.
This square wave is also gated by the output of the control
section and applied to the set input of the same latch.
Because of this gating action, the power switch can be
activated when the control input is not asserted and the
oscillator output is high.
The use of this unique gated Turn On Latch over an
ordinary Gated Oscillator allows a faster load transient
response. The power switch is allowed to turn on
immediately, within the maximum duty cycle time period,
when the control input signals a necessary change in state.
Oscillator
The Oscillator is a unique fixed−frequency, duty−cycle−
controlled oscillator. It charges and discharges an on chip
timing capacitor to generate a precise square wave signal
used to pulse width modulate the Power Switch Circuit.
During the discharge of the timing capacitor, the Oscillator
duty cycle output holds one input of the Driver low. This
action keeps the Power Switch Circuit off, thus limiting the
maximum duty cycle.
A frequency modulation feature is incorporated into the
IC in order to aide in EMI reduction. Figure 3 illustrates this
frequency modulation feature. The power supply voltage,
VCC, acts as the input to the built−in voltage controlled
oscillator. As the VCC voltage is swept across its nominal
operating range of 7.5 to 8.5 V, the oscillator frequency is
swept across its corresponding range.
The center oscillator frequency is internally programmed
for 44 kHz, 100 kHz, or 136 kHz operation with a controlled
charge to discharge current ratio that yields a maximum
Power Switch duty cycle of 77%. The Oscillator
temperature characteristics are shown in Figures 5
through 9. Contact an ON Semiconductor sales
representative for further information regarding frequency
options.
Turn Off Latch
A Turn Off Latch feature has been incorporated into this
device series to protect the power switch circuit from
excessive current, and to reduce the possibility of output
overshoot in reaction to a sudden load removal. If the Power
Switch current reaches the specified maximum current limit,
the Current Limit Comparator resets the Turn Off Latch and
turns the Power Switch Circuit off. The turn off latch is also
reset when the Oscillator output signal goes low or the
Control Input is asserted, thus terminating output MOSFET
conduction. Because of this response to control input
signals, it provides a very fast transient response and very
tight load regulation. The turn off latch has an edge triggered
set input which ensures that the switch can only be activated
once during any oscillator period. This is commonly
referred to as double pulse suppression.
Control Input
The Control Input pin circuit has parallel source follower
input stages with voltage clamps set at 1.35 and 4.6 V.
Current sources clamp the input current through the
www.onsemi.com
14
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
Current Limit Comparator and Power Switch Circuit
Undervoltage Lockout
The Power Switch Circuit is constructed with a
SENSEFET™ in order to monitor the drain current. A
portion of the current flowing through the circuit goes into
a sense element, Rsense. The current limit comparator detects
if the voltage across Rsense exceeds the reference level that
is present at its inverting input. If this level is exceeded, the
comparator quickly resets the Turn Off Latch, thus
protecting the Power Switch Circuit.
A Leading Edge Blanking circuit was placed in the current
sensing signal path to prevent a premature reset of the Turn
Off Latch. A potential premature reset signal is generated
each time the Power Switch Circuit is driven into conduction
and appears as a narrow voltage spike across current sense
resistor Rsense. The spike is due to the Power Switch Circuit
gate to source capacitance, transformer interwinding
capacitance, and output rectifier recovery time. The Leading
Edge Blanking circuit has a dynamic behavior that masks the
current signal until the Power Switch Circuit turn−on
transition is completed. The current limit propagation delay
time is typically 135 to 165 nanoseconds. This time is
measured from when an overcurrent appears at the Power
Switch Circuit drain, to the beginning of turn−off. Care must
be taken during transformer saturation so that the maximum
device current limit rating is not exceeded.
The high voltage Power Switch Circuit is monolithically
integrated with the control logic circuitry and is designed to
directly drive the converter transformer. Because the
characteristics of the power switch circuit are well known,
the gate drive has been tailored to control switching
transitions to help limit electromagnetic interference (EMI).
The Power Switch Circuit is capable of switching 700 V
with an associated drain current that ranges nominally from
0.10 to 0.68 Amps.
An Undervoltage Lockout (UVLO) comparator is
included to guarantee that the integrated circuit has
sufficient voltage to be fully functional. The UVLO
comparator monitors the supply capacitor input voltage at
Pin 1 and disables the Power Switch Circuit whenever the
capacitor voltage drops below the undervoltage lockout
threshold. When this level is crossed, the controller enters a
new startup phase by turning the current source on. The
supply voltage will then have to exceed the startup threshold
in order to turn off the startup current source. Startup and
normal operation of the converter are shown in Figure 3.
Fault Detector
The NCP105X series has integrated Fault Detector
circuitry for detecting application fault conditions such as
open loop, overload or a short circuited output. A timer is
generated by driving the supply capacitor with a known
current and hysteretically regulating the supply voltage
between set thresholds. The timer period starts when the
supply voltage reaches the nominal upper threshold of 8.5 V
and stops when the drain current of the integrated circuit
draws the supply capacitor voltage down to the undervoltage
lockout threshold of 7.5 V.
If, during this timer period, no feedback has been applied
to the control input, the fault detect logic is set to indicate an
abnormal condition. This may occur, for example, when the
optocoupler fails or the output of the application is
overloaded or completely shorted. In this case, the part will
stop switching, go into a low power mode, and begin to draw
down the supply capacitor to the reset threshold voltage of
4.5 V. At that time, the startup circuit will turn on again to
drive the supply to the turn on threshold. Then the part will
begin the cycle again, effectively sampling the control input
to determine if the fault condition has been removed. This
mode is commonly referred to as burst mode operation and
is shown is Figure 4.
Proper selection of the supply capacitor allows successful
startup with monotonically increasing output voltage,
without falsely sensing a fault condition. Figure 4 shows
successful startup and the evolution of the signals involved
in the presence of a fault.
Startup Circuit
Rectified AC line voltage is applied to the Startup Circuit
on Pin 5, through the primary winding. The circuit is
self−biasing and acts as a constant current source, gated by
control logic. Upon application of the AC line voltage, this
circuit routes current into the supply capacitor typically
connected to Pin 1. During normal operation, this capacitor
is hysteretically regulated from 7.5 to 8.5 V by monitoring
the supply voltage with a comparator and controlling the
startup current source accordingly. This Dynamic
Self−Supply (DSS) functionality offers a great deal of
applications flexibility as well. The startup circuit is rated at
a maximum 700 V (maximum power dissipation limits must
be observed).
Thermal Shutdown
The internal Thermal Shutdown block protects the device
in the event that the maximum junction temperature is
exceeded. When activated, typically at 160°C, one input of
the Driver is held low to disable the Power Switch Circuit.
The Power Switch is allowed to resume operation when the
junction temperature falls below 85°C. The thermal
shutdown feature is provided to prevent catastrophic device
failures from accidental overheating. It is not intended to be
used as a substitute for proper heatsinking.
www.onsemi.com
15
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
APPLICATIONS
to provide a tightly regulated DC output. IC3 is a shunt
regulator that samples the output voltage by virtue of R5 and
R6 to provide drive to the optocoupler, IC2, Light Emitting
Diode (LED). C10 is used to compensate the shunt regulator.
When the application is configured as a Charger, Q1 delivers
additional drive to the optocoupler LED when in constant
current operation by sampling the output current through R7
and R8.
Two application examples have been provided in this
document, and they are described in detail in this section.
Figure 28 shows a Universal Input, 6 Watt Converter
Application as well as a 5.5 Watt Charger Application using
the NCP1053 @ 100 kHz. The Charger consists of the
additional components Q1, C13, and R7 through R10, as
shown. These were constructed and tested using the printed
circuit board layout shown in Figure 40. The board consists
of a fiberglass epoxy material (FR4) with a single side of two
ounce per square foot (70 m thick) copper foil. Test data
from the two applications is given in Figures 29 through 39.
Both applications generate a well−regulated output
voltage over a wide range of line input voltage and load
current values. The charger application transitions to a
constant current output if the load current is increased
beyond a preset range. This can be very effective for battery
charger application for portable products such as cellular
telephones, personal digital assistants, and pagers. Using the
NCP105X series in applications such as these offers a wide
range of flexibility for the system designer.
The NCP105X application offers a low cost alternative to
other applications. It uses a Dynamic Self−Supply (DSS)
function to generate its own operating supply voltage such
that an auxiliary transformer winding is not needed. (It also
offers the flexibility to override this function with an
auxiliary winding if ultra−low standby power is the
designer’s main concern.) This product also provides for
automatic output overload, short circuit, and open loop
protection by entering a programmable duty cycle burst
mode of operation. This eliminates the need for expensive
devices overrated for power dissipation or maximum
current, or for redundant feedback loops.
The application shown in Figure 28 can be broken down
into sections for the purpose of operating description.
Components C1, L1 and C6 provide EMI filtering for the
design, although this is very dependent upon board layout,
component type, etc. D1 through D4 along with C2 provide
the AC to bulk DC rectification. The NCP1053 drives the
primary side of the transformer, and the capacitor, C5, is an
integral part of the Dynamic Self−Supply. R1, C3, and D5
comprise an RCD snubber and R2 and C4 comprise a ringing
damper both acting together to protect the IC from voltage
transients greater than 700 volts and reduce radiated noise
from the converter. Diode D6 along with C7−9, L2, C11, and
C12 rectify the transformer secondary and filter the output
Component Selection Guidelines
Choose snubber components R1, C3, and D5 such that the
voltage on pin 5 is limited to the range from 0 to 700 volts.
These components protect the IC from substrate injection if
the voltage was to go below zero volts, and from avalanche
if the voltage was to go above 700 volts, at the cost of slightly
reduced efficiency. For lower power design, a simple RC
snubber as shown, or connected to ground, can be sufficient.
Ensure that these component values are chosen based upon
the worst−case transformer leakage inductance and
worst−case applied voltage. Choose R2 and C4 for best
performance radiated switching noise.
Capacitor C5 serves multiple purposes. It is used along
with the internal startup circuitry to provide power to the IC
in lieu of a separate auxiliary winding. It also serves to
provide timing for the oscillator frequency sweep for
limiting the conducted EMI emissions. The value of C5 will
also determine the response during an output fault (overload
or short circuit) or open loop condition as shown in Figure 4,
along with the total output capacitance.
Resistors R5 and R6 will determine the regulated output
voltage along with the reference voltage chosen with IC3.
The base to emitter voltage drop of Q1 along with the
value of R7 will set the fixed current limit value of the
Charger application. R9 is used to limit the base current of
Q1. Component R8 can be selected to keep the current limit
fixed with very low values of output voltage or to provide
current limit foldback with results as shown in
Figures 29 and 33. A relatively large value of R8 allows for
enough output voltage to effectively drive the optocoupler
LED for fixed current limit. A low value of R8, along with
resistor R10, provides for a low average output power using
the fault protection feature when the output voltage is very
low. C13 provides for output voltage stability when the
Charger application is in current limit.
www.onsemi.com
16
Vin
85 − 265 VAC C1
0.1
F1
2.0 A
L1
10 mH
www.onsemi.com
17
C5
10
C2
33
R2
2.2 k
C3
220 p
D5
MUR160
NCP1053B
(100 kHz)
R1
91 k
C4
50 p
T1
C6
100 p
C13*
1.0
Q1*
R9*
22
C8
330
R7*
0.5 /1 W
2N3904
C7
330
D6
1N5822
R3
47
Figure 28. Universal Input 6/5 Watt Converter/Charger Application
* Add Q1, C13, and R7−R10, and Change R4 to 2.0 k for Charger Output
IC3
TL431
R8*
1.2 /1 W
R10*
220
IC2
SFH 615A−4
C9
330
T1: COOPER ELECTRONIC TECHNOLOGIES
PART # CTX22−15348
PRIMARY: 97 turns of #29 AWG, Pin 4 = start, Pin 5 = finish
SECONDARY: 5 turns of 0.40 mm, Pins 2 and 1 = start, Pins 7 and 8 = finish
GAP: Designed for Total 1.24 mH Primary Inductance
CORE: TSF−7070
BOBBIN: Pins 3 and 6 Removed, EE19
D4
1N4006
D3
1N4006
D2
1N4006
D1
1N4006
R5
2.00 k
C10
0.22
R4*
1.0 k
R6
2.20 k
L2
5 H
C11
220
C12
1.0
5.25 V
1.2 A
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
Test
Line Regulation
Conditions
Converter Results
Vin = 85 − 265 VAC; Iout = 120 mA
Vin = 85 − 265 VAC; Iout = 600 mA
Vin = 85 − 265 VAC; Iout = 1.2 A
2 mV
1 mV
2 mV
Vin = 85 − 265 VAC; Iout = 100 mA
Vin = 85 − 265 VAC; Iout = 500 mA
Vin = 85 − 265 VAC; Iout = 1.00 A
Load Regulation
Vin = 85 VAC; Iout = 120 mA − 1.2 A
Vin = 110 VAC; Iout = 120 mA − 1.2 A
Vin = 230 VAC; Iout = 120 mA − 1.2 A
Vin = 265 VAC; Iout = 120 mA − 1.2 A
11 mV
24 mV
41 mV
12 mV
13 mV
12 mV
13 mV
Vin = 85 VAC; Iout = 100 mA − 1.00 A
Vin = 110 VAC; Iout = 100 mA − 1.00 A
Vin = 230 VAC; Iout = 100 mA − 1.00 A
Vin = 265 VAC; Iout = 100 mA − 1.00 A
Output Ripple
Vin = 110 VAC; Iout = 1.2 A
Vin = 230 VAC; Iout = 1.2 A
58 mV
65 mV
71 mV
67 mV
86 mVp−p
127 mVp−p
Vin = 110 VAC; Iout = 1.00 A
Vin = 230 VAC; Iout = 1.00 A
Efficiency
Charger Results
80 mVp−p
155 mVp−p
Vin = 110 VAC; Iout = 1.2 A
Vin = 230 VAC; Iout = 1.2 A
72.4%
69.6%
Vin = 110 VAC; R8 = 1.2 , Iout = 1.00 A
Vin = 230 VAC; R8 = 1.2 , Iout = 1.00 A
54.6%
53.6%
Vin = 110 VAC; R8 = 0 , Iout = 1.00 A
Vin = 230 VAC; R8 = 0 , Iout = 1.00 A
66.1%
63.3%
No Load Input Power
Vin = 110 VAC; Iout = 0 A
Vin = 230 VAC; Iout = 0 A
100 mW
200 mW
100 mW
200 mW
Standby Output Power
Vin = 110 VAC; Pin = 1 W
Vin = 230 VAC; Pin = 1 W
680 mW
630 mW
640 mW
540 mW
Short Circuit Load Input Power
Vin = 110 VAC; Vout = 0 V (Shorted)
Vin = 230 VAC; Vout = 0 V (Shorted)
400 mW
550 mW
Vin = 110 VAC; R8 = 1.2 , Vout = 0 V (Shorted)
Vin = 230 VAC; R8 = 1.2 , Vout = 0 V (Shorted)
750 mW
900 mW
Vin = 110 VAC; R8 = 0 , Vout = 0 V (Shorted)
Vin = 230 VAC; R8 = 0 , Vout = 0 V (Shorted)
700 mW
850 mW
Figure 29. Converter and Charger Test Data Summary
www.onsemi.com
18
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
5.224
5.23
5.22
Iout = 120 mA
OUTPUT VOLTAGE (VDC)
OUTPUT VOLTAGE (VDC)
5.222
5.220
Iout = 600 mA
5.218
5.216
5.214
5.212
Iout = 1.2 A
5.20
5.19
5.18
5.17
5.210
5.15
5.14
130
180
230
280
Iout = 500 mA
5.16
5.208
80
Iout = 100 mA
5.21
Iout = 1 A
80
LINE INPUT VOLTAGE (VAC)
230
280
Figure 31. Charger Line Regulation
6
6
5
5
Vin = 85 VAC
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
180
LINE INPUT VOLTAGE (VAC)
Figure 30. Converter Line Regulation
4
Vin = 110 VAC
3
2
Vin = 265 VAC
Vin = 230 VAC
4
3
Vin = 230 VAC
0
0.5
1
1.5
2
0
2
Vin = 265 VAC
Vin = 85 VAC
Vin = 110 VAC
1
1
0
130
0
LOAD CURRENT (A)
0.5
1.0
LOAD CURRENT (A)
Figure 33. Charger Load Regulation
Figure 32. Converter Load Regulation
Ch1: Vout
Ch2: Iout = 0.2 A/div
(Vin = 230 VAC)
Ch1: Vout
Ch2: Iout = 0.2 A/div
(Vin = 230 VAC)
Figure 34. Converter Load Transient Response
Figure 35. Charger Load Transient Response
www.onsemi.com
19
1.5
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
75
Vin = 85 VAC
Vin = 230 VAC
Vin = 265 VAC
65
60
Vin = 110 VAC
60
55
Vin = 230 VAC
Vin = 265 VAC
50
55
50
Vin = 85 VAC
65
EFFICIENCY (%)
70
EFFICIENCY (%)
70
Vin = 110 VAC
0
0.5
1.0
45
1.5
0
LOAD CURRENT (A)
0.5
1.0
LOAD CURRENT (A)
Figure 36. Converter Efficiency
Figure 37. Charger Efficiency
Ch1: Vout
Ch2: Rectified Vin
(Vin = 230 VAC,
Iout = 0.5 A)
Ch1: Vout
Ch2: Rectified Vin
(Vin = 230 VAC,
Iout = 0.5 A)
Figure 38. Converter On/Off Line Transient
Response
Figure 39. Charger On/Off Line Transient
Response
www.onsemi.com
20
1.5
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
BOARD GRAPHICS
DC Output
AC Input
C1
−
IC2
+
R5
R6
R4
C5
C12
C10
R9
+
R8
L1
Q1
−
L2
R7
C6
D2
R3
+
D3
D5
D1
T1
R2
C9
−
D6
+
C2
C11
IC1
D4
−
−
+
IC3
F1
C8
−
R1
+
C3
C4
+
C7
−
Top View
2.75″
2.25″
NCP1050
Series
Bottom View
Figure 40. Printed Circuit Board and Component Layout
www.onsemi.com
21
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
DEVICE ORDERING INFORMATION (Note 11)
RDS(on)
(W)
Ipk
(mA)
NCP1050P44G
30
NCP1050P100G
Package
Shipping†
100
PDIP−8
(Pb−Free)
50 Units / Rail
30
100
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1050P136G
30
100
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1050ST44T3G
30
100
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1050ST100T3G
30
100
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1050ST136T3G
30
100
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1051P44G
30
200
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1051P100G
30
200
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1051P136G
30
200
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1051ST44T3G
30
200
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1051ST100T3G
30
200
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1051ST136T3G
30
200
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1052P44G
30
300
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1052P100G
30
300
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1052P136G
30
300
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1052ST44T3G
30
300
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1052ST100T3G
30
300
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1052ST136T3G
30
300
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1053P44G
15
400
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1053P100G
15
400
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1053P136G
15
400
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1053ST44T3G
15
400
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1053ST100T3G
15
400
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1053ST136T3G
15
400
SOT−223
(Pb−Free)
4000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
11. Consult factory for additional optocoupler fail−safe latching, frequency, current limit and line input options.
www.onsemi.com
22
NCP1050, NCP1051, NCP1052, NCP1053, NCP1054, NCP1055
DEVICE ORDERING INFORMATION (Note 11)
RDS(on)
(W)
Ipk
(mA)
NCP1054P44G
15
NCP1054P100G
Package
Shipping†
530
PDIP−8
(Pb−Free)
50 Units / Rail
15
530
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1054P136G
15
530
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1054ST44T3G
15
530
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1054ST100T3G
15
530
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1054ST136T3G
15
530
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1055P44G
15
680
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1055P100G
15
680
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1055P136G
15
680
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1055ST44T3G
15
680
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1055ST100T3G
15
680
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCP1055ST136T3G
15
680
SOT−223
(Pb−Free)
4000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
11. Consult factory for additional optocoupler fail−safe latching, frequency, current limit and line input options.
www.onsemi.com
23
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE R
DATE 02 OCT 2018
SCALE 1:1
q
q
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42680B
SOT−223 (TO−261)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
SOT−223 (TO−261)
CASE 318E−04
ISSUE R
STYLE 1:
PIN 1.
2.
3.
4.
BASE
COLLECTOR
EMITTER
COLLECTOR
STYLE 2:
PIN 1.
2.
3.
4.
ANODE
CATHODE
NC
CATHODE
STYLE 6:
PIN 1.
2.
3.
4.
RETURN
INPUT
OUTPUT
INPUT
STYLE 7:
PIN 1.
2.
3.
4.
ANODE 1
CATHODE
ANODE 2
CATHODE
STYLE 11:
PIN 1. MT 1
2. MT 2
3. GATE
4. MT 2
STYLE 3:
PIN 1.
2.
3.
4.
GATE
DRAIN
SOURCE
DRAIN
STYLE 8:
STYLE 12:
PIN 1. INPUT
2. OUTPUT
3. NC
4. OUTPUT
CANCELLED
DATE 02 OCT 2018
STYLE 4:
PIN 1.
2.
3.
4.
SOURCE
DRAIN
GATE
DRAIN
STYLE 5:
PIN 1.
2.
3.
4.
STYLE 9:
PIN 1.
2.
3.
4.
INPUT
GROUND
LOGIC
GROUND
STYLE 10:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
DRAIN
GATE
SOURCE
GATE
STYLE 13:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
GENERIC
MARKING DIAGRAM*
AYW
XXXXXG
G
1
A
= Assembly Location
Y
= Year
W
= Work Week
XXXXX = Specific Device Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42680B
SOT−223 (TO−261)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP−7 (PDIP−8 LESS PIN 6)
CASE 626A
ISSUE C
DATE 22 APR 2015
SCALE 1:1
D
A
E
H
8
5
1
4
E1
NOTE 8
b2
c
B
END VIEW
TOP VIEW
WITH LEADS CONSTRAINED
NOTE 5
A2
A
e/2
NOTE 3
L
SEATING
PLANE
A1
C
D1
M
e
8X
SIDE VIEW
b
0.010
eB
END VIEW
M
C A
M
B
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
DIM
A
A1
A2
b
b2
C
D
D1
E
E1
e
eB
L
M
INCHES
MIN
MAX
−−−−
0.210
0.015
−−−−
0.115 0.195
0.014 0.022
0.060 TYP
0.008 0.014
0.355 0.400
0.005
−−−−
0.300 0.325
0.240 0.280
0.100 BSC
−−−−
0.430
0.115 0.150
−−−−
10 °
MILLIMETERS
MIN
MAX
−−−
5.33
0.38
−−−
2.92
4.95
0.35
0.56
1.52 TYP
0.20
0.36
9.02
10.16
0.13
−−−
7.62
8.26
6.10
7.11
2.54 BSC
−−−
10.92
2.92
3.81
−−−
10 °
NOTE 6
GENERIC
MARKING DIAGRAM*
XXXXXXXXX
AWL
YYWWG
XXXX
A
WL
YY
WW
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
DOCUMENT NUMBER:
DESCRIPTION:
98AON11774D
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PDIP−7 (PDIP−8 LESS PIN 6)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Email Requests to: orderlit@onsemi.com
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1
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