NCS2211DG

NCS2211 Low Distortion Audio Power Amplifier with Differential Output and Shutdown Mode Product Description The NCS2211 is a high performance, low distortion Class A/B audio amplifier. It is capable of delivering 1 W of output power into an 8 W speaker bridge-tied load (BTL). The NCS2211 will operate over a wide temperature range, and it is specified for single-supply voltage operation for portable applications. It features low distortion performance, 0.2% typical THD + N @ 1 W and incorporates a shutdown/enable feature to extend battery life. The shutdown/enable feature will reduce the quiescent current to 1 mA maximum. The NCS2211 is designed to operate over the -40°C to +85°C temperature range, and is available in an 8-lead SOIC package and a 3 X 3 mm DFN8 package. The SOIC package is pin compatible with equivalent function and comparable performance to competitive devices as is the DFN8 package. The DFN8 has a low thermal resistance of only 70°C/W plus has an exposed metal pad to facilitate heat conduction to copper PCB material. Low distortion, high power, low quiescent current, and small packaging makes the NCS2211 suitable for applications including notebook and desktop computers, PDA's, and speaker phones. Features http://onsemi.com MARKING DIAGRAMS 8 8 1 SOIC-8 D SUFFIX CASE 751 1 1 1 DFN8 MN SUFFIX CASE 506BJ N2211 ALYWG G N2211 ALYWG G 8 N2211 A L Y W G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package (Note: Microdot may be in either location) • • • • • • • • • • • • • • • • Differential Output 1.0 W into an 8 W Speaker 1.5 W into a 4 W Speaker Single Supply Operation: 2.7 V to 5.5 V THD+N: 0.2% @ 1 W Output Low Quiescent Current: 20 mA Max Shutdown Current < 1.0 mA Excellent Power Supply Rejection Two Package Options: SOIC-8 Package and DFN8 Pin Compatible with Competitive Devices These are Pb-Free Devices Desktop Computers Notebook Computers PDA's Speaker Phones Games PIN ASSIGNMENT PIN 1 2 NAME Enable Bias DESCRIPTION Enable (LOW)/Shutdown (HIGH) Bias Output at (VCC-VEE)/2; Bypass with Capacitor to Reduce Noise Non-Inverting Input Inverting Input Output+ Positive Supply (Bypass with 10 mF in parallel with 0.1 mF) Negative Supply (Connect to GND for Single-Supply Operation) Output- 3 4 5 6 7 8 IN+ INOUT+ VCC VEE OUT- Applications ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. © Semiconductor Components Industries, LLC, 2008 1 February, 2008 - Rev. 0 Publication Order Number: NCS2211/D NCS2211 PIN CONNECTIONS for SOIC-8 and DFN8 Enable Bias IN+ IN1 2 3 4 (Top View) 8 OUT7 VEE 6 VCC 5 OUT+ VCC 6 R C1 (-) Input R1 R2 + R 4 3 5 Output (+) RL (+) Input Bias Filtering + R C2 R 8 Output (-) 2 7 VEE 1 Enable Figure 1. Block Diagram High Enable (Note 1) Shutdown Low Enabled 1. Enable (pin 1) must be actively driven for proper operation and cannot be left floating. See ENABLE/SHUTDOWN CONTROL in the specification table for proper logic threshold levels. MAXIMUM RATINGS Parameter Power Supply Voltages Output Current Maximum Junction Temperature (Note 2) Operating Ambient Temperature Storage Temperature Range Power Dissipation Thermal Resistance, Junction-to-Air - SOIC-8 Thermal Resistance, Junction-to-Air - DFN8 (Note 4) Moisture Sensitivity (Note 3) Symbol VCC IO TJ TA Tstg PD qJA Rating 5.5 500 150 -40 to +85 -60 to +150 (See Graph) 117 70 Level 1 Unit Vdc mA °C °C °C mW °C/W Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded. 3. For additional information, see Application Note AND8003/D 4. As mounted on an 80x80x1.5 mm FR4 PCB with 650 mm2 and 2 oz (0.034 mm) thick copper heat spreader. Following JEDEC JESD/EIA 51.1, 51.2, 51.3 test guidelines. http://onsemi.com 2 NCS2211 DC ELECTRICAL CHARACTERISTICS (VCC = +5 V, AVD = 2, RL = 8 W, C2 = 0.1 mF, TA = 25°C, unless otherwise specified) Symbol Characteristics Conditions Min Typ Max Unit POWER SUPPLY VCC IS, ON IS, OFF PSRR Operating Voltage Range Power Supply Current - Enabled Power Supply Current - Shutdown Power Supply Rejection Ratio VCC = 2.7 V to 5.5 V TA = -40°C to +85°C (Note 5) VCC = 2.7 V to 5.5 V TA = -40°C to +85°C (Note 5) VCC = 2.7 V to 5.5 V TA = -40°C to +85°C 75 2.7 5.5 20 1.0 V mA mA dB ENABLE/SHUTDOWN CONTROL VIH VIL Enable Input High Enable Input Low Device Shutdown VCC = 2.7 V to 5.5 V Device Enabled VCC = 2.7 V to 5.5 V 90% X VCC GND VCC 10% x VCC V V OUTPUT CHARACTERISTICS VOH VOL Vout -off IO Output High Voltage Output Low Voltage Differential Output Offset Voltage Output Current From Either Output to GND RL = 8 W From Either Output to GND RL = 8 W VCC = 2.7 V to 5.5 V (Note 5) TA = -40°C to +85°C Output to Output 350 VCC - 0.400 0.400 $50 V V mV mA AC ELECTRICAL CHARACTERISTICS (VCC = +5 V, AVD = 2, RL = 8 W, C2 = 0.1 mF, TA = 25°C, unless otherwise specified) Symbol Characteristics Conditions Min Typ Max Unit FREQUENCY DOMAIN PERFORMANCE GBW Gain Bandwidth Product Phase Margin THD+N Total Harmonic Distortion AVD = +2, RL = 8 W, VCC = 5 V VCC = 5 V, f = 1 kHz, P = 1.0 W into 8 W VCC = 5 V, f = 1 kHz, P = 0.5 W into 8 W VCC = 3.3 V, f = 1 kHz, P = 0.35 W into 8 W VCC = 2.7 V, f = 1 kHz, P = 0.25 W into 8 W 12 80 0.2 0.15 0.1 0.1 MHz ° % TIME DOMAIN RESPONSE tON tOFF Turn on delay Turn off delay VCC = 5 V VCC = 5 V 1 4 ms ms 5. Guaranteed by design and/or characterization. http://onsemi.com 3 NCS2211 TYPICAL PERFORMANCE CHARACTERISTICS 1 TA = 25°C VCC = 5.0 V AVD = 2 (BTL) RL = 8 W C2 = 0.1 mF 0.1 C2 = 1.0 mF THD + N (%) 1 TA = 25°C VCC = 5.0 V AVD = 2 (BTL) RL = 8 W C2 = 0.1 mF C2 = 1.0 mF THD + N (%) 0.1 0.01 20 100 1k FREQUENCY (Hz) 10 k 0.01 20 100 1k FREQUENCY (Hz) 10 k Figure 2. THD + N vs. Frequency (PL = 500 mW) 10 TA = 25°C VCC = 5.0 V AVD = 10 (BTL) RL = 8 W THD + N (%) C2 = 0.1 mF THD + N (%) 10 Figure 3. THD + N vs. Frequency (PL = 1 W) TA = 25°C VCC = 5.0 V AVD = 10 (BTL) RL = 8 W C2 = 0.1 mF 1 1 C2 = 1.0 mF 0.1 20 100 1k FREQUENCY (Hz) 10 k 0.1 C2 = 1.0 mF 20 100 1k FREQUENCY (Hz) 10 k Figure 4. THD + N vs. Frequency (PL = 500 mW) 10 TA = 25°C VCC = 5.0 V AVD = 20 (BTL) RL = 8 W THD + N (%) C2 = 0.1 mF 1 THD + N (%) 10 Figure 5. THD + N vs. Frequency (PL = 1 W) TA = 25°C VCC = 5.0 V AVD = 20 (BTL) RL = 8 W C2 = 0.1 mF 1 C2 = 1.0 mF C2 = 1.0 mF 0.1 0.1 20 100 1k FREQUENCY (Hz) 10 k 20 100 1k FREQUENCY (Hz) 10 k Figure 6. THD + N vs. Frequency (PL = 500 mW) Figure 7. THD + N vs. Frequency (PL = 1 W) http://onsemi.com 4 NCS2211 TYPICAL PERFORMANCE CHARACTERISTICS 1 1 TA = 25°C VCC = 2.7 V AVD = 2 (BTL) RL = 8 W THD + N (%) C2 = 0.1 mF 0.1 TA = 25°C VCC = 3.3 V AVD = 2 (BTL) RL = 8 W C2 = 0.1 mF THD + N (%) 0.1 C2 = 1.0 mF 0.01 20 100 1k FREQUENCY (Hz) 10 k 0.01 C2 = 1.0 mF 20 100 1k FREQUENCY (Hz) 10 k Figure 8. THD + N vs. Frequency (PL = 350 mW) 10 TA = 25°C VCC = 3.3 V AVD = 10 (BTL) RL = 8 W THD + N (%) 10 Figure 9. THD + N vs. Frequency (PL = 250 mW) TA = 25°C VCC = 2.7 V AVD = 10 (BTL) RL = 8 W C2 = 0.1 mF THD + N (%) 1 C2 = 0.1 mF 1 0.1 C2 = 1.0 mF 0.1 C2 = 1.0 mF 0.01 20 100 1k FREQUENCY (Hz) 10 k 0.01 20 100 1k FREQUENCY (Hz) 10 k Figure 10. THD + N vs. Frequency (PL = 350 mW) 10 C2 = 0.1 mF THD + N (%) 1 TA = 25°C VCC = 3.3 V AVD = 20 (BTL) RL = 8 W THD + N (%) 10 Figure 11. THD + N vs. Frequency (PL = 250 mW) TA = 25°C VCC = 2.7 V AVD = 20 (BTL) RL = 8 W C2 = 0.1 mF 1 0.1 C2 = 1.0 mF 0.1 C2 = 1.0 mF 0.1 20 100 1k FREQUENCY (Hz) 10 k 0.01 20 100 1k FREQUENCY (Hz) 10 k Figure 12. THD + N vs. Frequency (PL = 350 mW) Figure 13. THD + N vs. Frequency (PL = 250 mW) http://onsemi.com 5 NCS2211 TYPICAL PERFORMANCE CHARACTERISTICS 100 STEADY STATE POWER (W) TA = 25°C C2 = 0.1 mF AVD = 2 (BTL) RL = 8 W 1.50 1.25 1.00 0.75 0.50 8 Lead DFN - 50 mm2 SOIC-8 50 mm2 75 100 125 150 8 Lead DFN - 650 mm2 8 Lead DFN 150 mm2 SOIC-8 650 mm2 10 THD + N (%) VCC = 2.7 V VCC = 5.0 V VCC = 3.3 V 1 0.1 0.25 SOIC-8 - 150 mm2 0 25 50 0.01 0.0001 0.001 0.01 0.1 1 10 POUTPUT (W) T-AMBIENT (°C) Figure 14. THD + N vs. POUTPUT (Frequency = 20 Hz) 100 TA = 25°C C2 = 0.1 mF AVD = 2 (BTL) RL = 8 W VCC = 2.7 V VCC = 5.0 V VCC = 3.3 V Pout (W) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.01 0.0001 0.001 0.01 0.1 1 10 POUTPUT (W) 0 Figure 15. SOA Curve with PCB Copper Thickness 2 oz and Various Areas 10 THD + N (%) VCC = 5.0 V 1 0.1 VCC = 3.3 V VCC = 2.7 V 4 8 12 16 20 24 28 32 36 40 44 48 LOAD RESISTANCE (W) Figure 16. THD + N vs. POUTPUT (Frequency = 1 kHz) TA = 25°C C2 = 0.1 mF AVD = 2 (BTL) RL = 8 W INTERNAL POWER DISSIPATION (W) 100 VCC = 2.7 V VCC = 5.0 V VCC = 3.3 V 1.4 Figure 17. Pout vs. Load Resistance VCC = 5 V 1.2 1.0 0.8 0.6 0.4 0.2 0 0 0.5 1.0 OUTPUT POWER (W) 1.5 2.0 RL = 8 W RL = 4 W 10 THD + N (%) 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 10 POUTPUT (W) Figure 18. THD + N vs. POUTPUT (Frequency = 20 kHz) Figure 19. Power Dissipation vs. Output Power http://onsemi.com 6 NCS2211 TYPICAL PERFORMANCE CHARACTERISTICS Channel 1: Enable Logic and OUT+ and OUT- Channel 2: Differential Output Time Base: 1 mSec per Division Figure 20. Turn-on Time Channel 1: SHUTDOWN Logic and OUT+ and OUT- Channel 2: Differential Output Time Base: 5 mSec per Division Figure 21. Turn-off Time 100 80 60 GAIN (dB) 40 20 0 -20 10 100 1k 10 k 100 k 1M 10 M FREQUENCY (Hz) 180 135 90 45 0 0.35 0.30 OUTPUT THD + N (%) 0.25 0.20 0.15 VCC = 5 V RL = 8 W C2 = 22 mF Ripple = 200 mVp-p f-input = 1 kHz (dB) -45 -50 -55 -60 -65 -70 -75 -80 100 k -45 -90 100 M PHASE SHIFT (degrees) 0.10 0.05 0 0.1 1 10 100 1k 10 k FREQUENCY OF POWER-SUPPLY RIPPLE (Hz) Figure 22. Gain and Phase Shift vs. Frequency Figure 23. Power-Supply Rejection http://onsemi.com 7 NCS2211 APPLICATIONS INFORMATION The NCS2211 is unity gain stable and therefore does not require any compensation, but a proper power-supply bypass is required as shown in Figure 24. Performance will be enhanced by adding a filter capacitor (C2) to the mid-supply node (pin 2). See Typical Performance Characteristics for details. Typical Application of the Device: +5 V VCC 6 C3 10 mF⎟⎟ 0.1 mF R2 20k 4 3 + 5 Output (+) It is preferable to AC couple the input to avoid a large DC output offset. Both outputs can be driven to within 400 mV of either supply rail with an 8 W load. R1 C1 20k (-) Input 0.1 mF 2 VPP (+) Input RL Bias Filtering 2 C2 + 8 Output (-) 0.1 mF 7 1 Enable VEE Figure 24. THERMAL CONSIDERATIONS GAIN Care must be taken to not exceed the maximum junction temperature of the device (150°C). Figure 15 shows the tradeoff between output power and junction temperature for different areas of exposed PCB copper (2 oz). If the maximum power is exceeded momentarily, normal circuit operation will be restored as soon as the die temperature is reduced. Leaving the device in an “overheated” condition for an extended period can result in device burnout. To ensure proper operation, it is important to observe the SOA curves. Since the output is differential, the gain from input to the speaker is: AVD = 2 x R2/R1. For low level input signals, THD will be optimized by pre-amplifying the signal and running the NCS2211 at gain AVD = 2 and C2=1 mF. BIAS FILTERING Even though the NCS2211 will operate nominally with no filter capacitor on pin 2, THD performance will be improved dramatically with a filter capacitor installed (see Typical Performance Characteristics). In addition a C2 filter capacitor at pin 2 will suppress start-up popping noise. To insure optimal suppression the time constant of the bias filtering needs to be greater than the time constant of the input capacitive coupling circuit, that is C2 x 25 k > C1 x R1. ORDERING INFORMATION Device NCS2211DG NCS2211DR2G NCS2211MNTXG Package SOIC-8 (Pb-Free) SOIC-8 (Pb-Free) DFN-8 (Pb-Free) Shipping† 98 Units / Rail 2500 / Tape & Reel 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 8 NCS2211 PACKAGE DIMENSIONS DFN8 3x3, 0.5P CASE 506BJ-01 ISSUE O D A B EDGE OF PACKAGE NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D D2 E E2 e K L L1 MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.18 0.30 3.00 BSC 1.64 1.84 3.00 BSC 1.35 1.55 0.50 BSC 0.20 --0.30 0.50 0.00 0.03 L PIN 1 REFERENCE L1 E DETAIL A OPTIONAL CONSTRUCTION 2X 0.10 C 2X 0.10 C 0.05 C 8X 0.05 C NOTE 4 8X L E2 8X K OPTIONAL CONSTRUCTION 8 5 8X b 0.10 C A B 0.05 C NOTE 3 8X e BOTTOM VIEW http://onsemi.com 9 ÉÉ ÉÉ ÇÇÇ ÇÇÇ ÇÇÇ 1 L TOP VIEW DETAIL A OPTIONAL CONSTRUCTION DETAIL B A (A3) SIDE VIEW D2 4 SEATING PLANE A1 DETAIL A C SOLDERMASK DEFINED MOUNTING FOOTPRINT MOLD CMPD EXPOSED Cu 1.85 8X 0.35 DETAIL B 3.30 1.55 0.63 0.50 PITCH DIMENSION: MILLIMETERS NCS2211 PACKAGE DIMENSIONS SOIC-8 D SUFFIX CASE 751-07 ISSUE AH A 8 5 -X- B 1 4 S 0.25 (0.010) M Y M -YG C -ZH D 0.25 (0.010) M SEATING PLANE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 N X 45 _ 0.10 (0.004) M ZY S J X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operat‐ ing parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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