NCV7340D14G

NCV7340 High Speed Low Power CAN Transceiver Description The NCV7340 CAN transceiver is the interface between a controller area network (CAN) protocol controller and the physical bus and may be used in both 12 V and 24 V systems. The transceiver provides differential transmit capability to the bus and differential receive capability to the CAN controller. The NCV7340 is a new addition to the CAN high−speed transceiver family and is an improved drop−in replacement for the AMIS−42665. Due to the wide common−mode voltage range of the receiver inputs, the NCV7340 is able to reach outstanding levels of electromagnetic susceptibility (EMS). Similarly, extremely low electromagnetic emission (EME) is achieved by the excellent matching of the output signals. Features http://onsemi.com 8 1 SOIC−8 CASE 751AZ PIN ASSIGNMENT • Compatible with the ISO 11898 Standard (ISO 11898−2, ISO • Low Quiescent Current • High Speed (up to 1 Mbps) • Ideally Suited for 12 V and 24 V Industrial and Automotive • • • • • • • • • • • 11898−5 and SAE J2284) TxD GND VCC RxD 1 8 STB CANH CANL VSPLIT NCV7340 2 3 4 7 6 5 Applications Extremely Low Current Standby Mode with Wakeup via the Bus Low EME Common−Mode Choke is No Longer Required Voltage Source via VSPLIT Pin for Stabilizing the Recessive Bus Level (Further EMC Improvement) No Disturbance of the Bus Lines with an Un−powered Node Transmit Data (TxD) Dominant Time−out Function Thermal Protection Bus Pins Protected Against Transients in an Automotive Environment Bus and VSPLIT Pins Short−Circuit Proof to Supply Voltage and Ground Logic Level Inputs Compatible with 3.3 V Devices Up to 110 Nodes can be Connected to the Same Bus in Function of Topology These are Pb−Free Devices (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. Typical Applications • Automotive • Industrial Networks © Semiconductor Components Industries, LLC, 2010 May, 2010 − Rev. 1 1 Publication Order Number: NCV7340/D NCV7340 Table 1. KEY TECHNICAL CHARACTERISTICS AND OPERATING RANGES Symbol VCC VSTB VTxD VRxD VCANH VCANL VSPLIT VO(dif)(bus_dom) CM−range Cload tpd(rec−dom) tpd(dom−rec) TJ Parameter Power supply voltage DC voltage at pin STB DC voltage at pin TxD DC voltage at pin RxD DC voltage at pin CANH DC voltage at pin CANL DC voltage at pin VSPLIT Differential bus output voltage in dominant state Input common−mode range for comparator Load capacitance on IC outputs Propagation delay TxD to RxD Propagation delay TxD to RxD Junction temperature See Figure 7 See Figure 7 75 75 −40 0 < VCC < 5.25 V; no time limit 0 < VCC < 5.25 V; no time limit 0 < VCC < 5.25 V; no time limit 42.5 W < RLT < 60 W Guaranteed differential receiver threshold and leakage current Conditions Min 4.75 0 0 0 −50 −50 −40 1.5 −35 Max 5.25 VCC VCC VCC +50 +50 +40 3 +35 15 230 245 150 Unit V V V V V V V V V pF ns ns °C BLOCK DIAGRAM VCC VCC NCV7340 3 POR 7 TxD 1 Timer VCC CANH VSPLIT CANL Thermal shutdown VCC VSPLIT 5 STB 8 Mode & wakeup control Driver control 6 RxD GND 4 Wakeup Filter COMP 2 COMP Figure 1. Block Diagram http://onsemi.com 2 NCV7340 TYPICAL APPLICATION Application Schematics VBAT IN 5V−reg OUT VCC STB 3 8 7 VCC RLT = 60 W CANH VSPLIT CLT = 47 nF CAN BUS NCV7340 CAN controller RxD TxD 4 5 1 2 6 CANL RLT = 60 W GND GND Figure 2. Application Diagram Pin Description TxD GND VCC RxD 1 2 3 4 8 7 6 5 STB CANH CANL VSPLIT Figure 3. NCV7340 Pin Assignment NCV7340 Table 2. PIN FUNCTION DESCRIPTION Pin 1 2 3 4 5 6 7 8 Name TxD GND VCC RxD VSPLIT CANL CANH STB Description Transmit data input; low input → dominant driver; internal pullup current Ground Supply voltage Receive data output; dominant transmitter → low output Common−mode stabilization output Low−level CAN bus line (low in dominant mode) High−level CAN bus line (high in dominant mode) Standby mode control input http://onsemi.com 3 NCV7340 FUNCTIONAL DESCRIPTION Operating Modes NCV7340 provides two modes of operation as illustrated in Table 3. These modes are selectable through pin STB. Table 3. OPERATING MODES Pin STB Low High Pin RXD Mode Normal Standby Low Bus dominant Wakeup request detected High Bus recessive No wakeup request detected Split Circuit The VSPLIT pin is operational only in normal mode. In standby mode this pin is floating. The VSPLIT can be connected as shown in Figure 2 or, if it’s not used, can be left floating. Its purpose is to provide a stabilized DC voltage of 0.5 x VCC to the bus avoiding possible steps in the common−mode signal therefore reducing EME. These unwanted steps could be caused by an un−powered node on the network with excessive leakage current from the bus that shifts the recessive voltage from its nominal 0.5 x VCC voltage. Wakeup When a valid wakeup (dominant state longer than tdbus) is received during the standby mode the RxD pin is driven low. The wakeup detection is not latched: RxD returns to High state after tdbus when the bus signal is released back to recessive – see Figure 4. Wake−up behavior in case of a permanent dominant − due to, for example, a bus short − represents the only difference between the circuit functional sub−versions listed in the Ordering Information table. When the standby mode is entered while a dominant is present on the bus, the “unconditioned bus wake−up” versions will signal a bus−wakeup immediately after the state transition (signal RxD1 in Figure 4). The other version will signal bus−wakeup only after the initial dominant is released (signal RxD2 in Figure 4). In this way it’s ensured, that a CAN bus can be put to a low−power mode even if the nodes have a level sensitivity to RxD pin and a permanent dominant is present on the bus. Normal Mode In the normal mode, the transceiver is able to communicate via the bus lines. The signals are transmitted and received to the CAN controller via the pins TxD and RxD. The slopes on the bus lines outputs are optimized to give extremely low EME. Standby Mode In standby mode both the transmitter and receiver are disabled and a very low−power differential receiver monitors the bus lines for CAN bus activity. The bus lines are terminated to ground and supply current is reduced to a minimum, typically 10 mA. When a wake−up request is detected by the low−power differential receiver, the signal is first filtered and then verified as a valid wake signal after a time period of tdbus, the RxD pin is driven low by the transceiver to inform the controller of the wake−up request. CANH CANL STB RxD 1 RxD 2 tdbus PD20100520.01 tdbus time normal standby Figure 4. NCV7340 Wakeup Behavior Overtemperature Detection threshold and pin TxD goes high. The thermal protection circuit is particularly needed when a bus line short circuits. TxD Dominant Time−out Function A thermal protection circuit protects the IC from damage by switching off the transmitter if the junction temperature exceeds a value of approximately 160°C. Because the transmitter dissipates most of the power, the power dissipation and temperature of the IC is reduced. All other IC functions continue to operate. The transmitter off−state resets when the temperature decreases below the shutdown A TxD dominant time−out timer circuit prevents the bus lines being driven to a permanent dominant state (blocking all network communication) if pin TxD is forced permanently low by a hardware and/or software application failure. The timer is triggered by a negative edge on pin TxD. If the duration of the low−level on pin TxD exceeds the http://onsemi.com 4 NCV7340 internal timer value tdom(TxD), the transmitter is disabled, driving the bus into a recessive state. The timer is reset by a positive edge on pin TxD. This TxD dominant time−out time (tdom(TxD)) defines the minimum possible bit rate to 40 kbps. Fail Safe Features A current−limiting circuit protects the transmitter output stage from damage caused by accidental short circuit to either positive or negative supply voltage, although power dissipation increases during this fault condition. The pins CANH and CANL are protected from automotive electrical transients (according to ISO 7637; see Figure 5). Pins TxD and STB are pulled high internally should the input become disconnected. Pins TxD, STB and RxD will be floating, preventing reverse supply should the VCC supply be removed. ELECTRICAL CHARACTERISTICS Definitions All voltages are referenced to GND (Pin 2). Positive currents flow into the IC. Sinking current means the current is flowing into the pin; sourcing current means the current is flowing out of the pin. Absolute Maximum Ratings Table 4. ABSOLUTE MAXIMUM RATINGS Symbol VCC VCANH VCANL VSPLIT VTxD VRxD VSTB Vesd Supply voltage DC voltage at pin CANH DC voltage at pin CANL DC voltage at pin VSPLIT DC voltage at pin TxD DC voltage at pin RxD DC voltage at pin STB Electrostatic discharge voltage at all pins Electrostatic discharge voltage at CANH and CANL pins Latchup Tstg TA TJ Static latchup at all pins Storage temperature Ambient temperature Maximum junction temperature Note 1 Note 2 Note 3 Note 4 −55 −40 −40 0 < VCC < 5.25 V; no time limit 0 < VCC < 5.25 V; no time limit 0 < VCC < 5.25 V; no time limit Parameter Conditions Min −0.3 −50 −50 −40 −0.3 −0.3 −0.3 −6 −500 −12 Max +6 +50 +50 +40 6 6 6 6 500 12 120 +150 +125 +170 Unit V V V V V V V kV V kV mA °C °C °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Standardized human body model electrostatic discharge (ESD) pulses in accordance to EIA−JESD22. Equivalent to discharging a 100 pF capacitor through a 1.5 kW resistor. 2. Standardized charged device model ESD pulses when tested according to ESD−STM5.3.1−1999. 3. System human body model electrostatic discharge (ESD) pulses. Equivalent to discharging a 150 pF capacitor through a 330 W resistor. 4. Static latchup immunity: Static latchup protection level when tested according to EIA/JESD78. http://onsemi.com 5 NCV7340 Table 5. CHARACTERISTICS VCC = 4.75 V to 5.25 V; TJ = −40 to +150°C; RLT = 60 W unless specified otherwise. Symbol SUPPLY (Pin VCC) ICC ICCS VIH VIL IIH IIL Ci VIH VIL IIH IIL Ci Ioh Iol Voh Supply current Supply current in standby mode Dominant; VTxD = 0 V Recessive; VTxD = VCC TJ,max = 100°C Output recessive Output dominant VTxD = VCC VTxD = 0 V Not tested 2.0 −0.3 −5 −350 − 35 5 10 75 10 15 mA mA Parameter Conditions Min Typ Max Unit TRANSMITTER DATA INPUT (Pin TxD) High−level input voltage Low−level input voltage High−level input current Low−level input current Input capacitance − − 0 −200 5 VCC +0.8 +5 −75 10 V V mA mA pF TRANSMITTER MODE SELECT (Pin STB) High−level input voltage Low−level input voltage High−level input current Low−level input current Input capacitance Standby mode Normal mode VSTB = VCC VSTB = 0 V Not tested 2.0 −0.3 −5 −10 − − − 0 −4 5 VCC +0.8 +5 −1 10 V V mA mA pF RECEIVER DATA OUTPUT (Pin RxD) High−level output current Low−level output current High−level output voltage normal mode VRxD = VCC – 0.4 V VRxD = 0.4 V standby mode IRxD = −100 mA −1 2 VCC – 1.1 −0.4 6 VCC – 0.7 −0.1 12 VCC – 0.4 mA mA V BUS LINES (Pins CANH and CANL) Vo(reces) (norm) Vo(reces) (stby) Io(reces) (CANH) Io(reces) (CANL) ILI(CANH) ILI(CANL_ Vo(dom) (CANH) Vo(dom) (CANL) Vo(dif) (bus_dom) Vo(dif) (bus_rec) Io(sc) (CANH) Io(sc) (CANL) Vi(dif) (th) Vihcm(dif) (th) Recessive bus voltage on pins CANH and CANL Recessive bus voltage on pins CANH and CANL Recessive output current at pin CANH Recessive output current at pin CANL Input leakage current to pin CANH Input leakage current to pin CANL Dominant output voltage at pin CANH Dominant output voltage at pin CANL Differential bus output voltage (VCANH − VCANL) Differential bus output voltage (VCANH − VCANL) Short circuit output current at pin CANH Short circuit output current at pin CANL Differential receiver threshold voltage (see Figure 6) Differential receiver threshold voltage for high common−mode (see Figure 6) VTxD = VCC; no load normal mode VTxD = VCC; no load standby mode −35 V < VCANH < +35 V; 0 V < VCC < 5.25 V −35 V < VCANL < +35 V; 0 V < VCC < 5.25 V VCC = 0 V VCANL = VCANH = 5 V VCC = 0 V VCANL = VCANH = 5 V VTxD = 0 V VTxD = 0 V VTxD = 0 V; dominant; 42.5 W < RLT < 60 W VTxD = VCC; recessive; no load VCANH = 0 V; VTxD = 0 V VCANL = 36 V; VTxD = 0 V −5 V < VCANL < +12 V; −5 V < VCANH < +12 V; −35 V < VCANL < +35 V; −35 V < VCANH < +35 V; 2.0 −100 −2.5 −2.5 −10 −10 3.0 0. 5 1.5 −120 −120 45 0.5 0.40 2.5 0 − − 0 0 3.6 1.4 2.25 0 −70 70 0.7 0.7 3.0 100 +2.5 +2.5 10 10 4.25 1.75 3.0 +50 −45 120 0.9 1.0 V mV mA mA mA mA V V V mV mA mA V V http://onsemi.com 6 NCV7340 Table 5. CHARACTERISTICS VCC = 4.75 V to 5.25 V; TJ = −40 to +150°C; RLT = 60 W unless specified otherwise. Symbol Parameter Conditions Min Typ Max Unit BUS LINES (Pins CANH and CANL) Vi(dif) (th)_STDBY Ri(cm) (CANH) Ri(cm) (CANL) Ri(cm) (m) Ri(dif) Ci(CANH) Ci(CANL) Ci(dif) VSPLIT ISPLIT(i) ISPLIT(lim) TJ(sd) Differential receiver threshold voltage in standby mode (see Figure 6) Common−mode input resistance at pin CANH Common−mode input resistance at pin CANL Matching between pin CANH and pin CANL common mode input resistance Differential input resistance Input capacitance at pin CANH Input capacitance at pin CANL Differential input capacitance VTxD = VCC; not tested VTxD = VCC; not tested VTxD = VCC; not tested Normal mode; −500 mA < ISPLIT < 500 mA Standby mode Normal mode 0.3 x VCC −5 1.3 VCANH = VCANL −12 V < VCANL < +12 V; −12 V < VCANH < +12 V; 0.4 15 15 −3 25 0.8 26 26 0 50 7.5 7.5 3.75 1.15 37 37 +3 75 20 20 10 V kW kW % kW pF pF pF COMMON−MODE STABILIZATION (Pin VSPLIT) Reference output voltage at pin VSPLIT VSPLIT leakage current VSPLIT limitation current Shutdown junction temperature − 0.7 x VCC +5 5 mA mA THERMAL SHUTDOWN junction temperature rising 150 160 185 °C TIMING CHARACTERISTICS (see Figures 7 and 8) td(TxD−BUSon) td(TxD−BUSoff) td(BUSon−RXD) td(BUSoff−RXD) tpd(rec−dom) td(dom−rec) td(stb−nm) tdbus tdom(TxD) Delay TxD to bus active Delay TxD to bus inactive Delay bus active to RxD Delay bus inactive to RxD Propagation delay TxD to RxD from recessive to dominant Propagation delay TxD to RxD from dominant to recessive Delay standby mode to normal mode Dominant time for wakeup via bus Vdif(dom) > 1.4 V Vdif(dom) > 1.2 V TxD dominant time for time out VTxD = 0 V Cl = 100 pF between CANH to CANL Cl = 100 pF between CANH to CANL Crxd = 15 pF Crxd = 15 pF Cl = 100 pF between CANH to CANL Cl = 100 pF between CANH to CANL 20 30 25 30 75 75 5 0.75 0.75 300 7.5 2.5 3 650 85 60 55 100 105 105 105 105 230 245 10 5 5.8 1000 ns ns ns ns ns ns ms ms ms ms http://onsemi.com 7 NCV7340 MEASUREMENT SETUPS AND DEFINITIONS +5 V 100 nF 3 VCC 7 1 TxD CANH 1 nF V SPLIT 1 nF CANL NCV7340 8 2 5 Transient Generator RxD 4 6 15 pF STB GND Figure 5. Test Circuit for Automotive Transients VRxD High Low Hysteresis 0.5 0.9 Vi(dif)(hys) Figure 6. Hysteresis of the Receiver +5 V 100 nF 3 VCC 7 1 TxD CANH RLT VSPLIT 60 W CLT 100 pF NCV7340 8 2 5 RxD 4 6 CANL 15 pF STB GND Figure 7. Test Circuit for Timing Characteristics http://onsemi.com 8 NCV7340 TxD HIGH LOW CANH CANL dominant Vi(dif) = VCANH − V CANL 0.9V 0.5V recessive RxD td(TxD−BUSon) tpd(rec−dom) 0.3 x VCC 0.7 x VCC td(TxD−BUSoff) td(BUSon−RxD) tpd(dom−rec) td(BUSoff−RxD) Figure 8. Timing Diagram for AC Characteristics DEVICE ORDERING INFORMATION Part Number NCV7340D12G NCV7340D12R2G NCV7340D14G NCV7340D14R2G Description HS LP CAN Transceiver (Unconditioned Bus Wakeup) HS LP CAN Transceiver (Bus Wakeup Inactive in Case of Bus Fault) −40°C to +125°C Temperature Range Package Type Shipping† 96 Tube / Tray SOIC 150 8 (Mate Sn, JEDEC MS−012) (Pb−Free) 3000 / Tape & Reel 96 Tube / Tray 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 9 NCV7340 PACKAGE DIMENSIONS SOIC 8 CASE 751AZ−01 ISSUE O http://onsemi.com 10 NCV7340 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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