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NFVA35065L32

NFVA35065L32

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    PowerDIP27

  • 描述:

    NFVA35065L32

  • 数据手册
  • 价格&库存
NFVA35065L32 数据手册
DATA SHEET www.onsemi.com ASPM 27 Series 3−Phase 650 V, 50 A Automotive Smart Power Module NFVA35065L32 General Description NFVA35065L32 is an advanced Automotive SPM® module providing a fully−featured, high−performance inverter output stage for hybrid and electric vehicles. These modules integrate optimized gate drive of the built−in IGBTs to minimize EMI and losses, while also providing multiple on−module protection features including under−voltage lockouts, over−current shutdown, thermal monitoring of drive IC, and fault reporting. The built−in, high−speed HVIC requires only a single supply voltage and translates the incoming logic−level gate inputs to the high−voltage, high−current drive signals required to properly drive the module’s internal IGBTs. Separate negative IGBT terminals are available for each phase to support the widest variety of control algorithms. 3D Package Drawing (Click to Activate 3D Content) ASPM27−CCA CASE MODCB MARKING DIAGRAM XX Features • Automotive SPM in 27 Pin DIP Package • AEC & AQG324 Qualified and PPAP Capable • 650 V/50 A 3−Phase IGBT Inverter with Integral Gate Drivers and Protections • 175°C Guaranteed Short−Circuit Rated FS Trench IGBTs with Low Vce(sat) and Fast Switching • Outstanding Thermal Resistance Using AlN DBC Substrate • Separated Open−Emitter Pins from Low−Side IGBTs for • • • • • Three−Phase Current Sensing Single−Grounded Power Supply LVIC Temperature−Sensing Built−In for Temperature Monitoring Isolation Rating: 2500 Vrms/1 min. Pb−Free and RoHS Compliant UI1557 Certified (File No. E209204) and UL94V−0 Compliant ON XX XXXXXXXXXXXX XXX Y WW 0000001 = onsemi Logo = Version and Current Rate = Specific Device Code = Lot Number = Year = Work Week = Serial Number ORDERING INFORMATION See detailed ordering and shipping information on page 6 of this data sheet. Applications • Automotive High Voltage Auxiliary Motors ♦ ♦ ♦ ♦ Climate e−Compressors Oil/Water Pumps Super/Turbo Chargers Variety Fans Related Resources • AND9800 − Automotive Smart Power Module, 650 V ASPM27 • Series AN−9086 − SPM 3 Package Mounting Guidance Integrated Power Functions • 650 V−50 A IGBT Inverter for Three−phase DC/AC Power Conversion (Refer to Figure 2) © Semiconductor Components Industries, LLC, 2017 April, 2022 − Rev. 6 1 Publication Order Number: NFVA35065L32/D NFVA35065L32 Integrated Drive, Protection and System Control Functions • For inverter high−side IGBTs: gate drive circuit, • • Fault signaling: corresponding to UVLO (low−side high−voltage isolated high−speed level shifting control circuit, Under−Voltage Lock−Out Protection (UVLO) For inverter low−side IGBTs: gate drive circuit, Short−Circuit Protection (SCP) control circuit, Under−Voltage Lock−Out Protection (UVLO) supply) and SC faults • Input interface: active−HIGH interface, works with 3.3/5 V logic, Schmitt−trigger input PIN CONFIGURATION Figure 1. Top View www.onsemi.com 2 NFVA35065L32 PIN DESCRIPTIONS Pin Number Pin Name Pin Description 1 VDD(L) Low−Side Common Bias Voltage for IC and IGBTs Driving 2 COM Common Supply Ground 3 IN(UL) Signal Input for Low−Side U−Phase 4 IN(VL) Signal Input for Low−Side V−Phase 5 IN(WL) Signal Input for Low−Side W−Phase 6 VFO Fault Output 7 VTS Output for LVIC Temperature Sensing Voltage Output 8 CSC Shut Down Input for Short−Circuit Current Detection Input 9 IN(UH) Signal Input for High−Side U−Phase 10 VDD(H) High−Side Common Bias Voltage for IC and IGBTs Driving 11 VB(U) High−Side Bias Voltage for U−Phase IGBT Driving 12 VS(U) High−Side Bias Voltage Ground for U−Phase IGBT Driving 13 IN(VH) Signal Input for High−Side V−Phase 14 VDD(H) High−Side Common Bias Voltage for IC and IGBTs Driving 15 VB(V) High−Side Bias Voltage for V−Phase IGBT Driving 16 VS(V) High−Side Bias Voltage Ground for V−Phase IGBT Driving 17 IN(WH) Signal Input for High−Side W−Phase 18 VDD(H) High−Side Common Bias Voltage for IC and IGBTs Driving 19 VB(W) High−Side Bias Voltage for W−Phase IGBT Driving 20 VS(W) High−Side Bias Voltage Ground for W−Phase IGBT Driving 21 NU Negative DC−Link Input for U−Phase 22 NV Negative DC−Link Input for V−Phase 23 NW Negative DC−Link Input for W−Phase 24 U Output for U−Phase 25 V Output for V−Phase 26 W Output for W−Phase 27 P Positive DC−Link Input www.onsemi.com 3 NFVA35065L32 INTERNAL EQUIVALENT CIRCUIT AND INPUT/OUTPUT PINS (19) V B(W) (18) V DD(H) (17) IN (WH) (20) V S(W) (15) V B(V) (14) V DD(H) (13) IN (VH) (16) V S(V) (11) V B(U) (10) V DD(H) (9) IN (UH) (12) V S(U) (8) C SC (7) V TS (6) V FO (5) IN (WL) (4) IN (VL) (3) IN (UL) (2) COM (1) V DD(L) P (27) VB V DD COM IN OUT VS W (26) VB V DD COM IN OUT VS V (25) VB V DD COM IN OUT C SC OUT VS V TS U (24) N W (23) V FO IN OUT IN N V (22) IN COM OUT V DD N U (21) NOTES: 1. Inverter low−side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection functions. 2. Inverter power side is composed of four inverter DC−link input terminals and three inverter output terminals. 3. Inverter high−side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT. Figure 2. Internal Block Diagram www.onsemi.com 4 NFVA35065L32 ABSOLUTE MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Parameter Conditions Rating Unit INVERTER PART VPN VPN(Surge) VCES Supply Voltage Applied between P−NU, NV, NW 500 V Supply Voltage (Surge) Applied between P−NU, NV, NW 550 V 650 V Collector−Emitter Voltage ±IC Each IGBT Collector Current TC = 100°C, VDD ≥ 15 V, TJ ≤ 175°C (Note 4) 50 A ±ICP Each IGBT Collector Current (Peak) TC = 25°C, TJ ≤ 175°C, Under 1 ms Pulse Width (Note 4) 100 A PC Collector Dissipation TC = 25°C per One Chip (Note 4) 428 W TJ Operating Junction Temperature IGBT and Diode −40∼175 °C Driver IC −40∼150 CONTROL PART VDD Control Supply Voltage Applied between VDD(H), VDD(L)−COM 20 V VBS High−Side Control Bias Voltage Applied between VB(U)−VS(U), VB(V)−VS(V), VB(W)−VS(W) 20 V VIN Input Signal Voltage Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL), IN(WL)−COM −0.3∼VDD+0.3 V VFO Fault Output Supply Voltage Applied between VFO−COM −0.3∼VDD+0.3 V IFO Fault Output Current Sink Current at VFO pin 2 mA VSC Current Sensing Input Voltage Applied between CSC−COM −0.3∼VDD+0.3 V Short Circuit Withstand Time VDD = VBS ≤ 16.5 V, VPN ≤ 400 V, TJ = 150°C Non−repetitive 3 ms TOTAL SYSTEM tSC TSTG Storage Temperature VISO Isolation Voltage −55∼175 °C 2500 Vrms 60 Hz, Sinusoidal, AC 1 minute, Connection Pins to Heat Sink Plate THERMAL RESISTANCE Symbol Parameter Rth(j−c)Q Junction to Case Thermal Resistance (Note 5) Package Stray Inductance Rth(j−c)F Ls Conditions Min. Typ. Max. Unit Inverter IGBT part (per 1/6 module) − − 0.35 °C/W Inverter FWD part (per 1/6 module) − − 0.90 °C/W P to NU, NV, NW (Note 5) − 24 − nH 4. These values had been made an acquisition by the calculation considered to design factor. 5. For the measurement point of case temperature (TC), please refer to Figure 1. DBC discoloration and Picker Circle Printing allowed, please refer to application note AN−9190 (Impact of DBC Oxidation on SPM® Module Performance). 6. Stray inductance per phase measured per IEC 60747−15. www.onsemi.com 5 NFVA35065L32 ELECTRICAL CHARACTERISTICS − INVERTER PART (TJ as specified) Symbol Parameter Conditions VCE(SAT) Collector − Emitter Saturation Voltage VDD = VBS = 15 V, VIN = 5 V, IC = 50 A, TJ = 25°C Min. Typ. Max. Unit − 1.75 2.25 V 2.15 2.75 V 1.90 2.50 V 1.85 2.45 V VDD = VBS = 15 V, VIN = 5 V, IC = 50 A, TJ = 175°C VF FWDi Forward Voltage VIN = 0 V, IF = 50 A, TJ = 25°C − VIN = 0 V, IF = 50 A, TJ = 175°C HS High Side Switching Times tON tC(ON) tOFF tC(OFF) VPN = 300 V, VDD = 15 V, IC = 50 A, TJ = 25°C VIN = 0 V ⇔ 5 V, Inductive Load See Figure 4 (Note 7) 0.80 1.20 1.80 ms − 0.30 0.75 ms − 1.25 1.75 ms − 0.15 0.60 ms − 0.15 − ms VPN = 300 V, VDD = 15 V, IC = 50 A, TJ = 25°C VIN = 0 V ⇔ 5 V, Inductive Load See Figure 4 (Note 7) 0.65 1.05 1.65 ms − 0.30 0.75 ms − 1.30 1.80 ms − 0.25 0.60 ms − 0.15 − ms − − 3 mA trr LS Low Side Switching Times tON tC(ON) tOFF tC(OFF) trr ICES Collector−Emitter Leakage Current TJ = 25°C, VCE = VCES PACKAGE MARKING AND ORDERING INFORMATION Part Number Top Marking Package Shipping NFVA35065L32 NFVA35065L32 ASPM27−CCA 10 Units/Tube 7. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For the detailed information see Figure 3. 100% IC 100% IC trr IC VCE IC VIN VIN tON 10% IC VIN(ON) VCE tOFF tc(ON) tc(OFF) VIN(OFF) 90% IC 10% VCE (a) turn − on 10% VCE (b) turn − off Figure 3. Switching Time Definition www.onsemi.com 6 10% IC NFVA35065L32 One−Leg Diagram IC DBS CBS VB VDD COM RBS LS Switching OUT VS IN HS Switching VIN 4.7 kW VCC 0V V +15 V V Inductor IN VDD VFO VTS CSC COM LS Switching 5V VPN U,V,W 300 V HS Switching OUT NU,V,W V +5 V Figure 4. Example Circuit for Switching Test Inductive Load, V PN = 300V, V DD=15V, TJ=25℃ 4000 IGBT Turn−on, Eon IGBT Turn−off, Eoff FRD Turn−off, Erec IGBT Turn−on, Eon IGBT Turn−off, Eoff FRD Turn−off, Erec SWITCHING LOSS ESW [uJ] 3500 3000 2500 2000 1500 1000 3000 2500 2000 1500 1000 500 500 0 0 0 10 20 30 40 0 50 10 20 30 Figure 5. Switching Loss Characteristics 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 20 40 COLLECTOR CURRENT, I C [AMPERES] COLLECTOR CURRENT, IC [AMPERES] VTS [V] SWITCHING LOSS ESW [uJ] 3500 Inductive Load, V PN = 300V, V DD=15V, TJ=150℃ 4000 40 60 80 100 120 140 TLVIC [°C] Figure 6. Temperature Profile of VTS (Typical) www.onsemi.com 7 160 50 NFVA35065L32 CONTROL PART (TJ = 25°C) Symbol Parameter IQDDH Quiescent VDD Supply Current IQDDL IPDDH Operating VDD Supply Current IPDDL Conditions Min. Typ. Max. Unit VDD(H) = 15 V, IN(UH,VH.WH) = 0 V VDD(H) − COM − − 0.40 mA VDD(L) = 15 V, IN(UL,VL,WL) = 0 V VDD(L) − COM − − 4.80 mA VDD(H) = 15 V, fPWM = 20 kHz, duty = 50%, applied to one PWM signal input for High−Side VDD(H) − COM − − 0.48 mA VDD(L) = 15 V, fPWM = 20 kHz, duty = 50%, applied to one PWM signal input for Low−Side VDD(L) − COM − − 8.80 mA IQBS Quiescent VBS Supply Current VBS = 15 V, IN(UH,VH.WH) = 0 V VB(U) − VS(U), VB(V) − VS(V), VB(W) − VS(W), − − 0.24 mA IPBS Operating VBS Supply Current VDD = VBS = 15 V, fPWM = 20 kHz, duty = 50%, applied to one PWM signal input for High−Side VB(U) − VS(U), VB(V) − VS(V), VB(W) − VS(W), − − 4.40 mA VFOH Fault Output Voltage VDD = 15 V, VSC = 0 V, VFO Circuit: 4.7 kW to 5 V Pull−up 4.5 − − V VDD = 15 V, VSC = 1 V, VFO Circuit: 4.7 kW to 5 V Pull−up − − 0.50 V 0.45 0.50 0.55 V VFOL VSC(ref) Short Circuit Trip Level VDD = 15 V (Note 8) UVDDD Supply Circuit Under−Voltage Protection Detection Level 9.80 − 13.3 V Reset Level 10.3 − 13.8 V UVBSD Detection Level 9.00 − 12.5 V UVBSR Reset Level 9.50 − 13.0 V 50 − − ms 540 640 740 mV − − 2.60 V 0.80 − − V UVDDR CSC − COM(L) tFOD Fault−Out Pulse Width VTS LVIC Temperature Sensing Voltage Output VDD(L) = 15 V, TLVIC = 25°C (Note 9) See Figure 6 VIN(ON) ON Threshold Voltage VIN(OFF) OFF Threshold Voltage Applied between IN(UH,VH.WH) − COM IN(UL,VL.WL) − COM 8. Short−circuit current protection os functioning only at the low−sides. 9. TLVIC is the temperature of LVIC itself. VTS is only for sensing temperature of LVIC and can not shutdown IGBTs automatically. RECOMMENDED OPERATING CONDITIONS Value Symbol Parameter Conditions Min. Typ. Max. Unit − 300 400 V VPN Supply Voltage Applied between P − NU, NV, NW VDD Control Supply Voltage Applied between VDD(H) − COM, VDD(L) − COM 14.0 15 16.5 V VBS High−Side Bias Voltage Applied between VB(U) − VS(U), VB(V) − VS(V), VB(W) − VS(W) 13.0 15 18.5 V dVDD/dt, dVBS/dt, Control Supply Variation −1 − 1 V/ms 2.0 − − ms tdead Blanking Time for Preventing Arm−Short For Each Input Signal fPWM PWM Input Signal −40°C ≤ TC ≤ 125°C, −40°C ≤ TJ ≤ 150°C − − 20 kHz VSEN Voltage for Current Sensing Applied between NU, NV, NW − COM (Including Surge Voltage) −5 − 5 V www.onsemi.com 8 NFVA35065L32 RECOMMENDED OPERATING CONDITIONS (continued) PWIN(ON) Minimum Input Pulse Width PWIN(OFF) PWIN(ON) PWIN(OFF) TJ VDD = VBS = 15 V, IC ≤ 50 A, Wiring Inductance between NU,V,W and DC Link N < 10 nH (Note 10) 2.0 − − 2.0 − − VDD = VBS = 15 V, 50 A ≤ IC ≤ 100 A, Wiring Inductance between NU,V,W and DC Link N < 10 nH (Note 10) 2.5 − − 2.5 − − −40 − 150 °C Junction Temperature ms ms 10. This product might not make response if input pulse width is less than the recommended value. MECHANICAL CHARACTERISTICS AND RATINGS Value Parameter Min. Typ. Max. Unit 0 − +150 mm Recommended 0.7 N•m 0.6 0.7 0.8 N•m Recommended 7.1 kg•cm Conditions Device Flatness See Figure 7 Mounting Torque Mounting Screw: M3 See Figure 8 6.2 7.1 8.1 kg•cm Terminal Pulling Strength Load 19.8 N 10 − − s Terminal Bending Strength Load 9.8 N 90 deg. bend 2 − − times − 15 − g Weight (+) (+) Figure 7. Flatness Measurement Position Pre−Screwing: 1 → 2 Final Screwing: 2 → 1 NOTES: 11. Do not make over torque when mounting screws. Much mounting torque may cause DBC cracks, as well as bolts and Al heat−sink destruction 12. Avoid one−sided tightening stress. Figure 8 shows the recommended torque order for mounting screws. Uneven mounting can cause the DBC substrate of package to be damaged. The pre−screwing torque is set to 20 ∼ 30% of maximum torque rating. Figure 8. Mounting Screws Torque Order www.onsemi.com 9 NFVA35065L32 Input signal Protection Circuit State RESET UVDDR Control Supply Voltage SET a1 RESET a6 UVDDD a3 a2 a7 a4 Output Current a5 Fault Output Signal a1: Control supply voltage rises: After the voltage rises UVDDR, the circuits start to operate when next input is applied. a2: Normal operation: IGBT ON and carrying current. a3: Under voltage detection (UVDDD). a4: IGBT OFF in spite of control input condition. a5: Fault output operation starts with a fixed pulse width. a6: Under voltage reset (UVDDR). a7: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. Figure 9. Under−Voltage Protection (Low−Side) Input signal Protection Circuit State RESET UVBSR Control Supply Voltage SET b1 UVBSD b3 RESET b5 b6 b2 b4 Output Current Fault Output Signal High−level (no fault output) b1: Control supply voltage rises: After the voltage rises UVBSR, the circuits start to operate when next input is applied. b2: Normal operation: IGBT ON and carrying current. b3: Under voltage detection (UVBSD). b4: IGBT OFF in spite of control input condition, but there is no fault output signal. b5: Under voltage reset (UVBSR). b6: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. Figure 10. Under−Voltage Protection (High−Side) www.onsemi.com 10 NFVA35065L32 Lower Arms Control Input c6 Protection Circuit State SET Internal IGBT Gate−Emitter Voltage c3 c2 c7 RESET c4 Internal delay at protection circuit SC current trip level c8 c1 Output Current SC reference voltage Sensing Voltage of Sense Resistor Fault Output Signal c5 RC filter circuit time constant delay (with the external sense resistance and RC filter connection) c1: Normal operation: IGBT ON and carrying current. c2: Short circuit current detection (SC trigger). c3: All low−side IGBT’s gate are hard interrupted. c4: All low−side IGBTs turn OFF. c5: Fault output operation starts with a fixed pulse width. c6: Input HIGH: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON. c7: Fault output operation finishes, but IGBT doesn’t turn on until triggering next signal from LOW to HIGH. c8: Normal operation: IGBT ON and carrying current. Figure 11. Short−Circuit Current Protection (Low−Side Operation Only) INPUT/OUTPUT INTERFACE CIRCUIT +5V (MCU or Control power) ASPM (WH) 4.7 kΩ IN(UH), IN(VH), IN(WH) IN(UL), IN(VL), IN(WL) MCU V FO COM NOTE: 13. RC coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s printed circuit board. The input signal section of the ASPM27 product integrates 5kW (typ.) pull−down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal. Figure 12. Recommended CPU I/O Interface Circuit www.onsemi.com 11 NFVA35065L32 R1 Gating WH P (27) (17) IN(WH) (18) VDD(WH) R2 D1 C4 COM C3 C4 D2 R1 (19) VB(W) (20) VS(W) (14) VDD(VH) D1 C4 D2 M C U R1 (15) VB(V) (16) VS(V) Gating UH (10) VDD(UH) R2 D1 C4 C3 C4 5V line D2 IN VDD COM (11) VB(U) OUT VS V (25) M C7 OUT VS VB (12) VS(U) W (26) VS VB (9) IN(UH) C1 C1 C1 IN VDD COM C3 C4 OUT VB (13) IN(VH) Gating VH R2 IN VDD VDC U (24) R3 VTS R6 B D Gating WL Gating VL Gating UL C1 (8) CSC CSC (7) VTS (6) VFO R1 (5) IN(WL) R1 (4) IN(VL) R1 (3) IN(UL) C1 C1 C1 IN C2 NV (22) A R4 E IN COM OUT VDD NU (21) Power GND Line R4 C4 C Input Signal for Short−Circuit Protection R4 OUT IN (1) VDD(L) D2 NW (23) VFO (2) COM 15V line C1 OUT VTS C5 R1 Fault C6 R5 W−Phase Current R5 V−Phase Current U−Phase Current Control GND Line R5 C5 C5 C5 NOTES: 14. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2−3 cm) 15. VFO output is open−drain type. The signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 2mA. Refer to Figure 12. 16. Input signal is active−HIGH type. There is a 5 kW resistor inside the IC to pull−down each input signal line to GND. RC coupling circuits should be adopted for the prevention of input signal oscillation. R1C1 time constant should be selected in the range 50∼150 ns. (Recommended R1 = 100 W, C1 = 1 nF) 17. Each wiring pattern inductance of A point should be minimized (Recommended less than 10 nH). Use the shunt resistor R4 of surface mounted (SMD) type to reduce wiring inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor R4 as close as possible. 18. To prevent errors of the protection function, the wiring of B, C and D point should be as short as possible. 19. In the short−circuit protection circuit, please select the R6C6 time constant in the range 1.5∼2 ms. 20. Each capacitor should be mounted as close to the pins of the ASPM27 product as possible. 21. To prevent surge destruction, the wiring between the smoothing capacitor C7 and the P & GND pins should be as short as possible. The use of a high−frequency non−inductive capacitor between the P & GND pins is recommended. 22. Relays are used at almost every systems of electrical equipment at industrial application. In these cases, there should be sufficient distance between the CPU and the relays. 23. The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals (Recommended zener diode is 22 V/1 W. which has the lower zener impedance characteristic than about 15 W). 24. C2 of around 7 times larger than bootstrap capacitor C3 is recommended. 25. Choose the electrolytic capacitor with good temperature characteristic in C3. Also choose 0.1∼0.2 mF R−category ceramic capacitors with good temperature and frequency characteristics in C4. Figure 13. Typical Application Circuit SPM is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. www.onsemi.com 12 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS 27LD MODULE PDD STD CASE MODCB ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13500G 27LD MODULE PDD STD DATE 30 NOV 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Email Requests to: orderlit@onsemi.com onsemi Website: www.onsemi.com ◊ TECHNICAL SUPPORT North American Technical Support: Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910 Europe, Middle East and Africa Technical Support: Phone: 00421 33 790 2910 For additional information, please contact your local Sales Representative
NFVA35065L32 价格&库存

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NFVA35065L32
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    • 3000+323.98360

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