NTD65N03R

NTD65N03R Power MOSFET 25 V, 65 A, Single N−Channel, DPAK Features • • • • Low RDS(on) Ultra Low Gate Charge Low Reverse Recovery Charge Pb−Free Packages are Available V(BR)DSS 25 V http://onsemi.com RDS(on) TYP 6.5 mW @ 10 V 9.7 mW @ 4.5 V N−Channel D ID MAX 65 A Applications • Desktop CPU Power • DC−DC Converters • High and Low Side Switch MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current (RqJC) Limited by Die Continuous Drain Current (RqJC) Limited by Wire Power Dissipation (RqJC) Continuous Drain Current (Note 1) Power Dissipation (Note 1) Continuous Drain Current (Note 2) Power Dissipation (Note 2) Pulsed Drain Current Steady State Steady State TC = 25°C TC = 85°C TC = 25°C ID Symbol VDSS VGS ID Value 25 "20 65 45 32 A Unit V V A G S 4 4 12 3 1 1 2 3 CASE 369D DPAK (Straight Lead) STYLE 2 23 4 TC = 25°C TA = 25°C TA = 85°C TA = 25°C TA = 25°C Steady State TA = 85°C TA = 25°C PD ID PD ID PD IDM TJ, Tstg dv/dt IS EAS 50 11.4 8.9 1.88 9.5 7.4 1.3 130 −55 to 175 2.0 2.1 71.7 W A W A W A °C V/ns mJ CASE 369AA DPAK (Bend Lead) STYLE 2 CASE 369AC 3 IPAK (Straight Lead) MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain YWW 65 N03G 3 Source 1 Gate 3 Source 2 Drain = Year = Work Week = Device Code = Pb−Free Package Publication Order Number: NTD65N03R/D 4 Drain YWW 65 N03G 1 Gate 2 Drain Y WW 65N03 G tp = 10 ms Operating Junction and Storage Temperature Drain−to−Source (dv/dt) Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (VDD = 24 V, VGS = 10 V, IL = 12 A, L = 1.0 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) A TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 2. Surface−mounted on FR4 board using the minimum recommended pad size (Cu area = 0.15 in sq) [1 oz] including traces. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2006 1 July, 2006 − Rev. 3 NTD65N03R THERMAL RESISTANCE MAXIMUM RATINGS Parameter Junction−to−Case (Drain) Junction−to−Ambient − Steady State (Note 3) Junction−to−Ambient − Steady State (Note 4) Symbol RqJC RqJA RqJA Value 2.5 80 115 Unit °C/W ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Drain−to−Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate−to−Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain−to−Source On Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate−to−Source Charge Gate−to−Drain Charge SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Time PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance Gate Resistance 3. 4. 5. 6. LS LD LG RG TA= 25°C 2.49 0.02 3.46 1.75 W nH VSD tRR ta tb QRR VGS = 0 V, dIS/dt = 100 A/ms, IS = 20 A VGS = 0 V, IS = 20 A TJ = 25°C TJ = 125°C 0.85 0.72 28.8 12.8 16 20 nC ns 1.1 V td(on) tr td(off) tf VGS = 10 V, VDS = 25 V, ID = 30 A, RG = 3.0 W 6.3 18.6 20.3 8.8 ns VGS(TH) VGS(TH)/TJ RDS(on) gFS Ciss Coss Crss QG(TOT) QG(TH) QGS QGD VGS = 5.0 V, VDS = 10 V, ID = 30 A VGS = 10 V, ID = 30 A VGS = 4.5 V, ID = 30 A VDS = 15 V, ID = 15 A CHARGES, CAPACITANCES AND GATE RESISTANCE 1177 VGS = 0 V, f = 1.0 MHz, VDS = 20 V 555 218 12.2 1.5 2.95 6.08 16 nC 1400 pF VGS = VDS, ID = 250 mA 1.0 1.74 4.8 6.5 9.7 27 8.4 14.6 mHos 2.0 V mV/°C mW V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS = 0 V, VDS = 20 V TJ = 25°C TJ = 125°C VGS = 0 V, ID = 250 mA 25 29.5 19.2 1.5 10 "100 nA V mV/°C mA Symbol Test Condition Min Typ Max Unit VDS = 0 V, VGS = "20 V Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). Surface−mounted on FR4 board using the minimum recommended pad size (Cu area = 0.15 in sq [1 oz] including traces). Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTD65N03R 140 ID, DRAIN CURRENT (AMPS) 120 100 80 60 40 20 0 0 2 4 6 8 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 10 V 7V 6V 5.5 V 5V TJ = 25°C 4.5 V 4.2 V 4V 3.8 V 3.6 V 3.4 V 3.2 V 3V 2.8 V ID, DRAIN CURRENT (AMPS) 140 VDS ≥ 10 V 120 100 80 60 40 20 0 0 1 2 TJ = 125°C TJ = 25°C TJ = −55°C 3 4 5 6 VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.03 VGS = 10 V 0.03 VGS = 4.5 V 0.026 0.022 0.018 0.014 0.01 0.006 0.002 0 20 40 60 80 100 120 140 ID, DRAIN CURRENT (A) TJ = 150°C TJ = 125°C TJ = 25°C TJ = −55°C 0.026 0.022 0.018 0.014 0.01 TJ = 150°C TJ = 125°C TJ = 25°C TJ = −55°C 0 20 40 60 80 100 120 140 0.006 0.002 ID, DRAIN CURRENT (A) Figure 3. On−Resistance versus Drain Current and Temperature RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) Figure 4. On−Resistance versus Drain Current and Temperature 1.6 ID = 30 A VGS = 10 V 10000 VGS = 0 V 1.4 IDSS, LEAKAGE (nA) TJ = 150°C 1.2 1000 1.0 0.8 TJ = 125°C 0.6 −50 100 −25 0 25 50 75 100 125 150 0 4 8 12 16 20 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−To−Source Leakage Current versus Voltage http://onsemi.com 3 NTD65N03R VGS = 0 V 2000 C, CAPACITANCE (pF) 1600 1200 800 400 0 0 4 8 12 16 20 DRAIN−TO−SOURCE VOLTAGE (V) Ciss TJ = 25°C VGS, GATE−TO−SOURCE VOLTAGE (V) 2400 8 6 QT 4 Q1 Q2 VGS Coss Crss 2 ID = 30 A TJ = 25°C 0 0 4 8 12 16 Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge 1000 IS, SOURCE CURRENT (AMPS) VDS = 10 V ID = 35 A VGS = 10 V t, TIME (ns) 100 70 VGS = 0 V 60 50 40 30 20 TJ = 150°C 10 0 1 10 RG, GATE RESISTANCE (W) 100 0 0.2 0.4 0.6 TJ = 25°C 0.8 1 tf td(off) tr 10 td(on) 1 VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current 100 I D, DRAIN CURRENT (AMPS) 10 ms 100 ms 10 VGS = 20 V SINGLE PULSE TC = 25°C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 0.1 1 ms 10 ms dc 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 100 Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 NTD65N03R ORDERING INFORMATION Order Number NTD65N03R NTD65N03RG NTD65N03RT4 NTD65N03RT4G NTD65N03R−1 NTD65N03R−1G NTD65N03R−35 NTD65N03R−35G Package DPAK−3 DPAK−3 (Pb−Free) DPAK−3 DPAK−3 (Pb−Free) DPAK−3 Straight Lead DPAK−3 Straight Lead (Pb−Free) DPAK Straight Lead Trimmed (3.5 ± 0.15 mm) DPAK Straight Lead Trimmed (3.5 ± 0.15 mm) (Pb−Free) Shipping † 75 Units / Rail 75 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 75 Units / Rail 75 Units / Rail 75 Units / Rail 75 Units / Rail †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5 NTD65N03R PACKAGE DIMENSIONS DPAK (SINGLE GUAGE) CASE 369AA−01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.025 0.035 0.018 0.024 0.030 0.045 0.386 0.410 0.018 0.023 0.090 BSC 0.180 0.215 0.024 0.040 0.020 −−− 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.63 0.89 0.46 0.61 0.77 1.14 9.80 10.40 0.46 0.58 2.29 BSC 4.57 5.45 0.60 1.01 0.51 −−− 0.89 1.27 3.93 −−− −T− B V R 4 SEATING PLANE C E A S 1 2 3 Z H U F L D 2 PL J DIM A B C D E F H J L R S U V Z 0.13 (0.005) M T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 3.0 0.118 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 SCALE 3:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 NTD65N03R PACKAGE DIMENSIONS DPAK CASE 369D−01 ISSUE B B V R 4 C E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 −−− Z A 3 S −T− SEATING PLANE 1 2 K F D G 3 PL J H 0.13 (0.005) M DIM A B C D E F G H J K R S V Z T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN 3 IPAK, STRAIGHT LEAD CASE 369AC−01 ISSUE O B V R C E NOTES: 1.. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2.. CONTROLLING DIMENSION: INCH. 3. SEATING PLANE IS ON TOP OF DAMBAR POSITION. 4. DIMENSION A DOES NOT INCLUDE DAMBAR POSITION OR MOLD GATE. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.043 0.090 BSC 0.034 0.040 0.018 0.023 0.134 0.142 0.180 0.215 0.035 0.050 0.000 0.010 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.09 2.29 BSC 0.87 1.01 0.46 0.58 3.40 3.60 4.57 5.46 0.89 1.27 0.000 0.25 A SEATING PLANE DIM A B C D E F G H J K R V W W F G K J H D 3 PL 0.13 (0.005) W http://onsemi.com 7 NTD65N03R ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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