NTMFD6H852NL
Power MOSFET
80 V, 25.5 mW, 25 A, Dual N−Channel
Features
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
These Devices are Pb−Free and are RoHS Compliant
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V(BR)DSS
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current RJC
(Notes 1, 2, 3)
TC = 25°C
Power Dissipation
RJC (Notes 1, 2)
Continuous Drain
Current RJA
(Notes 1, 2, 3)
Steady
State
Pulsed Drain Current
Value
Unit
VDSS
80
V
VGS
±20
V
ID
25
A
TC = 100°C
TC = 25°C
PD
Steady
State
ID
Operating Junction and Storage Temperature
Range
Source Current (Body Diode)
A
7
PD
S2
S1
1.6
IDM
98
A
TJ, Tstg
−55 to
+175
°C
IS
32
A
MARKING
DIAGRAM
D1 D1
86
mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Junction−to−Ambient − Steady State (Note 2)
G2
G1
W
3.2
EAS
Parameter
D2
W
38
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, IL(pk) = 1.3 A)
Junction−to−Case − Steady State
Dual N−Channel
D1
5
TA = 100°C
TA = 25°C, tp = 10 s
25 A
31.5 m @ 4.5 V
19
TA = 100°C
TA = 25°C
ID MAX
25.5 m @ 10 V
80 V
18
TC = 100°C
TA = 25°C
Power Dissipation
RJA (Notes 1, 2)
Symbol
RDS(ON) MAX
Symbol
Value
Unit
RJC
3.95
°C/W
RJA
47.3
1
DFN8 5x6
(SO8FL)
CASE 506BT
A
Y
W
ZZ
S1
G1
S2
G2
XXXXXX
AYWZZ
D1
D1
D2
D2
D2 D2
= Assembly Location
= Year
= Work Week
= Lot Traceability
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2019
April, 2019 − Rev. 0
1
Publication Order Number:
NTMFD6H852NL/D
NTMFD6H852NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 A
80
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
47.5
VGS = 0 V,
VDS = 80 V
mV/°C
TJ = 25 °C
10
TJ = 125°C
250
IGSS
VDS = 0 V, VGS = 20 V
VGS(TH)
VGS = VDS, ID = 26 A
100
A
nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
Forward Transconductance
RDS(on)
1.2
2.0
−5.0
VGS = 10 V
ID = 10 A
21
25.5
VGS = 4.5 V
ID = 10 A
25
31.5
gFS
VDS = 5 V, ID = 10 A
V
mV/°C
38
m
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
521
VGS = 0 V, f = 1 MHz, VDS = 40 V
69
pF
4
Total Gate Charge
QG(TOT)
VGS = 10 V, VDS = 40 V; ID = 10 A
Total Gate Charge
QG(TOT)
5
Threshold Gate Charge
QG(TH)
1.1
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
1.7
Plateau Voltage
VGP
3.1
td(ON)
7
VGS = 4.5 V, VDS = 40 V; ID = 10 A
10
nC
1.9
V
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = 4.5 V, VDS = 64 V,
ID = 10 A, RG = 2.5
tf
23
ns
19
16
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
VSD
VGS = 0 V,
IS = 10 A
TJ = 25°C
0.8
TJ = 125°C
0.7
tRR
ta
tb
1.2
V
25
VGS = 0 V, dIS/dt = 100 A/s,
IS = 10 A
QRR
18
ns
7
20
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 s, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NTMFD6H852NL
TYPICAL CHARACTERISTICS
10 to 3.6 V
25
3.4 V
VGS = 3.2 V
VDS = 10 V
15
3.0 V
10
2.8 V
5
2.6 V
0
2.4 V
1
3
2
5
4
7
6
TJ = 25°C
5
8
TJ = 125°C
0.5
0
1.0
1.5
TJ = −55°C
2.0
2.5
3.5
3.0
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
ID = 10 A
TJ = 25°C
28
26
24
22
20
18
3
10
0
30
16
15
RDS(on), DRAIN−TO−SOURCE RESISTANCE (m)
0
20
ID, DRAIN CURRENT (A)
20
4
5
6
7
8
9
10
30
4.0
TJ = 25°C
VGS = 4.5 V
25
VGS = 10 V
20
15
10
12
16
14
18
20
24
22
26
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.5
100
ID = 10 A
VGS = 10 V
TJ = 175°C
10
2.0
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (m)
ID, DRAIN CURRENT (A)
25
1.5
1.0
TJ = 150°C
1
TJ = 125°C
0.1
TJ = 85°C
0.01
TJ = 25°C
0.001
0.5
−50 −25
0
25
50
75
100
125
150
0.0001
175
5
15
25
35
45
55
65
75
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NTMFD6H852NL
C, CAPACITANCE (pF)
1000
VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS
Ciss
100
Coss
10
1
Crss
TJ = 25°C
VGS = 0 V
f = 1 MHz
0
10
20
30
40
50
60
70
80
7
6
5
QGS
4
QGD
3
2
1
0
1
0
2
3
4
6
7
8
9
Figure 8. Gate−to−Source vs. Total Charge
10
IS, SOURCE CURRENT (A)
td(off)
td(on)
10
VGS = 4.5 V
VDS = 64 V
ID = 10 A
1
10
100
10
VGS = 0 V
1
0.1
TJ = 125°C
0.3
0.4
TJ = 25°C
0.5
0.6
TJ = −55°C
0.7
0.8
0.9
1.0
RG, GATE RESISTANCE ()
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
100
TJ(initial) = 25°C
10
IPEAK (A)
10
TC = 25°C
VGS ≤ 10 V
Single Pulse
1
0.1
5
Figure 7. Capacitance Variation
tr
t, TIME (ns)
8
QG, TOTAL GATE CHARGE (nC)
tf
ID, DRAIN CURRENT (A)
VDS = 40 V
ID = 10 A
TJ = 25°C
9
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
100
1
10
RDS(on) Limit
Thermal Limit
Package Limit
0.1
1
10
10 s
0.5 ms
1 ms
10 ms
1
1000
100
0.1
TJ(initial) = 100°C
0.00001
0.0001
0.001
0.01
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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4
NTMFD6H852NL
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
R(t) (°C/W)
10
1
20%
10%
5%
2%
1%
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Device
Marking
Package
Shipping†
NTMFD6H852NLT1G
6H852L
DFN8
(Pb−Free)
1500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NTMFD6H852NL
PACKAGE DIMENSIONS
DFN8 5x6, 1.27P Dual Flag (SO8FL−Dual)
CASE 506BT
ISSUE E
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.30 MM FROM THE TERMINAL TIP.
4. PROFILE TOLERANCE APPLIES TO THE EXPOSED PAD AS WELL
AS THE TERMINALS.
5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED
AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
7. A VISUAL INDICATOR FOR PIN 1 MUST BE LOCATED IN THIS AREA.
0.20 C
D
A
B
D1
8
7
6
ÉÉ
ÉÉ
PIN ONE
IDENTIFIER
NOTE 7
1
2
2X
0.20 C
5
E1 E
4X
h
c
3
A1
4
TOP VIEW
DETAIL B
0.10 C
0.10 C
NOTE 4
SIDE VIEW
C
DETAIL A
4X
4X
b1
8
5
K1
BOTTOM VIEW
2X
0.56
L
4.84
N
G
2X
2.08
K
4
DETAIL B
4X
4.56
0.75
e
M
SOLDERING FOOTPRINT*
SEATING
PLANE
NOTE 6
8X
D2
D3
1
ALTERNATE
CONSTRUCTION
DETAIL A
A
8X
4X
1.40
2.30
DIM
A
A1
b
b1
c
D
D1
D2
D3
E
E1
E2
e
G
h
K
K1
L
M
N
MILLIMETERS
MIN
MAX
MAX
0.90
1.10
−−−
−−−
−−−
0.05
0.33
0.42
0.51
0.33
0.42
0.51
0.20
−−−
0.33
5.15 BSC
4.70
4.90
5.10
3.90
4.10
4.30
1.50
1.70
1.90
6.15 BSC
5.70
5.90
6.10
3.90
4.15
4.40
1.27 BSC
0.45
0.55
0.65
−−−
−−−
12 _
0.51
−−−
−−−
0.56
−−−
−−−
0.48
0.61
0.71
3.25
3.50
3.75
1.80
2.00
2.20
6.59
3.70
E2
0.70
b
0.10
C A B
0.05
C
NOTE 3
4X
1.27
PITCH
5.55
1.00
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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Mouser Electronics
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