NTMFS4926NT3G

NTMFS4926N MOSFET – Power, Single, N-Channel, SO-8 FL 30 V, 44 A Features • • • • • Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses Optimized for 5 V, 12 V Gate Drives These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(ON) MAX ID MAX 7.0 mW @ 10 V 30 V 44 A 11.2 mW @ 4.5 V Applications D (5,6) • CPU Power Delivery • DC−DC Converters MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Symbol Value Unit G (4) Drain−to−Source Voltage VDSS 30 V Gate−to−Source Voltage VGS ±20 V S (1,2,3) ID 15.5 A N−CHANNEL MOSFET TA = 25°C Continuous Drain Current RqJA (Note 1) TA = 100°C 9.8 Power Dissipation RqJA (Note 1) TA = 25°C PD 2.70 W Continuous Drain Current RqJA ≤ 10 s (Note 1) TA = 25°C ID 23.4 A Power Dissipation RqJA ≤ 10 s (Note 1) Continuous Drain Current RqJA (Note 2) TA = 100°C TA = 25°C Steady State TA = 25°C 14.8 PD ID TA = 100°C 6.13 W 9.0 Power Dissipation RqJA (Note 2) TA = 25°C PD 0.92 W Continuous Drain Current RqJC (Note 1) TC = 25°C ID 44 A Power Dissipation RqJC (Note 1) Pulsed Drain Current PD 21.6 W TA = 25°C, tp = 10 ms IDM 182 A IDmax 100 A TJ, TSTG −55 to +150 °C TA = 25°C Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source DV/DT © Semiconductor Components Industries, LLC, 2012 May, 2019 − Rev. 5 SO−8 FLAT LEAD CASE 488AA STYLE 1 S S S G A Y W ZZ D 4926N AYWZZ D D = Assembly Location = Year = Work Week = Lot Traceability 28 TC = 25°C Current Limited by Package D 1 A 5.7 TC =100°C MARKING DIAGRAM IS 21 A dV/dt 6.0 V/ns 1 ORDERING INFORMATION Device Package Shipping† NTMFS4926NT1G SO−8 FL (Pb−Free) 1500 / Tape & Reel NTMFS4926NT3G SO−8 FL (Pb−Free) 5000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: NTMFS4926N/D NTMFS4926N MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Symbol Value Unit Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 24 V, VGS = 20 V, IL = 21 Apk, L = 0.1 mH, RG = 25 W) EAS 22 mJ TL 260 °C Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 2. Surface−mounted on FR4 board using the minimum recommended pad size. THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Junction−to−Case (Drain) RqJC 5.8 Junction−to−Ambient – Steady State (Note 3) RqJA 46.3 Junction−to−Ambient – Steady State (Note 4) RqJA 136.2 Junction−to−Ambient – (t ≤ 10 s) (Note 3) RqJA 20.4 Unit °C/W 3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 4. Surface−mounted on FR4 board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 V Drain−to−Source Breakdown Voltage (transient) V(BR)DSSt VGS = 0 V, ID(aval) = 8.8 A, Tcase =25°C, ttransient = 100 ns 34 V Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ OFF CHARACTERISTICS Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS 25 VGS = 0 V, VDS = 24 V mV/°C TJ = 25°C 1.0 TJ = 125°C 10 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA mA ±100 nA 2.2 V ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain−to−Source On Resistance VGS(TH)/TJ RDS(on) 1.6 3.8 VGS = 10 V VGS = 4.5 V Forward Transconductance 1.32 gFS ID = 30 A 5.6 ID = 15 A 5.6 ID = 30 A 9.0 ID = 15 A 8.7 VDS = 1.5 V, ID = 15 A mV/°C 7.0 11.2 40 mW S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance Capacitance 1004 VGS = 0 V, f = 1 MHz, VDS = 15 V 390 VGS = 0 V, VDS = 15 V, f = 1 MHz 0.119 CRSS CRSS / CISS pF 119 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 0.237 NTMFS4926N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit CHARGES, CAPACITANCES & GATE RESISTANCE Total Gate Charge QG(TOT) Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Total Gate Charge 8.7 VGS = 4.5 V, VDS = 15 V; ID = 30 A 1.4 nC 3.0 3.5 QG(TOT) VGS = 10 V, VDS = 15 V; ID = 30 A 17.3 nC SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) 8.6 tr td(OFF) VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W tf 36.9 ns 14.7 5.5 td(ON) 6.6 tr 31.8 td(OFF) VGS = 10 V, VDS = 15 V, ID = 15 A, RG = 3.0 W tf ns 18.3 4.0 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.87 TJ = 125°C 0.76 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 30 A 1.1 V 21.9 VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A 11.0 ns 10.9 QRR 8.0 nC LS 1.00 nH 0.005 nH 1.84 nH PACKAGE PARASITIC VALUES Source Inductance Drain Inductance LD Gate Inductance LG Gate Resistance RG TA = 25°C 1.0 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 2.2 W NTMFS4926N TYPICAL CHARACTERISTICS 100 10 V 90 4.0 V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 70 3.6 V 60 50 3.2 V 40 30 VGS = 2.8 V 20 0 1 2 3 4 30 20 1 2 3 4 5 0.006 4 5 6 7 8 9 10 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.009 0.008 0.007 0.016 0.015 0.014 0.013 T = 25°C 0.012 0.011 0.010 VGS = 4.5 V 0.009 0.008 0.007 VGS = 10 V 0.006 0.005 0.004 10 20 30 50 40 60 70 80 90 100 VGS (V) ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. VGS Figure 4. On−Resistance vs. Drain Current and Gate Voltage 10,000 1.7 ID = 30 A VGS = 10 V TJ = 150°C IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 50 40 Figure 1. On−Region Characteristics 0.010 1.5 TJ = 125°C VDS = 10 V 60 VGS, GATE−TO−SOURCE VOLTAGE (V) ID = 30 A 1.6 TJ = 25°C VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0.013 0.012 0.011 3 80 70 10 0 5 0.015 0.014 0.005 0.004 0.003 TJ = −55°C 90 80 10 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 100 TJ = 25°C 4.5 V 1.4 1.3 1.2 1.1 1.0 0.9 1,000 TJ = 125°C 100 TJ = 85°C 0.8 0.7 0.6 −50 −25 0 25 50 75 100 125 150 10 VGS = 0 V 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 4 30 NTMFS4926N TYPICAL CHARACTERISTICS C, CAPACITANCE (pF) 1200 VGS, GATE−TO−SOURCE VOLTAGE (V) 1400 TJ = 25°C VGS = 0 V Ciss 1000 800 600 Coss 400 Crss 200 0 0 5 10 15 20 25 30 5 Qgs 4 Qgd TJ = 25°C 3 VGS = 10 V VDD = 15 V ID = 30 A 2 1 0 0 2 4 6 8 10 12 14 18 16 30 IS, SOURCE CURRENT (A) VGS = 0 V td(off) tf tr td(on) 1 10 25 20 15 10 TJ = 25°C TJ = 125°C 5 0 100 0.4 0.5 0.6 0.7 0.8 0.9 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1000 100 10 ms 10 100 ms 1 1 ms 10 ms 0 V < VGS < 10 V Single Pulse TC = 25°C dc RDS(on) Limit Thermal Limit Package Limit 0.01 0.1 1 10 EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ) t, TIME (ns) 6 Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 10 ID, DRAIN CURRENT (A) 8 7 Figure 7. Capacitance Variation 100 0.01 9 Qg, TOTAL GATE CHARGE (nC) VGS = 10 V VDD = 15 V ID = 15 A 0.1 QT VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 1 11 10 100 22 ID = 21 A 20 18 16 14 12 10 8 6 4 2 0 25 50 75 100 125 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 150 NTMFS4926N TYPICAL CHARACTERISTICS 100 D = 0.5 r(t) (°C/W) 10 1 0.2 0.1 0.05 0.02 0.01 0.1 SINGLE PULSE 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 t, TIME (s) Figure 13. Thermal Response http://onsemi.com 6 1 10 100 1000 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DFN5 5x6, 1.27P (SO−8FL) CASE 488AA ISSUE N 1 DATE 25 JUN 2018 SCALE 2:1 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D A 2 B D1 2X 0.20 C 4X E1 2 q E c 1 2 3 A1 4 TOP VIEW C DETAIL A 0.10 C SEATING PLANE A 0.10 C SIDE VIEW MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 −−− 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.00 5.15 5.30 4.70 4.90 5.10 3.80 4.00 4.20 6.00 6.30 6.15 5.70 5.90 6.10 3.45 3.65 3.85 1.27 BSC 0.51 0.575 0.71 1.20 1.35 1.50 0.51 0.575 0.71 0.125 REF 3.00 3.40 3.80 0_ −−− 12 _ DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q GENERIC MARKING DIAGRAM* DETAIL A 1 0.10 b C A B 0.05 c 8X XXXXXX AYWZZ e/2 e L 1 4 K RECOMMENDED SOLDERING FOOTPRINT* E2 PIN 5 (EXPOSED PAD) L1 M 2X 0.495 4.560 2X 1.530 G D2 2X BOTTOM VIEW XXXXXX = Specific Device Code A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. 0.475 3.200 4.530 STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 1.330 STYLE 2: 2X PIN 1. ANODE 0.905 2. ANODE 3. ANODE 4. NO CONNECT 0.965 5. CATHODE 1 4X 1.000 4X 0.750 1.270 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON14036D DFN5 5x6, 1.27P (SO−8FL) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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