NTR4502PT1

NTR4502P, NVTR4502P MOSFET – Power, Single, P-Channel, SOT-23 -30 V, -1.95 A Features • • • • • www.onsemi.com Leading Planar Technology for Low Gate Charge/Fast Switching Low RDS(ON) for Low Conduction Losses SOT−23 Surface Mount for Small Footprint (3 x 3 mm) NV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant V(BR)DSS ID Max (Note 1) RDS(on) TYP 155 mW @ −10 V −30 V −1.95 A 240 mW @ −4.5 V P−Channel MOSFET S Applications • • • • DC to DC Conversion Load/Power Switch for Portables and Computing Motherboard, Notebooks, Camcorders, Digital Camera’s, etc. Battery Charging Circuits G D MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS −30 V Gate−to−Source Voltage VGS ±20 V ID −1.95 A Drain Current (Note 1) t < 10 s TA = 25°C TA = 70°C Power Dissipation (Note 1) t < 10 s Continuous Drain Current (Note 1) Steady State Power Dissipation (Note 1) TA = 25°C PD 1.25 W ID −1.13 A TA = 70°C Steady State Pulsed Drain Current −1.56 PD 0.4 W −6.8 A TJ, TSTG −55 to 150 °C Source Current (Body Diode) IS −1.25 A Lead Temperature for Soldering Purposes (1/8 in from case for 10 s) TL 260 °C Symbol Max Unit Junction−to−Ambient – Steady State (Note 1) RqJA 300 °C/W Junction−to−Ambient – t = 10 s (Note 1) RqJA 100 Operating Junction and Storage Temperature Drain 3 TR2 M G Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Surface−mounted on FR4 board using 1 in sq. pad size (Cu area = 1.127 in sq. [1 oz] including traces). © Semiconductor Components Industries, LLC, 2003 June, 2019 − Rev. 6 1 2 Source 1 Gate = Device Code = Date Code* = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or overbar may vary depending upon manufacturing location. ORDERING INFORMATION Device Package Shipping† NTR4502PT1G SOT−23 (Pb−Free) 3000 / Tape & Reel NVTR4502PT1G SOT−23 (Pb−Free) 3000 / Tape & Reel THERMAL RESISTANCE RATINGS Parameter TR2 M G G SOT−23 CASE 318 STYLE 21 −0.90 IDM tp = 10 ms MARKING DIAGRAM/ PIN ASSIGNMENT †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: NTR4502P/D NTR4502P, NVTR4502P Electrical Characteristics (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min V(BR)DSS VGS = 0 V, ID = −250 mA −30 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS VGS = 0 V, VDS = −30 V V TJ = 25°C −1 TJ = 55°C −10 IGSS VDS = 0 V, VGS = ±20 V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = −250 mA Drain−to−Source On Resistance RDS(on) VGS = −10 V, ID = −1.95 A mA ±100 nA −3.0 V 155 200 mW VGS = −4.5 V, ID = −1.5 A 240 350 gFS VDS = −10 V, ID=−1.25 A 3 S Input Capacitance CISS VGS = 0 V, f = 1 MHz, VDS = −15 V 200 pF Output Capacitance COSS 80 Reverse Transfer Capacitance CRSS 50 ON CHARACTERISTICS (Note 3) Forward Transconductance −1.0 CHARGES AND CAPACITANCES VGS = −10 V, VDS = −15 V; ID = −1.95 A 10 nC 5.2 10 ns 12 20 td(OFF) 19 35 tf 17.5 30 −1.2 Total Gate Charge QG(TOT) 6 Threshold Gate Charge QG(TH) 0.3 Gate−to−Source Charge QGS 1 Gate−to−Drain Charge QGD 1.7 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) tr VGS =−10 V, VDD = −15 V, ID = −1.95 A, RG = 6 W DRAIN−SOURCE DIODE CHARACTERISTICS (Note 3) Forward Diode Voltage VSD VGS = 0 V, IS = −1.25 A −0.8 Reverse Recovery Time tRR VGS = 0 V, dISD/dt = 100 A/ms, IS = −1.25 A 23 V ns Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Surface−mounted on FR4 board using 1 in sq. pad size (Cu area = 1.127 in sq. [1 oz] including traces). 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 NTR4502P, NVTR4502P VGS = −4.0 V VGS = −5.0 V 4 VGS = −3.6 V VGS = −7.0 V 3 VGS = −3.4 V VGS = −10 V VGS = −3.2 V 2 VGS = −3.0 V 1 0 VGS = −2.8 V VGS = −2.6 V VGS = −2.4 V 0 1 2 3 4 5 6 7 8 9 VDS = −10 V 5 TJ = 25°C VGS = −3.8 V −ID, DRAIN CURRENT (A) −ID, DRAIN CURRENT (A) 5 TJ = 25°C TJ = 100°C 3 2 1 0 10 TJ = −55°C 4 1 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0.4 ID = −1.95 A TJ = 25°C 0.3 0.25 0.2 0.15 0.1 3 4 5 6 7 8 9 10 −VGS, GATE−TO−SOURCE VOLTAGE (V) 5 6 7 TJ = 25°C VGS = −4.5 V 0.25 0.2 VGS = −10 V 0.15 0.1 1 1.5 2 2.5 3 3.5 4 4.5 5 −ID, DRAIN CURRENT (A) Figure 4. On−Resistance versus Drain Current and Gate Voltage 1000 1.8 ID = −1.9 A VGS = −10 V 1.6 VGS = 0 V −IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 4 0.3 Figure 3. On−Resistance versus Gate−to−Source Voltage 1.4 1.2 1 0.8 0.6 −50 3 Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 1. On−Region Characteristics 0.35 2 −VGS, GATE−TO−SOURCE VOLTAGE (V) TJ = 150°C 100 10 TJ = 100°C 1 −25 0 25 50 75 100 125 150 2 TJ, JUNCTION TEMPERATURE (°C) 6 10 14 18 22 26 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage www.onsemi.com 3 30 NTR4502P, NVTR4502P 500 C, CAPACITANCE (pF) VDS = 0 V 400 CISS 300 CRSS TJ = 25°C VGS = 0 V CISS 200 COSS 100 CRSS 0 10 5 0 5 10 15 20 25 30 −VGS −VDS GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V) −VGS, GATE−TO−SOURCE VOLTAGE (V) 12 18 QT 10 15 8 12 9 6 QGS QGD 4 6 2 3 ID = −1.95 A TJ = 25°C 0 0 0 1 2 3 4 5 6 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 7. Capacitance Variation 7 QG, TOTAL GATE CHARGE (nC) Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge 100 3 VDS = −15 V ID = −1.95 V VGS = −10 V tf td(off) t, TIME (ns) −IS, SOURCE CURRENT TJ = 25°C tr 10 td(on) 1 2.5 2 1.5 1 0.5 0 1 10 100 0.3 0.6 0.9 RG, GATE RESISTANCE (W) −VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current www.onsemi.com 4 1.2 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−23 (TO−236) CASE 318−08 ISSUE AS DATE 30 JAN 2018 SCALE 4:1 D 0.25 3 E 1 2 T HE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF THE BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. DIM A A1 b c D E e L L1 HE T L 3X b L1 VIEW C e TOP VIEW A A1 SIDE VIEW SEE VIEW C c MIN 0.89 0.01 0.37 0.08 2.80 1.20 1.78 0.30 0.35 2.10 0° MILLIMETERS NOM MAX 1.00 1.11 0.06 0.10 0.44 0.50 0.14 0.20 2.90 3.04 1.30 1.40 1.90 2.04 0.43 0.55 0.54 0.69 2.40 2.64 −−− 10 ° MIN 0.035 0.000 0.015 0.003 0.110 0.047 0.070 0.012 0.014 0.083 0° INCHES NOM 0.039 0.002 0.017 0.006 0.114 0.051 0.075 0.017 0.021 0.094 −−− MAX 0.044 0.004 0.020 0.008 0.120 0.055 0.080 0.022 0.027 0.104 10° GENERIC MARKING DIAGRAM* END VIEW RECOMMENDED SOLDERING FOOTPRINT XXXMG G 1 3X 2.90 3X XXX = Specific Device Code M = Date Code G = Pb−Free Package 0.90 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. 0.95 PITCH 0.80 DIMENSIONS: MILLIMETERS STYLE 1 THRU 5: CANCELLED STYLE 6: PIN 1. BASE 2. EMITTER 3. COLLECTOR STYLE 7: PIN 1. EMITTER 2. BASE 3. COLLECTOR STYLE 9: PIN 1. ANODE 2. ANODE 3. CATHODE STYLE 10: PIN 1. DRAIN 2. SOURCE 3. GATE STYLE 11: STYLE 12: PIN 1. ANODE PIN 1. CATHODE 2. CATHODE 2. CATHODE 3. CATHODE−ANODE 3. ANODE STYLE 15: PIN 1. GATE 2. CATHODE 3. ANODE STYLE 16: PIN 1. ANODE 2. CATHODE 3. CATHODE STYLE 17: PIN 1. NO CONNECTION 2. ANODE 3. CATHODE STYLE 18: STYLE 19: STYLE 20: PIN 1. NO CONNECTION PIN 1. CATHODE PIN 1. CATHODE 2. CATHODE 2. ANODE 2. ANODE 3. GATE 3. ANODE 3. CATHODE−ANODE STYLE 21: PIN 1. GATE 2. SOURCE 3. DRAIN STYLE 22: PIN 1. RETURN 2. OUTPUT 3. INPUT STYLE 23: PIN 1. ANODE 2. ANODE 3. CATHODE STYLE 24: PIN 1. GATE 2. DRAIN 3. SOURCE STYLE 27: PIN 1. CATHODE 2. CATHODE 3. CATHODE STYLE 28: PIN 1. ANODE 2. ANODE 3. ANODE DOCUMENT NUMBER: DESCRIPTION: 98ASB42226B SOT−23 (TO−236) STYLE 8: PIN 1. ANODE 2. NO CONNECTION 3. CATHODE STYLE 13: PIN 1. SOURCE 2. DRAIN 3. GATE STYLE 25: PIN 1. ANODE 2. CATHODE 3. GATE STYLE 14: PIN 1. CATHODE 2. GATE 3. ANODE STYLE 26: PIN 1. CATHODE 2. ANODE 3. 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