NVB5860NLT4G

NTB5860NL, NTP5860NL, NVB5860NL N-Channel Power MOSFET 60 V, 220 A, 3.0 mW Features • • • • • http://onsemi.com Low RDS(on) High Current Capability 100% Avalanche Tested These Devices are Pb−Free, Halogen Free and are RoHS Compliant NVB Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable RDS(on) MAX V(BR)DSS ID MAX 3.0 mW @ 10 V 60 V 220 A 3.6 mW @ 4.5 V D MAXIMUM RATINGS (TJ = 25°C Unless otherwise specified) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 60 V Gate−to−Source Voltage − Continuous VGS $20 V ID 220 A Continuous Drain Current, RqJC Steady State Power Dissipation, RqJC Steady State TA = 25°C TA = 100°C 4 283 W IDM 660 A Current Limited by Package IDMmax 130 A Operating and Storage Temperature Range TJ, Tstg −55 to +175 °C IS 130 A Single Pulse Drain−to−Source Avalanche Energy (L = 0.3 mH) EAS 735 mJ Lead Temperature for Soldering Purposes (1/8″ from Case for 10 Seconds) TL 260 °C Symbol Max Unit Junction−to−Case (Drain) Steady State RqJC 0.53 °C/W Junction−to−Ambient − Steady State (Note 1) RqJA 28 tp = 10 ms Source Current (Body Diode) S N−CHANNEL MOSFET 156 PD Pulsed Drain Current TA = 25°C G 4 1 3 1 2 D2PAK CASE 418B STYLE 2 TO−220AB CASE 221A STYLE 5 3 MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain 4 Drain THERMAL RESISTANCE RATINGS Parameter Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface mounted on FR4 board using 1 sq in pad size, (Cu Area 1.127 sq in [2 oz] including traces). 2 NTB 5860NLG AYWW NTP 5860NLG AYWW 1 Gate 3 Source 1 Gate 2 Drain 3 Source 2 Drain G A Y WW = Pb−Free Device = Assembly Location = Year = Work Week ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2012 Augsut, 2012 − Rev. 1 1 Publication Order Number: NTB5860NL/D NTB5860NL, NTP5860NL, NVB5860NL ELECTRICAL CHARACTERISTICS (TJ = 25°C Unless otherwise specified) Characteristics Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VDS = 0 V, ID = 250 mA 60 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current Gate−Source Leakage Current IDSS V 6.1 ID = 250 mA mV/°C VGS = 0 V VDS = 60 V TJ = 25°C 1.0 VGS = 0 V VDS = 60 V TJ = 125°C 100 IGSS VDS = 0 V, VGS = $20 V VGS(th) VGS = VDS, ID = 250 mA mA $100 nA 3.0 V ON CHARACTERISTICS (Note 2) Gate Threshold Voltage Threshold Temperature Coefficient Drain−to−Source On−Resistance VGS(th)/TJ −7.7 RDS(on) Forward Transconductance 1.0 gFS mV/°C VGS = 10 V, ID = 20 A 2.4 3.0 mW VGS = 4.5 V, ID = 20 A 2.8 3.6 VDS = 15 V, ID = 30 A 47 S 13216 pF CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance Ciss VDS = 25 V, VGS = 0 V, f = 1 MHz Output Capacitance Coss Transfer Capacitance Crss 752 Total Gate Charge QG(TOT) 220 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD VGS = 10 V, VDS = 48 V, ID = 40 A 1127 nC 13 37 54 SWITCHING CHARACTERISTICS, VGS = 10 V (Note 3) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) ns 25 VGS = 10 V, VDD = 48 V, ID = 100 A, RG = 2.5 W tf 58 98 144 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD Reverse Recovery Time trr Charge Time ta Discharge Time tb Reverse Recovery Stored Charge VGS = 0 V IS = 40 A TJ = 25°C 0.76 TJ = 125°C 0.60 50 VGS = 0 V, IS = 100 A, dIS/dt = 20 A/ms QRR http://onsemi.com 2 Vdc ns 25 25 71 2. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 3. Switching characteristics are independent of operating junction temperatures. 1.1 nC NTB5860NL, NTP5860NL, NVB5860NL TYPICAL CHARACTERISTICS VGS = 10 V 240 VGS = 4 V 4.4 V 280 TJ = 25°C ID, DRAIN CURRENT (A) 3.8 V 200 3.6 V 160 120 3.4 V 80 3.2 V 200 160 120 40 0 0 1 2 3 4 5 TJ = 25°C 80 40 0 VDS ≥ 10 V 240 TJ = 125°C 2 3 5 Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 0.0035 ID = 20 A TJ = 25°C 0.006 TJ = 25°C VGS = 4.5 V 0.0030 0.004 VGS = 10 V 0.0025 0.002 0.000 4 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.008 2 4 6 8 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.0020 10 30 50 90 70 110 130 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate Voltage Figure 4. On−Resistance vs. Drain Current 100000 2.0 VGS = 0 V ID = 20 A 1.8 V = 10 V GS 1.6 TJ = 150°C IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) TJ = −55°C VDS, DRAIN−TO−SOURCE VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (A) 280 1.4 10000 1.2 1.0 TJ = 125°C 0.8 0.6 −50 −25 0 25 50 75 100 125 150 175 1000 10 20 30 40 50 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 60 NTB5860NL, NTP5860NL, NVB5860NL 16000 C, CAPACITANCE (pF) VGS = 0 V TJ = 25°C Ciss 14000 VGS, GATE−TO−SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS 12000 10000 8000 6000 4000 Coss 2000 0 0 Crss 10 20 30 40 QT 8 6 Qgs 4 Qgd 2 0 VDS = 48 V ID = 40 A TJ = 25°C 0 50 100 150 200 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source vs. Total Charge 1000 250 180 VDD = 48 V ID = 40 A VGS = 10 V IS, SOURCE CURRENT (A) tf td(off) 100 VGS = 0 V TJ = 25°C 160 tr td(on) 140 120 100 80 60 40 20 10 1 10 100 0 0.60 0.70 0.80 0.90 1.00 1.10 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1000 ID, DRAIN CURRENT (A) t, TIME (ns) 10 1 ms 10 ms dc 100 ms 10 ms 100 10 1 0.1 VGS = 10 V SINGLE PULSE TC = 25°C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 100 NTB5860NL, NTP5860NL, NVB5860NL TYPICAL CHARACTERISTICS RqJC(t) (°C/W) EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 Duty Cycle = 0.5 0.1 0.2 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE 0.001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 t, PULSE TIME (s) Figure 12. Thermal Response ORDERING INFORMATION Package Shipping† NTP5860NLG TO−220AB (Pb−Free) 50 Units / Rail NTB5860NLT4G D2PAK (Pb−Free) 800 / Tape & Reel NVB5860NLT4G* D2PAK (Pb−Free) 800 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NVB Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable. http://onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−220 CASE 221A−09 ISSUE AJ DATE 05 NOV 2019 SCALE 1:1 STYLE 1: PIN 1. 2. 3. 4. BASE COLLECTOR EMITTER COLLECTOR STYLE 2: PIN 1. 2. 3. 4. BASE EMITTER COLLECTOR EMITTER STYLE 3: PIN 1. 2. 3. 4. CATHODE ANODE GATE ANODE STYLE 4: PIN 1. 2. 3. 4. MAIN TERMINAL 1 MAIN TERMINAL 2 GATE MAIN TERMINAL 2 STYLE 5: PIN 1. 2. 3. 4. GATE DRAIN SOURCE DRAIN STYLE 6: PIN 1. 2. 3. 4. ANODE CATHODE ANODE CATHODE STYLE 7: PIN 1. 2. 3. 4. CATHODE ANODE CATHODE ANODE STYLE 8: PIN 1. 2. 3. 4. CATHODE ANODE EXTERNAL TRIP/DELAY ANODE STYLE 9: PIN 1. 2. 3. 4. GATE COLLECTOR EMITTER COLLECTOR STYLE 10: PIN 1. 2. 3. 4. GATE SOURCE DRAIN SOURCE STYLE 11: PIN 1. 2. 3. 4. DRAIN SOURCE GATE SOURCE STYLE 12: PIN 1. 2. 3. 4. MAIN TERMINAL 1 MAIN TERMINAL 2 GATE NOT CONNECTED DOCUMENT NUMBER: DESCRIPTION: 98ASB42148B TO−220 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS D2PAK 3 CASE 418B−04 ISSUE L DATE 17 FEB 2015 SCALE 1:1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 418B−01 THRU 418B−03 OBSOLETE, NEW STANDARD 418B−04. C E −B− V W 4 1 2 A S 3 −T− SEATING PLANE K W J G D DIM A B C D E F G H J K L M N P R S V H 3 PL 0.13 (0.005) M T B M VARIABLE CONFIGURATION ZONE N R P L M STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR L M F F F VIEW W−W 1 VIEW W−W 2 VIEW W−W 3 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN MILLIMETERS MIN MAX 8.64 9.65 9.65 10.29 4.06 4.83 0.51 0.89 1.14 1.40 7.87 8.89 2.54 BSC 2.03 2.79 0.46 0.64 2.29 2.79 1.32 1.83 7.11 8.13 5.00 REF 2.00 REF 0.99 REF 14.60 15.88 1.14 1.40 U L M INCHES MIN MAX 0.340 0.380 0.380 0.405 0.160 0.190 0.020 0.035 0.045 0.055 0.310 0.350 0.100 BSC 0.080 0.110 0.018 0.025 0.090 0.110 0.052 0.072 0.280 0.320 0.197 REF 0.079 REF 0.039 REF 0.575 0.625 0.045 0.055 STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE 4. CATHODE STYLE 4: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 5: STYLE 6: PIN 1. CATHODE PIN 1. NO CONNECT 2. ANODE 2. CATHODE 3. CATHODE 3. ANODE 4. ANODE 4. CATHODE MARKING INFORMATION AND FOOTPRINT ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42761B D2PAK 3 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com D2PAK 3 CASE 418B−04 ISSUE L DATE 17 FEB 2015 GENERIC MARKING DIAGRAM* xx xxxxxxxxx AWLYWWG xxxxxxxxG AYWW AYWW xxxxxxxxG AKA IC Standard Rectifier xx A WL Y WW G AKA = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package = Polarity Indicator *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. SOLDERING FOOTPRINT* 10.49 8.38 16.155 2X 3.504 2X 1.016 5.080 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98ASB42761B D2PAK 3 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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