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NVD6495NLT4G

NVD6495NLT4G

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    TO252-3

  • 描述:

    N-CHANNEL, MOSFET

  • 数据手册
  • 价格&库存
NVD6495NLT4G 数据手册
NVD6495NL N-Channel Power MOSFET 100 V, 25 A, 50 mW, Logic Level Features Low RDS(on) 100% Avalanche Tested AEC−Q101 Qualified These Devices are Pb−Free and are RoHS Compliant http://onsemi.com V(BR)DSS Symbol Value Unit VDSS 100 V Gate−to−Source Voltage − Continuous VGS $20 V ID 25 A Steady State Power Dissipation Steady State Pulsed Drain Current TC = 25°C TC = 100°C TC = 25°C tp = 10 ms Operating and Storage Temperature Range Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (VDD = 50 Vdc, VGS = 10 Vdc, IL(pk) = 23 A, L = 0.3 mH, RG = 25 W) Lead Temperature for Soldering Purposes, 1/8″ from Case for 10 Seconds 18 D G PD 83 W IDM 80 A TJ, Tstg −55 to +175 °C IS 25 A EAS 79 mJ 3 °C DPAK CASE 369AA STYLE 2 S TL 260 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE RATINGS Parameter 25 A 50 mW @ 10 V Drain−to−Source Voltage Continuous Drain Current ID MAX 54 mW @ 4.5 V 100 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter RDS(on) MAX Symbol Max Unit Junction−to−Case (Drain) − Steady State RqJC 1.8 °C/W Junction−to−Ambient − Steady State (Note 1) RqJA 39 1. Surface mounted on FR4 board using 1 sq in pad size, (Cu Area 1.127 sq in [2 oz] including traces). 4 1 2 MARKING DIAGRAM & PIN ASSIGNMENT 4 Drain YWW 64 95NLG • • • • 1 Gate 6495NL Y WW G 2 Drain 3 Source = Device Code = Year = Work Week = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2014 September, 2014 − Rev. 2 1 Publication Order Number: NVD6495NL/D NVD6495NL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA VGS = 0 V, ID = 250 mA, TJ = −40°C 100 92 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Parameter Typ Max Unit OFF CHARACTERISTICS V 115 Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = "20 V VGS(TH) VGS = VDS, ID = 250 mA VGS = 0 V, VDS = 100 V TJ = 25°C mV/°C 1.0 TJ = 125°C mA 100 "100 nA 2.0 V ON CHARACTERISTICS (Note 2) Gate Threshold Voltage 1.0 Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On−Resistance RDS(on) VGS = 4.5 V, ID = 10 A 44 54 VGS = 10 V, ID = 10 A 43 50 gFS VDS = 5.0 V, ID = 10 A 24 S 1024 pF Forward Transconductance 4.8 mV/°C mW CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 70 Total Gate Charge QG(TOT) 20 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge Total Gate Charge VGS = 0 V, f = 1.0 MHz, VDS = 25 V nC 1.1 VGS = 4.5 V, VDS = 80 V, ID = 23 A QGD QG(TOT) 156 3.1 14 VGS = 10 V, VDS = 80 V, ID = 23 A 35 nC 11 ns SWITCHING CHARACTERISTICS (Note 3) Turn−On Delay Time Rise Time td(on) tr Turn−Off Delay Time Fall Time td(off) VGS = 4.5 V, VDD = 80 V, ID = 23 A, RG = 6.1 W tf 91 40 71 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 23 A TJ = 25°C 0.87 TJ = 125°C 0.74 Reverse Recovery Time tRR 64 Charge Time Ta 40 Discharge Time Tb Reverse Recovery Charge VGS = 0 V, dIS/dt = 100 A/ms, IS = 23 A QRR 1.2 V ns 24 152 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 3. Switching characteristics are independent of operating junction temperatures. ORDERING INFORMATION Device NVD6495NLT4G Package Shipping† DPAK (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. http://onsemi.com 2 NVD6495NL 45 45 4V 5V 35 30 3.4 V 25 3.2 V 20 15 3.0 V 10 2.8 V 35 30 25 20 10 5 0 0 1 2 3 4 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ = 25°C 15 5 0 VDS w 10 V 40 3.6 V ID, DRAIN CURRENT (A) 40 ID, DRAIN CURRENT (A) TJ = 25°C VGS = 10 V 5 TJ = 125°C TJ = −55°C 1 2 3 VGS, GATE−TO−SOURCE VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.050 0.050 ID = 23 A TJ = 25°C 0.048 TJ = 25°C 0.048 0.046 0.046 0.044 VGS = 4.5 V 0.044 0.042 VGS = 10 V 0.042 0.040 2 3 4 5 6 7 8 9 10 0.040 5 15 20 25 VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 4. On−Resistance versus Drain Current and Gate Voltage 3.0 2.5 10 Figure 3. On−Region versus Gate Voltage 10000 VGS = 0 V ID = 23 A VGS = 4.5 V IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 1. On−Region Characteristics 4 2.0 1.5 TJ = 150°C 1000 TJ = 125°C 1.0 0.5 −50 100 −25 0 25 50 75 100 125 150 175 10 20 30 40 50 60 70 80 90 100 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 3 NVD6495NL VGS, GATE−TO−SOURCE VOLTAGE (V) C, CAPACITANCE (pF) 2500 TJ = 25°C VGS = 0 V 2000 1500 Ciss 1000 500 Crss Coss 0 0 10 20 30 40 50 60 70 80 90 QT 8 6 Qds 4 Qgs VDS = 80 V ID = 23 A TJ = 25°C 2 0 100 0 5 10 15 20 25 30 35 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage and Drain−to−Source Voltage versus Total Charge 1000 25 IS, SOURCE CURRENT (A) VDS = 80 V ID = 23 A VGS = 4.5 V t, TIME (ns) 10 tr 100 tf 10 td(off) td(on) 100 10 20 15 10 5 0 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1 1 TJ = 25°C VGS = 0 V 100 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current 125 AVALANCHE ENERGY (mJ) ID, DRAIN CURRENT (A) ID = 23 A 10 ms 10 100 ms VGS = 10 V SINGLE PULSE TC = 25°C 1 1 ms 10 ms dc RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 10 100 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 Figure 11. Maximum Rated Forward Biased Safe Operating Area 100 75 50 25 0 25 50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE 175 Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature http://onsemi.com 4 RqJC(t) (°C/W) EFFECTIVE TRANSIENT THERMAL RESISTANCE NVD6495NL 10 1 Duty Cycle = 0.5 0.2 0.1 0.05 0.1 0.02 0.01 0.01 SINGLE PULSE 0.001 0.000001 0.00001 0.0001 0.001 0.01 t, PULSE TIME (s) Figure 13. Thermal Response http://onsemi.com 5 0.1 1 10 NVD6495NL PACKAGE DIMENSIONS DPAK (SINGLE GUAGE) CASE 369AA−01 ISSUE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C A A E b3 c2 B 4 L3 Z D 1 2 H DETAIL A 3 L4 b2 e c b 0.005 (0.13) M C H L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 905 CW 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z 6.17 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NVD6495NL/D
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