NVD6820NLT4G

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Other names and brands may be claimed as the property of others. NVD6820NL MOSFET – Power, Single N-Channel 90 V, 17 mW, 50 A Features • • • • • Low RDS(on) to Minimize Conduction Losses High Current Capability Avalanche Energy Specified AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant www.onsemi.com RDS(on) V(BR)DSS 16.7 mW @ 10 V 90 V Symbol Value Unit Drain−to−Source Voltage VDSS 90 V Gate−to−Source Voltage VGS "20 V ID 50 A D Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1, 2 & 3) Power Dissipation RqJA (Notes 1 & 2) Pulsed Drain Current TC = 25°C Steady State TC = 100°C TC = 25°C Steady State PD ID Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VGS = 10 V, IL(pk) = 31 A, L = 0.3 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) W 100 1 2 PD W 4.0 MARKING DIAGRAMS & PIN ASSIGNMENT 2.0 IDM 310 A TJ, Tstg −55 to 175 °C IS 50 A EAS 144 mJ TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS Parameter 3 DPAK CASE 369C STYLE 2 A 10 7.0 TA = 100°C TA = 25°C, tp = 10 ms 4 50 TA = 100°C TA = 25°C S 35 TC = 100°C TA = 25°C N−Channel G Symbol Value Unit Junction−to−Case − Steady State (Drain) RqJC 1.5 °C/W Junction−to−Ambient − Steady State (Note 2) RqJA 38 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Continuous DC current rating. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 4 Drain AYWW 68 20LG Continuous Drain Current RqJC (Notes 1 & 3) 50 A 20.4 mW @ 4.5 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter ID 2 1 Drain 3 Gate Source A = Assembly Location* Y = Year WW = Work Week 6820L = Device Code G = Pb−Free Package * The Assembly Location Code (A) is front side optional. In cases where the Assembly Location is stamped in the package bottom (molding ejecter pin), the front side assembly code may be blank. ORDERING INFORMATION Device Package Shipping† NVD6820NLT4G DPAK (Pb−Free) 2500/Tape & Reel DPAK NVD6820NLT4G− (Pb−Free) VF01 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2013 June, 2019 − Rev. 2 1 Publication Order Number: NVD6820NL/D NVD6820NL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 90 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Parameter Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current 87 IDSS Gate−to−Source Leakage Current V VGS = 0 V, VDS = 90 V mV/°C TJ = 25°C 1.0 TJ = 125°C 100 IGSS VDS = 0 V, VGS = "20 V VGS(TH) VGS = VDS, ID = 250 mA mA "100 nA 2.5 V ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance 1.5 −6.7 RDS(on) mV/°C VGS = 10 V, ID = 20 A 11.6 16.7 VGS = 4.5 V, ID = 20 A 12.9 20.4 mW CHARGES, CAPACITANCES AND GATE RESISTANCES Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Threshold Gate Charge QG(TOT) 253 VGS = 4.5 V, VDS = 72 V, ID = 20 A 44 VGS = 10 V, VDS = 72 V, ID = 20 A 83 QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD pF 4209 VGS = 0 V, f = 1.0 MHz, VDS = 25 V 187 nC 4.3 VGS = 10 V, VDS = 72 V, ID = 20 A 12.5 22 SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) ns 19 VGS = 10 V, VDD = 72 V, ID = 20 A, RG = 2.5 W tf 98 36 59 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.84 TJ = 125°C 0.72 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 20 A 39 VGS = 0 V, dIs/dt = 100 A/ms, IS = 20 A QRR www.onsemi.com 2 V ns 27 12 55 4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 5. Switching characteristics are independent of operating junction temperatures. 1.2 nC NVD6820NL TYPICAL CHARACTERISTICS 100 4.5 V VDS ≥ 10 V 3.8 V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 TJ = 25°C 80 3.6 V 60 3.4 V 40 3.2 V 20 3.0 V 2.8 V 0 1 2 3 4 5 TJ = 25°C 20 TJ = 125°C TJ = −55°C 2.0 2.5 3.0 3.5 4.0 Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics ID = 20 A TJ = 25°C 0.016 0.015 0.014 0.013 0.012 0.011 2 4 6 8 10 0.016 TJ = 25°C 0.015 0.014 VGS = 4.5 V 0.013 0.012 VGS = 10 V 0.011 0.010 10 20 30 50 40 60 70 80 VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 100 k ID = 20 A VGS = 10 V 2.2 IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (Normalized) 40 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.017 2.8 60 VDS, DRAIN−TO−SOURCE (V) 0.018 0.010 80 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) VGS = 10 V 1.6 1.0 0.4 −50 −25 0 25 50 75 100 125 150 175 VGS = 0 V TJ = 150°C 10 k TJ = 125°C 1k 10 20 30 40 50 60 70 80 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 90 NVD6820NL TYPICAL CHARACTERISTICS Ciss 4000 3000 2000 1000 Coss 0 Crss 0 10 1000 20 30 50 40 60 70 80 90 8 6 Qgs 4 Qgd VDS = 72 V ID = 20 A TJ = 25°C 2 0 0 10 20 30 40 50 60 70 80 Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage vs. Total Charge 80 tr tf td(off) td(on) 10 QT QG, TOTAL GATE CHARGE (nC) VDS = 72 V ID = 20 A VGS = 10 V 100 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) IS, SOURCE CURRENT (A) t, TIME (ns) VGS = 0 V TJ = 25°C 1 10 VGS = 0 V TJ = 25°C 60 40 20 0 0.50 100 90 0.60 0.70 0.80 0.90 1.00 1.10 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 100 100 ms ID, DRAIN CURRENT (A) C, CAPACITANCE (pF) 5000 VGS, GATE−TO−SOURCE VOLTAGE (V) 6000 10 ms 1 ms 10 10 ms VGS = 10 V 1 Single Pulse TC = 25°C RDS(on) Limit Thermal Limit Package Limit 0.1 0.1 dc 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 11. Maximum Rated Forward Biased Safe Operating Area www.onsemi.com 4 100 NVD6820NL TYPICAL CHARACTERISTICS RqJC, R(t) (°C/W) 10 1 Duty Cycle = 0.5 0.1 0.20 0.10 0.05 0.02 0.01 0.01 0.000001 Single Pulse 0.00001 0.0001 0.001 0.01 PULSE TIME (sec) Figure 12. Thermal Response www.onsemi.com 5 0.1 1 10 NVD6820NL PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE F A E b3 B c2 Z D 1 L4 C A 4 L3 2 NOTE 7 c SIDE VIEW b TOP VIEW H DETAIL A 3 b2 e 0.005 (0.13) M GAUGE PLANE C Z C L L1 DETAIL A DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z BOTTOM VIEW H L2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. 7. OPTIONAL MOLD FEATURE. Z SEATING PLANE BOTTOM VIEW A1 ALTERNATE CONSTRUCTIONS ROTATED 905 CW 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.72 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.90 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.028 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.114 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− 6.17 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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