NVMFD5C478NLWFT1G

NVMFD5C478NL Power MOSFET 40 V, 14.5 mW, 29 A, Dual N−Channel Features • • • • • • Small Footprint (5 x 6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses NVMFD5C478NLWF − Wettable Flanks Product AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant www.onsemi.com V(BR)DSS 40 V Symbol Value Unit Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS ±20 V ID 29 A Continuous Drain Current RqJC (Notes 1, 2, 3, 4) TC = 25°C Power Dissipation RqJC (Notes 1, 2, 3) Continuous Drain Current RqJA (Notes 1 & 3, 4) Steady State TC = 100°C TC = 25°C Power Dissipation RqJA (Notes 1, 3) Pulsed Drain Current Steady State PD ID S1 7.5 PD 1.5 IDM D1 D1 98 A °C IS 19 A Single Pulse Drain−to−Source Avalanche Energy (IL(pk) = 1.4 A) EAS 48 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS (Note 1) Parameter Junction−to−Case − Steady State (Note 3) Junction−to−Ambient − Steady State (Note 3) S2 MARKING AND PIN CONNECTION DIAGRAM W 3.1 −55 to +175 Source Current (Body Diode) G2 A 10.5 TJ, Tstg Operating Junction and Storage Temperature D2 G1 12 TA = 100°C TA = 25°C, tp = 10 ms Dual−Channel D1 W 23 TA = 100°C TA = 25°C 29 A 25 mW @ 4.5 V 20.6 TC = 100°C TA = 25°C ID MAX 14.5 mW @ 10 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter RDS(on) MAX Symbol Value Unit RqJC 6.4 °C/W RqJA 48.8 1 DFN8, 5x6 (S08FL) CASE 506BT S1 G1 S2 G2 XXXXXX AYWZZ D1 D1 D2 D2 D2 D2 XXXXXX = 5C478L (NVMFD5C478NL) or 478LWF (NVMFD5C478NLWF) A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering, marking and shipping information on page 5 of this data sheet. 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Psi (Y) is used as required per JESD51−12 for packages in which substantially less than 100% of the heat flows to single case surface. 3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 4. Continuous DC current rating. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2017 June, 2018 − Rev. 1 1 Publication Order Number: NVMFD5C478NL/D NVMFD5C478NL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min V(BR)DSS VGS = 0 V, ID = 250 mA 40 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current VGS = 0 V, VDS = 40 V V TJ = 25°C 10 TJ = 125°C 250 100 mA IGSS VDS = 0 V, VGS = 20 V nA Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 20 mA 2.2 V Drain−to−Source On Resistance RDS(on) VGS = 10 V, ID = 7.5 A 12.1 14.5 mW VGS = 4.5 V, ID = 7.5 A 20 25 VDS = 15 V, ID = 15 A 25 S 420 pF ON CHARACTERISTICS (Note 5) Forward Transconductance gFS 1.2 CHARGES AND CAPACITANCES Ciss Input Capacitance VGS = 0 V, f = 1.0 MHz, VDS = 25 V Output Capacitance Coss Reverse Transfer Capacitance Crss 9 Total Gate Charge QG(TOT) 8.1 nC Threshold Gate Charge QG(TH) 1.0 nC Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Total Gate Charge QG(TOT) VGS = 10 V, VDS = 32 V, ID = 7.5 A 185 1.7 1.2 VGS = 4.5 V, VDS = 32 V, ID = 7.5 A 3.9 nC 6 ns SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) VGS = 10 V, VDS = 32 V, ID = 7.5 A, RG = 1 W tf 14 18 3.5 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.84 TJ = 125°C 0.72 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 7.5 A 17 VGS = 0 V, dlS/dt = 100 A/ms, IS = 7.5 A QRR www.onsemi.com 2 V ns 7.0 10 6 5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 6. Switching characteristics are independent of operating junction temperatures. 1.2 nC NVMFD5C478NL TYPICAL CHARACTERISTICS 40 40 6.0 V to 10 V 4.5 V 30 25 4.0 V 20 3.8 V 15 3.6 V 10 VDS = 10 V 35 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 35 3.4 V 30 25 20 15 TJ = 25°C 10 5 5 0 0 TJ = 125°C 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 4 5 6 Figure 2. Transfer Characteristics 45 40 35 30 25 20 15 10 5 0 4 5 6 7 8 9 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 30 TJ = 25°C 25 VGS = 4.5 V 20 15 VGS = 10 V 10 5 0 5 10 15 20 25 30 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 10K 1.9 VGS = 10 V ID = 7.5 A TJ = 150°C IDSS, LEAKAGE (nA) RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE 3 Figure 1. On−Region Characteristics TJ = 25°C ID = 5 A 1.7 2 VGS, GATE−TO−SOURCE VOLTAGE (V) 50 3 1 VDS, DRAIN−TO−SOURCE VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) 0 TJ = −55°C 1.5 1.3 1.1 1K TJ = 125°C 100 TJ = 85°C 0.9 0.7 −50 10 −25 0 25 50 75 100 125 150 175 5 10 15 20 25 30 35 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 40 NVMFD5C478NL TYPICAL CHARACTERISTICS VGS, GATE−TO−SOURCE VOLTAGE (V) 1000 C, CAPACITANCE (pF) CISS COSS 100 10 CRSS VGS = 0 V TJ = 25°C f = 1 MHz 1 0 5 10 15 20 25 30 35 10 9 8 7 6 5 QGS 4 QGD 3 VDS = 32 V ID = 7.5 A TJ = 25°C 2 1 0 40 0 1 2 3 4 6 5 7 8 VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage vs. Total Charge 100 9 8.2 IS, SOURCE CURRENT (A) VGS = 0 V t, TIME (ns) td(off) tr 10 td(on) tf VGS = 10 V VDS = 32 V 1 1 4.2 TJ = 125°C TJ = 25°C TJ = −55°C 2.2 0.2 10 0.5 0.6 0.7 0.8 0.9 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 100 1000 TC = 25°C VGS ≤ 10 V Single Pulse 100 10 ms TJ (initial) = 25°C 10 IPEAK, (A) ID, DRAIN CURRENT (A) 6.2 10 1 RDS(on) Limit Thermal Limit Package Limit 0.1 0.1 0.1 1 10 TJ (initial) = 100°C 1 0.5 ms 1 ms 10 ms 0.00001 1000 100 0.0001 0.001 VDS, DRAIN−TO−SOURCE VOLTAGE(V) TIME IN AVALANCHE (s) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. IPEAK vs. Time in Avalanche www.onsemi.com 4 0.01 NVMFD5C478NL TYPICAL CHARACTERISTICS 100 50% Duty Cycle RqJA (°C/W) 10 20% 10% 5% 2% 1 1% 0.1 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (sec) Figure 13. Thermal Characteristics DEVICE ORDERING INFORMATION Marking Package Shipping† NVMFD5C478NLT1G 5C478L DFN8 (Pb−Free) 1500 / Tape & Reel NVMFD5C478NLWFT1G 478LWF DFN8 (Pb−Free) 1500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DFN8 5x6, 1.27P Dual Flag (SO8FL−Dual) CASE 506BT ISSUE F 1 2X SCALE 2:1 0.20 C D A B D1 8 7 6 ÉÉ ÉÉ ÉÉ PIN ONE IDENTIFIER NOTE 7 1 2 2X 0.20 C 5 DATE 23 NOV 2021 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 MM FROM THE TERMINAL TIP. 4. PROFILE TOLERANCE APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST POINT ON THE PACKAGE BODY. 7. A VISUAL INDICATOR FOR PIN 1 MUST BE LOCATED IN THIS AREA. E1 E 4X h 3 4 c TOP VIEW A1 0.10 C A DETAIL B 0.10 C NOTE 4 C SIDE VIEW DETAIL A D2 D3 4X e 1 SEATING PLANE NOTE 6 ALTERNATE CONSTRUCTION DETAIL A L K 4 DIM A A1 b b1 c D D1 D2 D3 E E1 E2 e G h K K1 L M N MILLIMETERS NOM MIN MAX −−− 0.90 1.10 −−− −−− 0.05 0.33 0.42 0.51 0.33 0.42 0.51 0.20 −−− 0.33 5.15 BSC 4.70 4.90 5.10 3.90 4.10 4.30 1.50 1.70 1.90 6.15 BSC 5.70 5.90 6.10 3.90 4.15 4.40 1.27 BSC 0.45 0.55 0.65 −−− −−− 12 _ 0.51 −−− −−− 0.56 −−− −−− 0.48 0.61 0.71 3.25 3.50 3.75 1.80 2.00 2.20 SOLDERING FOOTPRINT* DETAIL B 4.56 M 4X b1 N 4X 8 G 5 8X 2X 2X 2.08 8X E2 0.75 0.56 b K1 BOTTOM VIEW 0.10 C A B 0.05 C GENERIC MARKING DIAGRAM* 1 XXXXXX AYWZZ NOTE 3 4.84 4X 6.59 3.70 0.70 4X XXXXXX = Specific Device Code A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability 1.40 2.30 1.00 1.27 PITCH 5.55 DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON50417E Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. DFN8 5X6, 1.27P DUAL FLAG (SO8FL−DUAL) PAGE 1 OF 1 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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