RFP8P05

RFD8P05, RFD8P05SM, RFP8P05 Data Sheet January 2002 8A, 50V, 0.300 Ohm, P-Channel Power MOSFETs Features • 8A, 50V These products are P-Channel power MOSFETs manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI circuits, gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers, and relay drivers. These transistors can be operated directly from integrated circuits. Formerly developmental type TA09832. PACKAGE • UIS SOA Rating Curve • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Ordering Information PART NUMBER • rDS(ON) = 0.300Ω BRAND Symbol RFD8P05 TO-251AA D8P05 RFD8P05SM TO-252AA D8P05 RFP8P05 TO-220AB RFP8P05 D G NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-252AA variant in tape and reel, i.e., RFD8P05SM9A. S Packaging JEDEC TO-220AB JEDEC TO-251AA SOURCE DRAIN GATE DRAIN (FLANGE) DRAIN (FLANGE) SOURCE DRAIN GATE JEDEC TO-252AA DRAIN (FLANGE) GATE SOURCE ©2002 Fairchild Semiconductor Corporation RFD8P05, RFD8P05SM, RFP8P05 Rev. B RFD8P05, RFD8P05SM, RFP8P05 Absolute Maximum Ratings TC = 25oC Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20KΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg RFD8P05, RFD8P05SM, RFP8P05 -50 -50 -8 -20 ±20 48 0.27 See Figure 6 -55 to 175 UNITS V V A A V W W/oC oC oC oC 300 260 CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. Electrical Specifications TC = 25oC Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 9) -50 - - V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA (Figure 8) -2 - -4 V VDS = Rated BVDSS, VGS = 0V - - 1 µA VDS = 0.8 x Rated BVDSS, TJ = 150oC - - 25 µA Zero Gate Voltage Drain Current IDSS Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) rDS(ON) Turn-On Time tON Turn-On Delay Time td(ON) - - ±100 nA ID = 8A, VGS = -10V (Figure 7) - - 0.300 Ω VDD = -25V, ID ≈ 4A, RG = 9.1Ω, RL = 6.25Ω, VGS = -10V - - 60 ns - 16 - ns tr - 30 - ns td(OFF) - 42 - ns tf - 20 - ns tOFF - - 100 ns Rise Time Turn-Off Delay Time VGS = ±20V Fall Time Turn-Off Time Total Gate Charge Qg(TOT) VGS = 0 to -20V Gate Charge at -5V Qg(-10) VGS = 0 to -10V Threshold Gate Charge Qg(TH) VGS = 0 to -2V Thermal Resistance Junction to Case RθJC Thermal Resistance Junction to Ambient RθJA VDD = -40V, ID = 8A,RL = 5Ω, IG(REF) = -0.3mA TO-251AA, TO-252AA - - 80 nC - - 40 nC - - 2 nC - - 3.125 oC/W - - 100 oC/W 62.5 oC/W TO-220AB Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage (Note 2) Reverse Recovery Time TC = 25oC Unless Otherwise Specified SYMBOL VSD trr TEST CONDITIONS MIN TYP MAX UNITS ISD = -8A - - -1.5 V ISD = -8A, dISD/dt = 100A/µs - - 125 ns NOTE: 2. Pulse test: pulse width ≤ 300µs, Duty Cycle ≤ 2%. 3. Repetitive rating: pulse width is limited by maximum junction temperature. ©2002 Fairchild Semiconductor Corporation RFD8P05, RFD8P05SM, RFP8P05 Rev. B RFD8P05, RFD8P05SM, RFP8P05 Typical Performance Curves Unless Otherwise Specified -10 1.0 -8 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 -6 -4 -2 0.2 0 0 0 25 50 75 100 125 150 25 175 50 FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE IAS , AVALANCHE CURRENT (A) DC OPERATION OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 1 TC = 25oC TJ = 175oC ID, DRAIN CURRENT (A) VGS = -10V VGS = -9V VGS = -8V -12 VGS = -7V -8 VGS = -6V -4 VGS = -5V VGS = -4V 0 0 -2 -4 -6 -8 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 5. SATURATION CHARACTERISTICS ©2002 Fairchild Semiconductor Corporation 175 If R = 0 tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD) IDM STARTING TJ = 25oC STARTING TJ = 150oC 10 1 0.1 1 10 100 FIGURE 4. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY -20 -16 150 tAV , TIME IN AVALANCHE (ms) FIGURE 3. FORWARD BIAS SAFE OPERATING AREA PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC 125 If R ≠ 0 tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] -100 -10 VDS , DRAIN TO SOURCE VOLTAGE (V) -10 IDS(ON), DRAIN TO SOURCE CURRENT (A) ID , DRAIN CURRENT (A) 100 -1 100 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 10 0.1 75 TC, CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC) 20 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDD = 15V 16 25oC 175oC 12 -55oC 8 4 0 0 -3 -6 -9 -12 VGS , GATE TO SOURCE VOLTAGE (V) -15 FIGURE 6. TRANSFER CHARACTERISTICS RFD8P05, RFD8P05SM, RFP8P05 Rev. B RFD8P05, RFD8P05SM, RFP8P05 Typical Performance Curves Unless Otherwise Specified 2.5 1.50 PULSE DURATION = 80µs DUTY CYCLE =0.5% MAX VGS = -10V, ID = -8A VGS = VDS, ID = -250µA 1.25 NORMALIZED GATE THRESHOLD VOLTAGE NORMALIZED ON RESISTANCE 3.0 2.0 1.5 1.0 0.5 1.00 0.75 0.50 0.25 0 -50 0 50 100 150 0 -50 200 0 TJ , JUNCTION TEMPERATURE (oC) 50 100 FIGURE 7. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 200 FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 1000 2.0 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGS ID = -250µA 800 C, CAPACITANCE (pF) 1.5 1.0 0.5 600 CISS 400 COSS 200 CRSS 0 -50 0 0 50 100 150 0 200 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE -10 -15 -20 -25 FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE -50 VDS , DRAIN TO SOURCE VOLTAGE (V) -5 VDS , DRAIN TO SOURCE VOLTAGE (V) -10 VDD = BVDSS GATE SOURCE VOLTAGE VDD = BVDSS -37.5 -8 RL = 6.25Ω IG(REF) = 0.3mA VGS = 10V -25 -6 0.75BVDSS 0.50BVDSS 0.25BVDSS -12.5 -4 DRAIN TO SOURCE VOLTAGE 0 I I 20 G(REF) TIME (µs) 80 G(REF) IG(ACT) IG(ACT) -2 VGS , GATE TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 150 TJ , JUNCTION TEMPERATURE (oC) 0 NOTE: Refer to Application Notes AN7254 and AN7260. FIGURE 11. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT ©2002 Fairchild Semiconductor Corporation RFD8P05, RFD8P05SM, RFP8P05 Rev. B RFD8P05, RFD8P05SM, RFP8P05 Test Circuits and Waveforms VDS tAV L 0 VARY tP TO OBTAIN REQUIRED PEAK IAS - RG + VDD DUT 0V VDD tP VGS IAS IAS VDS tP 0.01Ω BVDSS FIGURE 12. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 13. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(OFF) td(ON) tr 0 RL - DUT VGS + 10% 10% VDS VDD RG tf 90% 90% VGS 0 10% 50% 50% PULSE WIDTH 90% FIGURE 14. SWITCHING TIME TEST CIRCUIT FIGURE 15. RESISTIVE SWITCHING WAVEFORMS VDS RL VDS Qg(TH) 0 VGS= -1V VGS - Qg(-5) + DUT VGS= -5V -VGS VDD VGS= -10V VDD Ig(REF) Qg(TOT) 0 Ig(REF) FIGURE 16. GATE CHARGE TEST CIRCUIT ©2002 Fairchild Semiconductor Corporation FIGURE 17. GATE CHARGE WAVEFORMS RFD8P05, RFD8P05SM, RFP8P05 Rev. B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST  FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench  QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER  SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET  VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4