AN5192

ICs for TV AN5192K Single chip IC with I2C bus Interface for PAL/NTSC color TV system s Overview The AN5192K is a single chip IC for PAL/ NTSC system color TV. TV for multiple systems can be easily designed by the use of this IC in combination with SECAM demodulation IC (The AN 5637). Unit: mm 58.4±0.3 64 33 17.0±0.2 1 32 3.85±0.2 (3.3) 0.7 min. 5.2 max. s Features • Free of mechanical adjustment Built-in I2C bus interface eliminates the need for mechanical adjustment • Rationalization of external components Built-in chroma trap and BPF reduce the external components (1.641) Seating plane 1.778 (1.0) 0.5+0.1 –0.05 19.05 0.25+0.1 –0.05 0° to 15° s Applications • TV, TV with VCR SDIP064-P-0750B 1 2 Ext. Audio Video Out IF AGC APC Internal Video In SIF In DET Out VCC2 AFC1 AFC2 FBP In HOSC VOSC H Out APC1 GND(VCJ) VCC3(VCJ) BL DET Y In X-ray 55 57 56 54 53 52 Ver. Clamp 44 Hor. Sync. 46 Ver. Sync. 45 C In 48 50 49 47 43 42 41 40 51 33 39 38 37 36 35 34 Shut HVCO Down AFC1 Hor. SCP HBLK Reg. Hor. sync.sep APC1 Trap *6-bit Sharpness *7-bit HVBLK *1-bit ACC det. 1H FF System SW Black expansion NTSC amp. Chroma SW BPF *1-bit Y clamp DAC SW Out Out I2C Bus Interface ACC amp. LPF Y contrast APC2 *1-bit (Service) AFT *9-bit Level adjust *4-bit VIF Detect 1F AGC *1-bit IF amp. RF AGC *7-bit Pre-amp. *1-bit ASW Phase Shift VCO Ver. sync.sep VCO CV *7-bit clamp *1-bit Hor. Count Down AFC2 *4-bit Hor. Lock det. BGP 50 Hz/60 Hz AN5192K s Block Diagram 50/60Hz SECAM V Out SCP -(R-Y)Out -(B-Y)Out -(B-Y)In 7 dB VSW *1-bit detect G Cut Off (8-bit) B Drive Cut Off 61 60 59 58 62 Saturation Chroma contrast -(R-Y)In 64 27 28 29 30 24 25 11 12 13 14 15 16 17 18 19 20 21 22 23 26 10 8 9 R In B In G In SCL YS ACL SDA VCC1 VIF In 1 VIF In 2 R Out B Out G Out AFT Out VCC3 (IF) GND (IF) Audio Out Lock DET De-emphasis RF AGC Out GND (RGB) Spot Killer 63 *7-bit PN/S SW Ver. out *1-bit Limiter SIF detect R-Y demod +/− B-Y demod Ver. Count Down *2-bit G-Y (50 Hz/60 Hz) Killer Ident *8-bit Brightness APC Deemphasis B-Y clamp Tint *7-bit G-Y clamp CW Generate R-Y clamp R *1-bit *Drive 8-bit Drive Chroma *Cut Off 9-bit Cut Off YS VCO Pulse 31 32 1 2 3 4 5 6 7 APC Killer ICs for TV Ext. Video Decoupling R Clamp B Clamp G Clamp 4.43 MHz 3.58 MHz Killer Out ICs for TV s Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Description (R-Y) Clamp (G-Y) Clamp (B-Y) Clamp Killer Filter Killer Output Chroma APC Filter Chroma VCO (4.43 MHz) Chroma VCO (3.58 MHz) Spot Killer Ys Input (Fast blanking) External R Input External G Input External B Input VCC1 R Output G Output B Output Hor.Lock Detect GND ACL SDA SCL VCC3-1 (VIF/SIF) VIF Input 1 VIF Input 2 GND (VIF/SIF) RF AGC Output Audio Output De-emphasis AFT Output External Video Input DC Decoupleling Filter (RGB/I2C/DAC) Pin No. 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Description External Audio Input SIF Input/DAC Output IF AGC Filter Video Output SIF APC Filter Internal Video Input VIF Detect Output VIF APC1 Filter VIF VCO (fP/2) AN5192K Black Level Det./Blank off SW Y Input Ver.Sync.Clamp Ver.Sync.Input Hor.Sync.Input VCC3-2 (Chroma/Jungle/DAC) Chroma Input/Black Expansion Start GND (Video/Chroma/Jungle) FBP Input VCC2 (Hor.Stability Supply) AFC2 Filter AFC1 Filter Hor.VCO (32 fH) X-ray Protection Input Hor.Pulse Output 50 Hz/60 Hz Detect Output Ver. Pulse Output SECAM Interface -(B-Y) Output -(R-Y) Output Sandcastle Pulse Output -(B-Y) Input -(R-Y) Input 3 AN5192K s Absolute Maximum Ratings Parameter Supply voltage Symbol VCC VCC1 (14) VCC3 (23, 47) Supply current ICC I14 I23+47 I51 Power dissipation *2 *1 ICs for TV Rating 10.5 6.0 77 119 27 1 372 −20 to +70 −55 to +150 Unit V mA PD Topr Tstg *1 mW °C °C Operating ambient temperature Storage temperature Note) *1: Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C. *2: The power dissipation shown is the value for Ta = 70°C. s Recommended Operating Range Parameter Supply voltage Supply voltage Supply current Symbol VCC1 VCC3 I51 Range 8.1 to 9.9 4.5 to 5.5 10 to 25 Unit V V mA s Electrical Characteristics at Ta = 25°C Parameter Symbol Conditions Min Typ Max Unit Power supply (DAC Data are typical) Supply current 1 Supply current 2 Supply current 3 Stabilized power supply voltage Stabilized power supply current Stabilized power supply input resistance I14 I23 I47 V51 I51 R51 Current at V14 = 9 V Current at V23 = 5 V Current at V47 = 5 V Voltage at I51 = 15 mA Current at V51 = 5 V DC measurement Gradient between I51 = 10 mA and 25 mA 44 8 56 5.8 2 1 55 11 71 6.5 5 5 66 14 85 7.2 7 10 mA mA mA V mA Ω VIF circuit (Typical input fP = 38.9 MHz, VIN = 90 dBµ, DAC Data are typical) Video detection output (typ.) Video detection output (max.) Video detection output (min.) Video detection output f characteristics Sync. peak value voltage APC pull-in range (high) VPO VPOmax VPOmin fPC VSP fPPH Modulation m = 87.5% Data 0A = 88 Data 0A = F8 Data 0A = 08 Frequency to become −3 dB for 1 MHz Sync. peak voltage in VPO measurement High band side pull-in range (Difference from fP = 38.9 MHz) 1.75 2.15 1.1 5.5 1.6 1.0 2.1 2.6 1.6 8 2.0 2.0 2.5 3.3 2.0 12 2.4  V[p-p] V[p-p] V[p-p] MHz V MHz 4 ICs for TV s Electrical Characteristics at Ta = 25°C (continued) Parameter Symbol Conditions Min Typ AN5192K Max Unit VIF circuit (continued) (Typical input fP = 38.9 MHz, VIN = 90 dBµ, DAC Data are typical) APC pull-in range (low) RF AGC delay point adjusting range VCO free-running frequency fPPL ∆VRFDP ∆ fP Low band side pull-in range (Difference from fP = 38.9 MHz) Input to become delay point (V27 = approx. 6.5 V) at Data 0C = 00 to 7F  75 −2.0  0 −1.0 95 1.2 MHz dBµ MHz Dispersion without input VIN, −1.2 V36 (IF AGC) = 0 V (Measurement of difference from 38.9 MHz) Maximum current IC can sink when pin 27 is low IC leakage current at which pin 27 is high Df = ±25 kHz V30 without input VIN V30 at f = fP − 500 kHz V30 at f = fP + 500 kHz DC measurement Output DC voltage in AV SW external mode (04 − D6 = 1) 1.5 −50 40 4.0 7.8 0.3 70 0.5 RF AGC maximum sink current RF AGC minimum sink current AFT discrimination sensitivity AFT center voltage AFT maximum output voltage AFT minimum output voltage Detection output resistance External mode output DC voltage IRFmax IRFmin µAFT VAFT VAFTmax VAFTmin RO39 V39EXT 3.0 0 57 4.5 8.1 0.8 120 1.0  50 75 5.0 8.7 1.0 170 1.8 mA µA mV/kHz V V V Ω V SIF circuit (Typical input fS = 6.0 MHz, fM = 400 Hz, VIN = 90 dBµ) Audio detection output (PAL) Audio detection output (NTSC/PAL) Audio detection output linearity VSOP RSN/P ∆VSOP ∆f = ±50 kHz 0D − D7 = 0, R237 = 560 kΩ ∆f = ±25 kHz, R237 = 560 kΩ 0D − D7 = 1, ratio to PAL Ratio of at fS = 6.0 MHz to 6.5 MHz, and to 5.5 MHz (270 kΩ addition between pin 37 and VCC1) PAL mode (0D − D7 = 0) pull-in range R237 = 560 kΩ NTSC mode (0D − D7 = 1) pull-in range range R237 = 560 kΩ PAL mode (0D − D7 = 0) 270 kΩ addition between pin 37 and VCC1 DC measurement Impedance of pin 29 at PAL Impedance of pin 29 at NTSC 480 −2.5 −2.5 600 − 0.5 0 720 1.5 2.5 mV[rms] dB dB SIF pull-in range (PAL) SIF pull-in range (NTSC) SIF pull-in range (5.5 MHz) SIF input resistance De-emphasis pin output resistance (PAL) De-emphasis pin output resistance (NTSC) AV SW circuit Video SW voltage gain Video SW f characteristics fSPP fSPN fSP5.5 RI34 R29P R29N 5.7 4.2 5.2 8 32 48    10 40 60 6.8 4.8 5.8 12 48 72 MHz MHz MHz kΩ kΩ kΩ GVSW fVSW f = 1 MHz, VIN = 1 V[p-p] Frequency to become −3 dB from f = 1 MHz 6.2 10 7.2  8.2  dB MHz 5 AN5192K s Electrical Characteristics at Ta = 25°C (continued) Parameter AV SW circuit (continued) Video SW external input pin voltage Video SW external output DC voltage Video SW external input resistance Video SW output resistance Audio SW voltage gain Audio SW input pin voltage Audio SW input output DC voltage Audio SW input resistance Audio SW output resistance Video SW internal clamp pin voltage Video SW internal output DC voltage V31 V36E RI31 RO36 GASW V33 V28 RI31 RO28 V38 V36I DC measurement DC measurement Data 04 − D6 = 1 DC measurement DC measurement Data 04 − D6 = 1 (Outside) f = 400 Hz, VIN = 1 V[p-p] DC measurement DC measurement DC measurement DC measurement DC measurement DC measurement, Data 04 − D6 = 0 1.7 4.2 44 100 −1 3.7 3.7 61 200 1.3 3.1 2.0 4.8 56 140 0 4.2 4.2 72 400 1.6 3.7 Symbol Conditions Min Typ ICs for TV Max Unit 2.3 5.4 68 180 1 4.7 4.7 83 600 1.9 4.3 V V kΩ Ω dB V V kΩ Ω V V Video signal processing circuit (In the following test conditions, the measurements are made with input 0.6 V[p-p] (VWB = 0.42 V[0-p]) stair-step, G-out.) Video output (typ.) Video output (max.) Video output (min.) Contrast variable range Video frequency characteristics VYO VYOmax VYOmin Data 03 = 40 (typ.) (Contrast) Data 03 = 7F (max.) Data 03 = 00 (min.) 1.65 3.6 0.07 20 5.5 2.1 4.5 0.25 25 6.8 2.55 5.35 0.5 33  V[p-p] V[p-p] V[p-p] dB MHz YCmax/min 03 = 7F 03 = 00 fYC Data 0E − D1 = 1(Trap Off) Data 04 = 00 (Sharpness) Frequency to become −3 dB from f = 0.2 MHz f = 3.8MHz Data 0E − D1 = 1 Picture quality variable range Pedestal level (typ.) Pedestal level variable width Brightness control sensitivity Video input clamp voltage ACL sensitivity Blanking Off threshold voltage Blanking level DC restoration ratio YSmax/min 04 = 3F 04 = 00 VPED ∆VPED ∆VBRT VYCLP ACL VBOFF VYBL TDC 9 1.9 2.0 7 3.2 2.1 0.3 0.5 90 13 2.5 2.6 11 3.7 2.7 0.5 1.0 100 17 3.1 3.2 14 4.2 3.2 0.9 1.5 110 dB V V mV/Step V V/V V V % Data 02 = 80 (typ.) (Brightness) Difference between Data 02 = 00 and FF Average amount of change for 1 Step between Data 02 = 60 and A0 Clamp voltage of pin 43 Change of Y-out when V20 = 3.0 V→3.5 V Maximum blanking Off voltage in lowering pin 42 voltage DC voltage of blanking pulse APL 10% to 90% ∆AC − ∆DC TDC = × 100 ∆AC 6 ICs for TV s Electrical Characteristics at Ta = 25°C (continued) Parameter Symbol Conditions Min Typ AN5192K Max Unit Video signal processing circuit (continued) (In the following test conditions, the measurements are made with input: 0.6 V[p-p] (VWB = 0.42 V[0-p] stair-step) at G-out.) Video input clamp current ACL start point IYCLP VACL DC measurement: IC inside sink current V20 at which output amplitude becomes 90% in decreasing ACL pin (V20) from 5 V 8 3.4 13 3.7 18 4.0 µA V Color signal processing circuit (In the following test conditions, burst 300 mV[p-p] (PAL) and reference is B-out) Color-difference output (typ.) Color-difference output (max.) Color-difference output (min.) Contrast variable range ACC characteristics 1 ACC characteristics 2 NTSC tint center NTSC tint variable range 1 NTSC tint variable range 2 Color-difference output ratio (R) Color-difference output ratio (G) Color-difference output angle (R) Color-difference output angle (G) PAL color killer tolerance NTSC color killer tolerance APC pull-in range (high) APC pull-in range (low) Color killer detection output voltage (Color) Color killer detection output voltage (B&W) Demodulation output-(B-Y) Demodulation output-(R-Y) Demodulation output angle ∠B VCO VCOmax VCOmin Input: Color bar Data 00 = 40 (typ.), 03 = 40 (typ.) Data 00 = 7F amplitude of one side Data 03 = 40 Data 00 = 00 Data 03 = 40 Data 00 = 40 2.6 2.3 0 20 0.9 0.7 −13 30 −65 0.71 0.31 78 224 −57 −57 450  4.5 0 555 430 −5 3.3 3.0  25 1.0 1.0 0 50 −50 0.83 0.37 90 236 −44 −44 900 −900 5.0 0.1 695 540 0 4.0  100 33 1.2 1.1 +13 65 −30 0.95 0.43 102 248 −34 −34  −450  0.5 835 650 5 V[p-p] V[0-p] mV[p-p] dB Time Time Step deg deg Time Time deg deg dB dB Hz Hz V V mV[p-p] mV[p-p] deg 7 CCmax/min 03 = FF 03 = 00 ACC1 ACC2 ∆θC ∆θ1 ∆θ2 R/B G/B ∠R ∠G VKillP VKillN fCPH fCPL VKC VKBW VDB VDR ∠RDB Burst 300 mV[p-p]→600 mV[p-p] Input; Rainbow Burst 300 mV[p-p]→60 mV[p-p] Input; Rainbow Difference from Data = 01 = 40 (Tint) at which tint is adjusted to center. Data 01 = 7F Data 01 = 00 Input; Rainbow for both PAL/NTSC Input; Rainbow for both PAL/NTSC Input; Rainbow for both PAL/NTSC Input; Rainbow for both PAL/NTSC 0 dB = 300 mV[p-p] 0 dB = 300 mV[p-p] For both PAL/NTSC For both PAL/NTSC V5 measured when chroma is input V5 measured when no chroma is input Input; Color bar, measurement by pin 60 Input; Color bar, measurement by pin 61 Phase shift of B-Y axis AN5192K s Electrical Characteristics at Ta = 25°C (continued) Parameter Symbol Conditions Min Typ ICs for TV Max Unit Color signal processing circuit (continued) (In the following test conditions, burst 300 mV[p-p] (PAL) and reference is B-out) Demodulation output angle ∠R CW output level (4.43 MHz) CW output level (3.58 MHz) CW output level period (SECAM) SECAM discrimination current ∠RDR VCWP VCWN TCW ISECAM Phase difference from B-Y axis AC component when VCO is set at 4.43 MHz AC component when VCO is set at 3.58 MHz CW output period at SECAM Minimum value for taking out current from pin 59 and discriminating as SECAM V59 DC level at PAL/SECAM V59 DC level at SECAM DC measurement. pin 60, 61 impedance at PAL/NTSC DC measurement. pin 60, 61 impedance at SECAM 85 250  1.31 50 90 300 0 1.41 100 95 350 50 1.51 150 deg mV[p-p] mV[p-p] ms µA PAL/NTSC DC level SECAM DC level PAL/NTSC output impedance SECAM output impedance V59PN V59S R60,61PN R60,61S 0.8 4.1 390 100 1.3 4.6 480  1.65 5.1 570  V V Ω kΩ RGB Processing Circuit (DAC Data are typical) Pedestal difference voltage Brightness voltage tracking Video voltage gain relative ratio Video voltage gain tracking Drive adjustment range Cut-off adjustment range ∆VIPL ∆TBL ∆GYC ∆TCONT GDV Difference voltage of R,G,B out pedestal R, G, B out fluctuation level ratio of DATA 02 (Brightness) 02 = 40 to C0 Output ratio of R,B out to G out Gain ratio of R, G, B out of Data 03 (Contrast) 03 = 20 to 60 AC change amount of R, B out between drive adjustment max. and min. 0 0.9 0.8 0.9 5.3 1.9  1.0 1.0 1.0 6.3 2.2 0.3 1.1 1.2 1.1 7.3 2.5 V Time Time Time/ Time dB V VCUT-OFF DC change amount of R, G, B out between cutoff adjustment at max. and min. VYS VEPL ∆VEPL ∆VPL/IE VERGB Minimum DC voltage, when YS turns on YS is On YS is On Internal-external Input 3 V[p-p], contrast 03 = 7F Input 3 V[p-p], contrast 03 = 7F YS threshold voltage External RGB pedestal voltage External RGB pedestal difference voltage Internal and external pedestal difference voltage External RGB output voltage 0.7 1.7 0 50 4.3 − 0.6 10 8 1.0 2.3  200 5.4 0 13 12 1.3 2.9 250 400 6.5 0.6 16  V V mV mV V[p-p] V dB MHz External RGB output difference voltage ∆VERGB External RGB contrast variable range ECmax/min 03 = 7F 03 = 00 External RGB frequency characteristics 8 fRGBC Input 0.2 V[p-p], DC = 1 V ICs for TV s Electrical Characteristics at Ta = 25°C (continued) Parameter Symbol Conditions Min Typ AN5192K Max Unit Synchronizing signal processing circuit Horizontal free-running oscillation frequency Horizontal output pulse duty cycle Horizontal pull-in range PAL vertical free-running oscillation frequency NTSC vertical free-running oscillation frequency Vertical output pulse width PAL vertical pull-in range NTSC vertical pull-in range Horizontal output voltage (high) Horizontal output voltage (low) Vertical output voltage (high) Vertical output voltage (low) Picture center variable range fHO τHO fHP fVO-P fVO-N τVO fVP-P fVP-N V56H V56L V58H V58L ∆THC Without sync. signal input Upward going pulse duty cycle Difference from fH = 15.625 kHz Data 0E − D2 = 1, D3 = 0 Forced 50 Hz mode, no sync. signal input Data 0E − D2 = 1, D3 = 1 Forced 60 Hz mode, no sync. signal input For both PAL/NTSC fH = 15.625 kHz, forced 50 Hz mode fH = 15.75 kHz, forced 60 Hz mode High level DC voltage Low level DC voltage High level DC voltage Low level DC voltage Change amount of phase difference between H Sync. and H-out of Data 0A = 80 to 8F Pin 55 minimum voltage at which H-out stops to appear Vertical frequency to become V57 = Low (< 0.5 V) Vertical frequency to become V57 = High (> 4.5 V) Clamp voltage of V45 Clamp voltage of V46 Minimum V50 to become f0 > 10 kHz, when horizontal oscillation output is 1 V[p-p] or more. 15.33 15.63 15.93 31 ±500 48 58 9 46 56 3.2 0 3.9 0 2.6 37 ±650 50 60 10   3.5  4.2  3.2 43  52 62 11 54 64 3.8 0.3 4.5 0.3 4.4 kHz % Hz Hz Hz 1/fH Hz Hz V V V V µS Overvoltage protective operation voltage VXRAY Vertical frequency discrimination (50) Vertical frequency discrimination (60) Sync. signal clamp voltage (Ver.) Sync. signal clamp voltage (Hor.) Horizontal output start voltage f50 f60 V45 V46 VfHS 0.60 47 57 1.0 1.0 3.4 0.68   1.3 1.3 4.2 0.76 55 63 1.6 1.6 5.0 V Hz Hz V V V I2C interface Sink current when ACK SCL, SDA signal input high level SCL, SDA signal input low level Maximum frequency allowable to input IACK VIHI VILO fImax Maximum value of pin 21 sink current at ACK 2.0 3.1 0 100 2.5    5.0 5.0 0.9  mA V V Kbit/s 9 AN5192K s Electrical Characteristics at Ta = 25°C (continued) • Design reference data Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed. ICs for TV Parameter Symbol Conditions Min Typ Max Unit VIF circuit (Typical input fP = 38.9 MHz, VIN = 90 dBµ) Input sensitivity Maximum allowable input SN ratio Differential gain Differential phase Black noise detection level Black noise clamp level RF AGC operation sensitivity VCO switch On drift Intermodulation RF AGC adjustment sensitivity AFT offset adjustment sensitivity Video detection output fluctuation with VCC Video detection output-temperature characteristics Input resistance (pin 24, 25) Input capacitance (pin 24, 25) Sound IF output level VCO control sensitivity VCO control range RF AGC delay-point temperature characteristics VCO free-running frequency temperature characteristics AFT center frequency temperature characteristics VPS VPmax SNP DGP DPP ∆VBN ∆VBNC GRF ∆fPD IM SRF SAFT ∆VP/V ∆VP/T RI24, 25 CI24, 25 VSIF βP fVCO ∆VDP/T ∆fP/T ∆fAFT/T Deference from sync. peak value Deference from sync. peak value Input level difference to become V27 = 1 V→7 V Frequency drift from 5 seconds to 5 mins. after SW On VfC − VfP = −2 dB, VfS − VfP = −12 dB Average amount of change of output voltage V27 at Data 1Step Average amount of change of output voltage V30 per Data 1Step VCC = ±10% Ta = −10°C to +70°C f = 38.9 MHz f = 38.9 MHz fS = 38.9 MHz − 6.0 MHz, P/S = 20 dB ∆V41 = ±0.1 V Free-running frequency change width from Data 0D = 00 to 7F Ta = −20°C to +70°C Ta = −20°C to +70°C Ta = −20°C to +70°C, input frequency at which AFT output voltage becomes 4.5 V Input level to become VPO = −3 dB Input level to become VPO = 1 dB  104 50 0 0 −55 35 0.5 100 46 1.0 0.15     94 2.0 3.0 0   45 110 53 3 3 −45 45 1.5 150 52 1.7 0.2 ±10 ±5 1.2 4.0 100 2.7 4.0 3 300 300 51   5 5 −35 35 3.0 200  2.5 0.25 ±15 ±10   106 3.5 5.0 5   dBµ dBµ dB % deg IRE IRE dB kHz dB V/Step V/Step % % kΩ pF dBµ kHz/mV MHz dB kHz kHz 10 ICs for TV s Electrical Characteristics at Ta = 25°C (continued) • Design reference data (continued) Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed. AN5192K Parameter Symbol Conditions Min Typ Max Unit SIF circuit (Typical input fS = 6.0 MHz, fM = 400 Hz, VIN = 90 dBµ) Input limiting level AM rejection ratio Total harmonic distortion SN ratio Audio output with VCC fluctuation Audio output-temperature characteristics AV SW circuit Video SW cross-talk Audio SW cross-talk (Internal→External) Audio SW cross-talk (External→Internal) CTVSW CTAIE CTAEI f = 1 MHz, VIN = 1 V[p-p] Internal→External、 External→Internal fS = 6.0 MHz, fM = 400 Hz Without input from outside fS = 6.0 MHz, fM = 0 Hz fM = 400 Hz, VIN = 600 mV[rms]    −66 −73 −73 −60 −67 −67 dB dB dB VLIM AMR THD SNA ∆VS/V ∆VS/T VCC = ±10% Ta = −20°C to +70°C Input level to become VSOP = −3 dB AM = 30% ∆f = ±50 kHz  60 0 50   44 70 0.3 55 ±3 ±5 50  0.5  ±6 ±10 dBµ dB % dB % % Video signal processing circuit (In the following test conditions, the measurements are made at G-out with input 0.6 V[p-p] (VWB = 0.42 V[0-p]). ) Y signal delay time Black level extension1 TDL VBL1 Phase difference from Y input (PAL: 4.43 MHz) Input: Total black, difference between pin 42 of 9 V and Open (With RC filter) Input: Total black, difference between pin 42 of 3 V and 9 V 620 −100 690 0 790 100 ns mV Black level extension2 Black level extension3 Contrast variation with sharpness Brightness variation with sharpness Input dynamic range Y signal SN ratio Black level extension start point Trap on/off gain difference Trap on/off delay time change amount VBL2 VBL3 ∆VCS ∆VBS VImax SNY VBLS ∆GTRAP ∆TTRAP 500 800 300 0 0 1.7 56 42 0 390 1100 500 300 250   47 1 430 mV mV mV mV V[p-p] dB IRE dB ns Input: approx. 20IRE, voltage difference 100 between pin 42 of Open and 9 V Y-out output level difference between sharpness max. and min. Pedestal level DC difference between sharpness is at max. and min. Contrast 03 = 40 Contrast 03 = 7F Start point at V48 = 4.5 V Trap on/off Trap on/off −300 −250 1.0 51 37 −1 350 11 AN5192K s Electrical Characteristics at Ta = 25°C (continued) • Design reference data (continued) Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed. ICs for TV Parameter Symbol Conditions Min Typ Max Unit Video signal processing circuit (continued) (In the following test conditions, the measurements are made at G-out with input 0.6 V[p-p] (VWB = 0.42 V[0-p]). Trap frequency error Trap attenuation amount Trap automatic adjustment range Trap fixed frequency Video output fluctuation with VCC ∆fTRAP Trap center frequency, when chroma −70 input is 4.43 MHz 26 3 4.0 0 0 −10 0 30  4.8 100 5 10 70  5 5.6 200 10 30 kHz dB MHz MHz mV/V % ns ATT TRAP Attenuation amount of 4.43 MHz, when chroma input is 4.43 MHz fTRAP fST ∆VY/V ∆TP/N VCO frequency of ∆fTRAP ≤ 70 kHz Data 0E − D6 = 1, Trap frequency VCC1 = 9 V (allowance: ±10%) Ta = −20°C to +70°C Trap On (NTSC-PAL) Video output-temperature characteristics ∆VY/T PAL/NTSC delay time difference Color signal processing circuit (Burst 300 mV[p-p] (PAL), reference is B-out) Demodulation output residual carrier Color difference output residual carrier VCO free-running frequency (PAL) VCO free-running frequency (NTSC) fCO fluctuation with VCC Static phase error (PAL) Static phase error (NTSC) PAL/NTSC Line crawling Color difference output bandwidth Chroma BPF characteristics (PAL) Chroma BPF characteristics (NTSC) VCAR1 VCAR2 fCP fCN ∆VC/V ∆θP ∆θN RP/N ∆VPAL fCC BPFP BPFN 2fSC level of pin 60 and 61 2fSC level of pin 15, 16, and 17 0 0   0 0 0 2 2 1.0  1.0 10 13 30 50 300 300 300 5 5 1.2 50    mV mV Hz Hz Hz deg/ 100 Hz deg/ 100 Hz Time mV MHz dB dB Difference from f = 4.433619 MHz −300 Difference from f = 3.579545 MHz −300 VCC1 = 9 V (allowance: ±10%), VCC3 = 5 V (allowance: ±10%) Tint shift from ∆fC = −300 Hz to +300 Hz change Tint shift from ∆fC = −300 Hz to +300 Hz change Output amplitude ratio of PAL to NTSC Pin 61: Output amplitude difference per 1H for-(R-Y) pin Band to become −3 dB Output level difference between f = 4.43 MHz and 3.58 MHz Output level difference between f = 3.58 MHz and 2.0 MHz (when Ext. video) VCC1 = 9V (allowance: ±10%) VCC3 = 5V (allowance: ±10%) Ta = −20°C to +70°C −300 0 0 0.8 0    Color-difference output fluctuation with VCC Color-difference output -temperature characteristics ∆VC/V ∆VC/T   ±10 ±10 ±15 ±15 % % 12 ICs for TV s Electrical Characteristics at Ta = 25°C (continued) • Design reference data (continued) Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed. AN5192K Parameter Symbol Conditions Min Typ Max Unit Color signal processing circuit (continued) (Burst 300 mV[p-p] (PAL), reference is B-out) Brightness variation with color Brightness variation difference voltage with color RGB processing circuit (C-Y)/Y (C-Y), Y delay difference YS changeover speed External RGB input dynamic range Internal/external crosstalk Spot killer operation Brightness variation with contrast Brightness variation difference voltage with contrast Pedestal level fluctuation with VCC Pedestal level- temperature characteristics Pedestal level 2 RC/Y ∆TC/Y fYS VDEXT CTRGB VSPK VBAC ∆VBAC ∆VPL/V ∆VPL/T VPD2 Color bar input, B-out Contrast typ., color Data 00 = 60 Color bar input, B-out Phase of green→magenta fYS, when external input is 3 V, output level −3 dB Contrast max., Data 03 = 77F Leakage when f = 1 MHz, 1 V[p-p], and YS = 5 V V9, when V9 is decreased from 9 V and spot killer turns on. Pedestal level DC difference between contrast max. and min. R, G, B out variation voltage difference VCC1 = 9 V (allowance: ±10%) Ta = −20°C to +70°C Pedestal level, when G cutoff Data 05 = 18 0.9 −100 7 2.0  7.4 −250 0 0 −2.6 2.1 1.2 0 11 2.5 −60 7.8 0  200 −2.2 2.7 1.5 100  3.2 −50 8.2 250 20 400 V[0-p]/ V[p-p] ns MHz V[0-p] dB V mV mV mV/V VBC ∆VBC Pedestal level DC difference between at contrast max. and min. R, G, B out variation voltage difference −250 0 0  250 20 mV mV −1.8 mV/°C 3.3 V Synchronizing signal processing circuit Lock detection output voltage Lock detection charge and discharge current EBP (RGB) slice level VLD ILD VFBP VFBPH µH βH PBGP V18 at horizontal AFC lock DC measurement Minimum voltage of pin 50, when blanking is applied to RGB output EBP (AFC2) slice level Horizontal AFC µ Horizontal VCO β Burst gate pulse position Minimum voltage of pin 50 at which AFC2 operates DC measurement β curve gradient near f = 15.7kHz For both PAL/NTSC, delay from H. Sync. rise 1.5 30 1.4 0.2 1.9 37 1.9 0.4 2.3 44 2.4 0.6 V µA/µs Hz/mV µs 5.7 ±0.6 0.4 6.3 ±0.8 0.75 6.9 ±1.1 1.1 V mA V 13 AN5192K s Electrical Characteristics at Ta = 25°C (continued) • Design reference data (continued) Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed. ICs for TV Parameter Symbol Conditions Min Typ Max Unit Synchronizing signal processing circuit (continued) PAL burst gate pulse width NTSC burst gate pulse width Burst gate pulse output voltage H blanking pulse output voltage V blanking pulse output voltage PAL V blanking pulse width NTSC blanking pulse width FBP allowable range I2C interface tBUF tSU.STA tHD.STA tLOW tHIGH tr tf tSU.DAT tHD.DAT tSU.ACK tHD.ACK tSU.STO 1LSB = {Data (max.)-Data (00)} /15,63,127 1LSB = {Data (FF) − Data (00)}/255 Overlap of 8-bit 2-stage changeover (Same for AFT) of R, B cut-off 4.0 4.0 4.0 4.0 4.0   0.25 0  0 4.0                  1.0 0.35   3.5   µs µs µs µs µs µs µs µs µs µs µs µs WBGPP WBGPN VBGP VHBLK VVBLK WVP WVN TFBP DC voltage of pin 62 in BGP period DC voltage in H-blanking pulse period of pin 62 DC voltage in V-blanking pulse period of pin 62 Pulse width at fH = 15.625 kHz Pulse width at fH = 15.73 kHz Time from H-out rise to FBP center 3.4 2.5 4.5 2.1 2.1 1.31 1.01 12 4.0 3.0 4.7 2.4 2.4 1.41 1.11  4.6 3.5 4.9 2.7 2.7 1.51 1.21 19 µs µs V V V ms ms µs Bus free before start Start condition set-up time Start condition hold time Low period SCL, SDA High period SCL Rise time SCL, SDA Fall time SCL, SDA Data set-up time (write) Data hold time (write) Acknowledge set-up time Acknowledge hold time Stop condition set-up time DAC 4, 6, 7bit DAC DNLE 8bit DAC DNLE Cut off DAC overlap L4, 6, 7 L8 ∆Step 0.1 0.1 27 1.0 1.0 32 1.9 1.9 37 LSB Step LSB Step Step 14 ICs for TV s Electrical Characteristics at Ta = 25°C (continued) • Typical conditions when testing 1. Input signal 1) VIF AN5192K 2) SIF 3) Video 4) Chroma : fP = 38.9 MHz, VIN = 90 dBµ Video modulation: modulated signal is 10-staircase. Modulation m = 87.5% VIN = 90 dBµ, pin 25 input level approx. 84 dBµ : fS = 6.0 MHz, VIN = 90 dBµ, modulated signal fM = 400 Hz, Deviation: PAL ±50 kHz, NTSC ±25 kHz : 10-staircase 0.6 V[p-p] (VBW = 0.42 V[0-p]) : Color bar signal: Burst level 300 mV[p-p] : Rainbow signal : Burst level 300 mV[p-p] 5) Sync. signal : Video signal 1.5V[p-p] to 2.5 V[p-p] for both horizontal and vertical sync. signal input 2. I2C BUS conditions: (PAL) Sub Address 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E Data(H) 40 40 80 40 80 00 00 00 80 80 88 01 40 40 01 RF AGC VIF VCO Control Color Tint Brightness Contrast Sharpness Cut-off R, B Cut-off G Drive R, B Video output Data(H) 00 = 40 01 = 40 02 = 80 03 = 40 04 = 00 05, 07 = 00 06 = 00 08, 09 = 80 0A (Upper rank) = 8∗ 0B = 01 04 − D7 = 1 0C = 40 0D = 40 Picture center position 0A (Lower rank) = ∗8 AFT 15 AN5192K s Terminal Equivalent Circuits Pin No. 1 2 3 C-Y ICs for TV Equivalent circuit Description Pin 1: Color difference signal clamp pin (R-Y) Pin 2: Color difference signal clamp pin (G-Y) Pin 3: Color difference signal clamp pin (B-Y) • Color difference signal inputted from pin 63, 64 is clamped according to brightness control voltage. • Clamp pulse uses internal clamp pulse (BGP) I/O DC approx. 7 V 9V (VCC1) pin 1, 2, 3 300 Ω 300 Ω 0.068 µF BGP 150 µA Brightness control 4 3.3 V 1V 5V (VCC3) 2.5 V BGP 9V 2.8 V 0.47 µF 100 µA 5 1.0 MΩ Killer det. circuit 137 kΩ 4 270 Ω Killer filter pin DC • Filter pin for killer detection circuit approx. 3.3 V (operates for BGP period) • Killer turned On (Without color output) 2.8 V or less VCC for microcomputer (5 V) 33 kΩ To microcomputer 5 Floating resistor 175 Ω Killer On 40 µA 10 kΩ Killer output pin • Output pin of killer detection circuit • Connect 33 kΩ load resistor of pin 5 to microcomputer VCC DC Killer On 0.2 V Killer Off 5V DC approx. 2.5 V Off 6 5V (VCC3) 0.022 µF 3.3 V 40 k Ω 2.2 µF APC det. circuit 6 1V SW R 2.5 V 7.5 kΩ Pin for APC filter • Filter pin for APC detection circuit (operates for BGP period) • Detection sensitivity becomes large when external R→large (Tends to pull-in easily. Tends to be affected by noise) β curve BGP max. 1 mA VCO circuit 270 Ω fC V6 • When SECAM, APC circuit is stopped by short circuiting 40 kΩ resistor 16 ICs for TV s Terminal Equivalent Circuits (continued) Pin No. 7 8 Equivalent circuit DC 2.7 V 4.43 MHz 7 C7 12 pF DC 2.7 V 3.58 MHz 8 C8 15 pF AN5192K Description Pin 7: Chroma oscillation pin (4.43 MHz) Pin 8: Chroma oscillation pin (3.58 MHz) • Oscillation pin for chroma. Either one of 4.43 MHz or 3.58 MHz is oscillated • Oscillation frequency changeover is performed by 0E − D0 bit of I2C Bus • When 0E − D0 = 1 IP1 and IP2 turn On and 4.43 MHz oscillates. When 0E − D0 = 0 IN1 and IN2 turn on and 3.58 MHz oscillates. • Pattern from pin to oscillator element should be as short as possible. Spot killer pin • To be used for discharging electric charge on CRT quickly when power of set is turned Off. • DC voltage of R,G,B output pin is raised when VCC1 drops. YS input pin • Fast blanking pulse input pin for OSD • Turns on at a voltage higher than 1 V[0-p] I/O AC f = fC approx. 0.3 V[p-p] IP2 100 µA IP1 500 µA IN2 100 µA100 µA IN1 500 µA C7 and C8 have temperature characteristic (N750) 9 10 kΩ to RGB output circuit 9V (VCC1) 1.7 kΩ 9 100 kΩ VCC1 DC approx. 9 V 1 µF 10 50 µA 9V (VCC1) to RGB output circuit AC (pulse) from microcomputer 10 2.7 kΩ 30 kΩ 100 µA 1V 11 12 13 50 µA 9V (VCC1) to RGB output circuit pin 11, 12, 13 2.7 kΩ 30 kΩ from microcomputer VREF Pin 11: External R input pin Pin 12: External G input pin Pin 13: External B input pin • External input pin for OSD • Output changes linearly according to input level. Output Contrast max. AC (pulse) Contrast min. Input 2.5 V (max.) • Limit voltage of input changes according to contrast control level. 17 AN5192K s Terminal Equivalent Circuits (continued) Pin No. 14 Equivalent circuit Description VCC1 (typ. 9 V) • Output part of VIF and SIF circuit • AV SW circuit • Video circuit • RGB circuit Pin15: R-out pin Pin16: G-out pin Pin17: B-out pin • BLK level approx. 0.9 V • Black (Pedestal) level approx. 2.2 V • Blanking can be released when pin 42 (Black level detection pin) is set at 0 V. Horizontal sync. detection pin • Phase of horizontal synchronizing signal and horizontal output pulse is detected and outputted. • Pin18 is low when out of phase. • In asynchronous state, color control becomes min. and chroma output disappears. • Pay attention to impedance when the voltage of pin 18 is utilized for microcomputer (ZO ≥ 1 MΩ is required) pin 56 H Out pin 46 H Sync. In 10 kΩ ICs for TV I/O DC 9V 15 16 17 C Out 130 µA 100 Ω 50 Ω 9V (VCC1) AC pin 15 16 17 500 µA 18 (VCC2) 10 kΩ 800 µA I1 800 µA I2 to Chroma circuit 5V (VCC3) DC when synchronous VCC2 − VSAT when asynchronous approx. 0.3 V 2.8 V 12 kΩ 12 kΩ 50 µA 18 ZO 0.022 µF 1 MΩ • H Sync. period When pin 56 is high: I1 On When pin 56 is low: I2 On GND • RGB circuit • DAC I2C circuit • VIF (VCO) circuit 19 18 ICs for TV s Terminal Equivalent Circuits (continued) Pin No. 20 9V (VCC1) 5.9 V 60 kΩ 60 kΩ 6.9 kΩ 2.3 V 7.1 kΩ Contrast control 2.3 V ±1 V 100 µA 7.1 kΩ 6.9 kΩ 100 µA to Contrast Circuit 2.1 V 6.9 k Ω 20 4.7 µF 3.5 V AN5192K Equivalent circuit Description ACL pin • Contrast can be reduced when DC voltage of pin 20 is decreased from the outside. I/O DC approx. 3 V 100 µA 21 5V (VCC3) 100 kΩ DATA 21 from µ-COM 1 kΩ 50 µA 100 kΩ 1.7 V I2C Bus Data input pin AC (pulse) ACK 30 kΩ to Logic circuit 30 kΩ 22 5V (VCC3) 100 kΩ Clock 22 from µ-COM 1 kΩ 50 µA 100 kΩ 1.7 V I2C Clock input pin AC (pulse) 30 kΩ to Logic circuit 30 kΩ 23 VCC3-1 (typ. 5 V) • For VIF, SIF circuit DC 5V 19 AN5192K s Terminal Equivalent Circuits (continued) Pin No. 24 25 3.5 V 27 kΩ 25 SAW 24 1.2 1.2 kΩ kΩ ICs for TV Equivalent circuit 5V (VCC3) Description Pin 24: VIF input pin 1 Pin 25: VIF input pin 2 • Input for VIF amp.and balanced input • Input max. 120 dBµ I/O AC f = fP DC level approx. 2.7 V 150 µA150 µA 26 GND • VIF, SIF circuit 5V (VCC3) DC 27 RF AGC output pin • Collector open output DC to Tuner 27 1F AGC Bias RF AGC control Bias 40 kΩ 28 9V (VCC1) 270 Ω Audio output pin • There is fluctuation of DC due to internal and external changeover AC 0 kHz to 20 kHz DC approx. 4.2 V 28 100 µA 400 µA 29 9V (VCC1) detection output PAL NTSC 120 kΩ 60 kΩ 29 1200 pF 1.7 kΩ 100 µA De-empahsis pin AC • De-empahsis filter pin for sound 0 kHz to 20 kHz detection signal. • External C is the same for PAL and NTSC (Internal impedance changes) • PAL: 120 kΩ//60 kΩ × 1 200 pF = 48 µs • NTSC: 60 kΩ × 1200 pF = 72 µs 20 ICs for TV s Terminal Equivalent Circuits (continued) Pin No. 30 1.1 kΩ 1.1 kΩ 9V AN5192K Equivalent circuit 9V (VCC1) Description AFT output pin • Center voltage offset should be adjusted by using a bus. • AFT defeat SW is turned on (0B = 00), V30 becomes a value determined by the value of externally attached resistordivider. • AFT µ is variable by impedance of externally attached resistor. External video input pin • Input pin for external video signal. DC cut input. • Typical 1 V[p-p] (max. 1.5 V[p-p]) I/O DC 30 to Tuner 1.1 kΩ 40 kΩ 1.1 kΩ max. 350 µΑ 31 50 µA to Video SW 3.6 V 30 kΩ 50 kΩ 31 10 µF 9V (VCC1) Ext. Video AC 1 V[p-p] (Composite) 100 µA DC approx. 2.1 V Decoupling pin • S curve inside IC is wide band but DC feedback is applied so that DC voltage of output signal becomes constant. • DC level (typ. 4.5 V) fS→High: V32→Low DC 32 10 kΩ 9V (VCC1) typ.4.5 V 3 kΩ 3 kΩ 1.7 kΩ 32 1.7 kΩ 10 µF 20 kΩ 100 µA 13 µA 33 50 µA to Audio SW 5.4 V 9V (VCC1) 65 kΩ 33 10 µF External audio input pin • Input pin for external audio signal input. DC cut input. • Typical input level should be adjusted to internal sound level. • Input max. 7 V[p-p] AC 0 kHz to 20 kHz 150 µA 21 AN5192K s Terminal Equivalent Circuits (continued) Pin No. 34 SIF In 0.01 µF 34 10 kΩ 1 kΩ 100 µA 5V 100 µA to SIF Limitter amp. ICs for TV Equivalent circuit 5V (VCC3) 3.0 V Description SIF Signal input Input max. 110 dBµ I/O AC f = fS DC approx. 2.3 V 35 5V (VCC3) to IF amp. 30 µA 0.47 µF 35 IF AGC filter pin • Pin for IF AGC filter. The current obtained from peak AGC circuit is smoothed by external capacitor. • Since response becomes faster when C→small, but sag tends to appear easily. DC approx. 2 V 36 9V (VCC1) 50 µA 36 Video output pin • Int. video or Ext. video signal selected by AV SW is outputted. • DC fluctuates by internal/external changeover AC 2 V[p-p] DC level approx. 4.5 V 400 µA 37 9V (VCC1) 2.4 kΩ 7.5 kΩ 1.3 V 27 k 2 pF 37 1 000 pF 9V R237 SIF APC filter pin DC • Filter pin for APC circuit of SIF approx. 2.5 V • Recommended resistance value for single frequency (R237: Connect between the pin and VCC1) 6.5 MHz: Open 6.0 MHz: 560 kΩ 5.5 MHz: 200 kΩ 4.5 MHz: 560 kΩ 22 9V BPF 9V 9V Ver. Clamp Trap APC1 DET. Out IF AGC Video Out 9V APC Ext. Audio VOSC BL DET 5V 1HDL ICs for TV FBP In AFC2 50 Hz/60 Hz 9V GND (VCJ) 9V -(R-Y)Out 5V s Application Circuit Example 8 7 6 5 4 3 2 1 9V X-ray AFC1 HOSC VCC3 (VCJ) Hor. Sync. SECAM Ver. Sync. 10 Saturation Hor. sync.sep APC1 Trap *6-bit Sharpness *7-bit HVBLK APC ACC det. 1H FF System SW Black expansion NTSC amp. Chroma SW BPF *1-bit Y clamp DAC SW Out Out I2C Bus Interface 16 17 18 19 20 21 22 23 ACC amp. Tint *7-bit CW Generate *1-bit LPF Y contrast APC2 *1-bit (Service) AFT Phase Shift Ver. sync.sep Chroma contrast Ver. Count Down *2-bit AFC2 *4-bit Hor. Lock det. BGP (50 Hz/60 Hz) 11 12 13 14 15 16 V Out H Out 9 5V C In VCC2 44 43 42 41 40 -(B-Y)Out 60 SCP 62 59 58 57 56 55 54 53 52 50 49 48 47 46 45 61 -(R-Y)In 64 Int. V 38 51 39 36 35 37 Ver. out Hor. Count Down VCO CV *7-bit clamp *1-bit Shut HVCO Down AFC1 Hor. SCP HBLK Reg. 7 dB VSW *1-bit Killer Ident 50 Hz /60 Hz detect *9-bit Level adjust *4-bit VIF detect 1F AGC R *1-bit *Drive 8-bit Drive Chroma *Cut Off 9-bit Cut Off YS VCO pulse 10 11 12 13 14 15 6 7 8 9 G Cut Off (8-bit) B Drive Cut Off IF amp. RF AGC *7-bit 24 25 26 28 29 27 9 V 30 9 V 9V VCC1 GND (IF) 5V VCC3 (IF) YS SCL SDA R Out G Out R In B In G In SAW ACL APC Audio Out GND (RGB) 3.58 MHz 4.43 MHz De-emphasis Lock DET B Out 9V Spot Killer AFT Out VIF In1 VIF In2 -(B-Y)In 63 33 SIF In 34 *7-bit PN/S SW *1-bit Limiter SIF detect R-Y demod +/− B-Y demod G-Y VCO *8-bit Brightness Deemphasis B-Y clamp Pre-amp. *1-bit ASW *1-bit G-Y clamp R-Y clamp 31 32 1 2 3 4 5 5V Decoupling Ext. Video Killer R Clamp B Clamp G Clamp Killer Out AN5192K RF AGC Out 23