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AN5441

AN5441

  • 厂商:

    PANASONIC

  • 封装:

  • 描述:

    AN5441 - Deflection distortion correction IC - Panasonic Semiconductor

  • 数据手册
  • 价格&库存
AN5441 数据手册
ICs for TV AN5441S Deflection distortion correction IC s Overview 0.4±0.25 0.45 Unit: mm 1 28 The AN5441S is a distortion correction processing IC for deflection system of color televisions and wide screen televisions. s Features • Distortion correcting functions • Vertical amplitude • Vertical linearity • Vertical S-shape • Vertical position • Vertical EHT • Horizontal amplitude • EW parabola • Trapezoidal • Upper/lower EW corner • Horizontal EHT • Built-in horizontal and vertical blanking pulse generation circuit • Supports I2C bus control 1.27 0.1±0.1 0.3 7.2±0.3 9.4±0.3 SOP028-P-0375A s Applications • Color televisions and wide screen televisions 0.15 0.925 2.0±0.2 14 15 17.81±0.3 1 2 N.C. Corner slice 5 6 AN5441S VCC2 (12 V) s Block Diagram GND1 GND2 28 27 25 VD 26 VAGC Linearity correction 24 Pulse shaping Ramp generation 23 EW corner correction H-amplitude control V/I conversion 19 18 EW out S-shaped correction V-amplitude control FBP 3 External trapezoidal correction Superimposed caption control 17 V out 16 Feedback 7 8 H-BLK generation HAGC 11 EHT correction 9 I2C Gain control 10 V-BLK generation V-SAW 14 4 2 15 22 20 21 13 1 SDA SCL Key (DC) EHT (AC) EHT (DC) VCC1 (5 V) 12 Horizontal and vertical BLK output Broken neck VCC3 (12 V) ICs for TV ICs for TV s Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 I2C I2C Description SDA input SCL input Pin No. 15 16 17 18 19 20 21 22 23 24 25 26 27 28 VCC3 (12 V) Vertical feedback input Vertical pre-drive output EW output Corner slice voltage EHT-AC input EHT-DC input Description AN5441S Horizontal FBP input VCC1 (5 V) Test pin N.C. H-BLK high-level slice voltage H-BLK low-level slice voltage V-BLK high-level slice voltage V-BLK low-level slice voltage Capacitor for H-AGC Horizontal and vertical BLK output Broken neck detection V-BLK sawtooth input Control for keystone correction Capacitor for ramp generation Capacitor for V-AGC VCC2 (12 V) VD pulse input GND2 GND1 s Absolute Maximum Ratings Parameter Supply voltage VCC Symbol VCC1 VCC2 , VCC3 Supply current ICC ICC1 ICC2 ICC3 Power dissipation *2 *2 Rating 5.6 13.4 24.5 24.0 3.2 449 −20 to +70 −55 to +150 Unit V mA PD Topr Tstg *1 mW °C °C Operating ambient temperature Storage temperature Note) *1 : Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C. *2 : The power dissipation shown is the value for Ta = 70°C. s Recommended Operating Range Parameter Supply voltage Symbol VCC1 VCC2 VCC3 Range 4.5 to 5.5 10.8 to 13.2 10.8 to 13.2 Unit V 3 AN5441S s Electrical Characteristics at Ta = 25°C Parameter Circuit current ICC1 Circuit current ICC2 Circuit current ICC3 EHT-AC input pin voltage Vertical pull-in frequency 1 Vertical pull-in frequency 2 Typical vertical output amplitude Typical EW output amplitude Vertical BLK output pulse width Horizontal BLK output pulse width 1 Horizontal BLK output pulse width 2 Vertical output amplitude change ratio (max.) Vertical output amplitude change ratio (min.) Vertical output S-shape change ratio 1 Vertical output S-shape change ratio 2 Vertical output (upper side) linearity change ratio 1 Vertical output (upper side) linearity change ratio 2 Vertical output position change amount (max.) Vertical output position change amount (min.) Vertical output (lower side) linearity change ratio 1 Vertical output (lower side) linearity change ratio 2 Vertical output EHT-DC change Symbol I4 I25 I15 Conditions VCC1 = 5 V, VCC2 = 12 V, VCC3 = 12 V VCC1 = 5 V, VCC2 = 12 V, VCC3 = 12 V VCC1 = 5 V, VCC2 = 12 V, VCC3 = 12 V fV = 50 Hz input fV = 60 Hz input typ. typ. Wide Normal Wide V amplitude typ. → max. ratio   V amplitude typ. → min. ratio   Vertical S-shape min. → max. ratio Vertical S-shape min. → max. ratio (change of V out 40% to 60% point) Vertical linearity (upper side) typ. → max.  Vertical linearity (upper side) typ. → max. Min 11.7 13.1 1.8 2.6 45 55 2.3 1.42 3.3 11.7 37 42 −54 −20  6 −14 −1.0 0.5 8 −16 Typ 17.0 16.6 2.1 3.0 50 60 2.7 1.82 4.8 12.2 39 48 −48 −13 1.5 10 −10 − 0.8 0.7 12 −12 ICs for TV Max 20.2 20.2 2.3 3.4 55 65 3.1 2.22 6.2 12.7 41 54 − 42 −6 6.0 14 −6 − 0.6 0.9 16 −8 Unit mA mA mA V Hz Hz V[p-p] V[p-p] ms µs µs % % % % % % V V % % % % % % % V20-27, 28 VCC1 = 5 V, VCC2 = 12 V, VCC3 = 12 V fV1 fV2 eV(typ) eE(typ) tVB tHB(1) tHB(2) ev(max) ev(typ) ev(min) ev(typ) ∆eVS1 ∆eVS2 ∆eVC1 ∆eVC2 ∆eVP(max) Vertical position typ. → max. ∆eVP(min) Vertical position typ. → min.   ∆eVED Vertical linearity (lower side) typ. → max. Vertical linearity (lower side) typ. → min. EHT-DC = 6 V, vertical EHT, min. → max. −24.8 −21.8 −18.8 −16 9 −13 −15 −12 13 −10 −11 −8 17 −7 −7 Vertical output EHT-AC change 1 ∆eVEA(1) EHT-AC = 2V, VEHT: max., EHT gain, min. → max.  Vertical output EHT-AC change 2 ∆eVEA(2) EHT-AC = 4 V, VEHT: max., EHT gain, min. → max.  Vertical output superimposed caption change 1 Vertical output superimposed caption change 2 ∆eVJ(1) ∆eVJ(2) Vertical superimposed caption min. → max. Vertical superimposed caption min. → max., V amplitude typ. → min.  4 ICs for TV s Electrical Characteristics at Ta = 25°C (continued) Parameter Symbol Conditions Min 3.5 1.1 4.5 0 2.5 5.45 0.7 64 −130 −95 30 −95 25 2.1 1.2 −1.8 95 −145 2.9 −145 95 0.7 0.5 0.7 Typ 3.9 1.4 4.9 0.1 3.5 6.0 2.0 96 −100 −65 60 −65 55 2.6 1.4 −1.5 120 −120 4.0 −120 120 1.1 0.8 1.0 AN5441S Max 4.3 1.7 5.3 0.5 4.5 6.93 2.6 126 −68 −35 90 −35 85 3.1 1.6 −1.2 145 −95 5.1 −95 145 1.5 1.1 1.3 Unit V V V V[p-p] V[p-p] V V % % % % % % V V V % % V % % mA mA mA Vertical output amplitude (max.) ∆eV(max) V amplitude max. Vertical output amplitude (min.) ∆eV(min) V amplitude min. Vertical output center DC level EW output parabolic amplitude change (min.) EW output parabolic amplitude change (max.) EW output horizontal amplitude change (min.) EW output horizontal amplitude change (max.) EW output trapezoidal change (min.) EW output trapezoidal change (max.) ∆eVDC eE(min) eE(max) typ. Parabolic amplitude min. Parabolic amplitude max. eED(min) Horizontal amplitude min. eED(max) Horizontal amplitude max. ∆eET(min) Trapzoidal SW : On, trapezoidal typ. → min. ∆eET(max) Trapzoidal SW : On, trapezoidal typ. → max. EW output upper corner change ∆eECT(min) Upper corner min. (min.) EW output upper corner change ∆eECT(max) Upper corner max. (max.) EW output lower corner change ∆eECB(min) Lower corner min. (min.) EW output lower corner change ∆eECB(max) Lower corner max. (max.) EW output (bottom voltage) EHT-DC change EW output (bottom voltage) EHT-AC change 1 EW output (bottom voltage) EHT-AC change 2 EW output (EW amplitude) KEY change 1 (min.) EW output (EW amplitude) KEY change 1 (max.) EW output parabolic DC level EW output (EW amplitude) KEY change 2 (min.) EW output (EW amplitude) KEY change 2 (max.) EW output drive current 1 V-AGC input and output current H-AGC input and output current ∆eEED EHT-DC: 6 V Horizontal EHT min. → max. ∆eEEA(1) EHT-AC: 2 V, horizontal EHT: max., EHT gain min. → max. ∆eEEA(2) EHT-AC: 4 V , horizontal EHT: max., EHT gain min. → max. ∆eEK(min1) KEY = 2 V, trapezoidal SW: On, trapezoidal max. → min. ∆eEK(max1) KEY = 3.2 V, trapezoidal SW: On, trapezoidal min. → max. eEB typ. ∆eEK(min2) KEY = 2 V, trapezoidal SW: Off, trapezoidal max. → min. ∆eEK(max2) KEY = 3.2 V, trapezoidal SW: Off, trapezoidal min. → max. IEW(1) IVAGC IHAGC Pin 18: 11 V 5 AN5441S s Electrical Characteristics at Ta = 25°C (continued) Parameter Ramp discharge current Ramp charge current 1 Vertical output at service SW Broken neck threshold voltage BLK output amplitude H-AGC voltage 1 H-AGC voltage 2 H-AGC pulse width V-AGC pulse width EW output drive current 2 Ramp charge current 2 H-AGC current ∆V VD input threshold value FBP input threshold value High-level low-level I2 C SDA input Symbol IRD IRC(1) VSSW VNeck VBO VHAGC(1) HD: 14 kHz VHAGC(2) HD: 17 kHz fHA fVA IEW(2) IRC(2) 3 kΩ resistor between pin 11 and GND 3 kΩ resistor between pin 24 and GND Pin 18: 1 V Pin 24: 10 V Service SW: Off Pin 24: 1 V Conditions Min 6.7 40 4.55 0.5 2.8 2.6 3.1 1.5 75 −1.3 7 0.2 0.9 0.5 4.0 0 4.0 0 100 0 0.5 0 0.4  0.1 7 Typ 8.9 45 4.95 0.7 3.1 3.25 3.85 2.2 110 − 0.9 10 0.6 1.3 0.7      0.1 1.0 0.1 1.0 2.5 1.0 11 ICs for TV Max 11.1 52 5.35 0.9 3.4 3.9 4.6 3.0 150 − 0.5 13 1.1 1.7 0.9 VCC1 0.7 VCC1 0.7  0.5 1.5 0.5 1.6  1.9 15 Unit mA µA V V V V V µs µs mA µA V V V V V V V kHz V V V V mA LSB/ step mA VHAGC∆V HD: 17 kHz ∆V VVD VFBP VSDA(H) VSDA(L) VSCL(H) VSCL(L) fi max ∆eV-Vcc Difference of VCC(max) −VCC(min) I2C SDA input SCL input SCL input High-level Low-level I2 C I2C Maximum input allowable frequency Vertical output amplitude with supply voltage fluctuation Vertical output with DC supply ∆eVD-Vcc Difference of VCC(max) −VCC(min) voltage fluctuation EW output amplitude with supply voltage fluctuation EW output with DC supply voltage fluctuation Sink current at ACK 3-bit, 4-bit, 6-bit, 7-bit DAC DNLE Vertical output drive current ∆eE-Vcc Difference of VCC(max) −VCC(min) ∆eED-Vcc Difference of VCC(max) −VCC(min) IACK Maximum value of pin 1 sink current at ACK L3, 4, 6, 7 1LSB = {data (max.) − data (00)}/ 7, 15, 63, 127 IV Out 6 ICs for TV s Terminal Equivalent Circuits Pin No. 1 Equivalent circuit 5 V (VCC1) 100 kΩ 75 µA 100 kΩ AN5441S Description I2C bus data input pin: Sink current: typ. 2.5 mA Voltage AC (Pulse) 200 Ω 1 10 kΩ 1 kΩ 1.8 V 2 5 V (VCC1) 100 kΩ 75 µA 100 kΩ I2C bus clock input pin AC (Pulse) 200 Ω 2 10 kΩ 1.8 V 3 12 V (VCC3) 50 µA 12 V (VCC2) 600 Ω 3 200 µA 3V 14 kΩ 28 kΩ 20 kΩ FBP input pin: 10 V AC (Pulse) 0V 4 5 12 V (VCC2)  VCC1 (typ. 5 V): For I2C circuit Test pin: Attach a capacitor (0.082 µF) for filter to GND. DC 5V DC 10.6 V 6 kΩ 6 kΩ 5 180 µA to 250 µA 7 AN5441S s Terminal Equivalent Circuits (continued) Pin No. 6 7 12 V (VCC3) 50 µA 12 V (VCC2) H-SAW ICs for TV Equivalent circuit  N.C Description Voltage N.C. DC typ. 0 V to 4 V HBLK high-level slice voltage: 100 µA 50 µA V7 H-SAW V8 0V FBP BLK output voltage 4V 7 8 12 V (VCC3) 50 µA 12 V (VCC2) H-SAW HBLK low-level slice voltage: 100 µA 50 µA V7 H-SAW V8 0V FBP BLK output voltage 4V DC typ. 0 V to 4 V 8 9 12 V (VCC3) 12 V (VCC2) 50 µA 100 µA 50 µA 12 V (VCC2) H-SAW VBLK high-level slice voltage: For I2C circuit V9 V-SAW V10 DC typ. 0 V to 10 V 9 14 BLK output voltage 10 12 V (VCC3) 12 V (VCC2) 50 µA 100 µA 50 µA 12 V (VCC2) V-SAW VBLK low-level slice voltage: V9 V-SAW V10 DC 0 V to 10 V 10 14 BLK output voltage 8 ICs for TV s Terminal Equivalent Circuits (continued) Pin No. 11 Equivalent circuit 12 V (VCC3) AN5441S Description H sawtooth AGC voltage pin Voltage DC 1.5 V to 10 V 12 V (VCC2) H-AGC pulse 11 H-AGC pulse 600 kΩ 12 12 V (VCC3) 12 V (VCC2) Blanking pulse output pin: Horizontal/vertical BLK output pin Blanking output high-level with neck input low-level AC (Pulse) 12 200 Ω 30 kΩ 100 kΩ 13 12 V (VCC3) 12 V (VCC2) 140 kΩ 13 Broken neck detection pin: Normal; High-level (apply 1 V or more) Abnormal; Low-levrl (apply 0.4 V or more) (Broken neck mode) There is no broken neck operation when service SW is on. Sawtooth input pin for V-BLK: V-SAW DC 14 Refer to pin 9 and pin 10 equivalent circuit. AC 15  VCC3 (typ. 12 V): For BLK pulse generation circuit. DC 12 V 9 AN5441S s Terminal Equivalent Circuits (continued) Pin No. 16 12 V (VCC2) 50 µA 15 kΩ 16 400 µA 400 µA 5V 50 µA ICs for TV Equivalent circuit Description Vertical feedback input pin: V out Voltage AC Short-circuit this pin with pin 17 in normal use 17 12 V (VCC2) Vertical output pin: V out AC 17 200 Ω 1.2 mA Short-circuit this pin with pin 16 in normal use 18 12 V (VCC2) EW output pin: EW out 40 kΩ AC 18 10 kΩ 1.5 V 19 12 V (VCC2) Upper and lower corner slice voltage input pin 50 µA 50 µA DC 0 V to 1.5 V 19 1.25 V 10 ICs for TV s Terminal Equivalent Circuits (continued) Pin No. 20 12 V (VCC2) 50 µA 6.5 kΩ 150 µA 50 µA 20 kΩ 2.9 V AN5441S Equivalent circuit Description EHT-AC input pin Voltage AC Open approx. 2.9 V 20 150 µA 20 kΩ 21 12 V (VCC2) EHT-DC input pin DC 6 V to 10 V (typ. 8 V) 21 20 kΩ 200 µA 10 kΩ 50 µA 200 µA 8.0 V 6.6 V 50 µA 22 12 V (VCC2) 50 µA 24 kΩ 22 200 µA 200 µA 2.5 V 50 µA External shape trapezoidal correction DC control pin DC 1.5 V to 3.5 V (typ. 2.5 V) 23 12 V (VCC2) Ramp reference waveform generation pin: 2.5 V AC 23 20 kΩ 16.7 ms 0V 11 AN5441S s Terminal Equivalent Circuits (continued) Pin No. 24 Equivalent circuit 12 V (VCC2) ICs for TV Description AGC pin for ramp Voltage AC 24 25  VCC2 (typ. 12 V): For I2C circuit and correction system circuit V pulse input pin: DC 26 12 V (VCC2) 50 µA AC (Pulse) 4V 0V 16.7 ms 26 3.0 V 27 28   GND2: For analog circuit block GND1: For digital circuit block DC DC 12 ICs for TV s Application Circuit Example AN5441S V-amplitude control 16 Feedback EW out 17 V out 18 EHT correction Gain control 20 H-amplitude control EHT (AC) N.C. 6 21 EHT (DC) Superimposed caption control S-shaped correction Linearity correction 1 SDA 5 0.033 µF I2C 2 4 SCL VCC1 (5 V) Corner slice 19 EW corner correction V/I conversion External trapezoidal correction 22 Key (DC) 15 23 0.18 µF VCC3 (12 V) Ramp generation 13 Broken neck Normal Neck 24 0.33 µF VAGC 12 Horizontal and vertical BLK output 3V VCC2 (12 V) GND2 25 V-BLK H-BLK 0V 27 GND1 28 VD 26 Pulse shaping H-BLK generation HAGC 11 10 V-BLK generation 3.3 µF 9 500 Ω 1 500 Ω 790 Ω 100 Ω 4V 0V 10 V 0V 12 V 12 V 7 500 Ω 3 900 Ω 130 Ω V-SAW 14 FBP 3 7 8 9 13
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